Граф коммитов

12 Коммитов

Автор SHA1 Сообщение Дата
Brian Swetland 2eb44eb9c8 [ARM] msm: shared memory interface for baseband processor ipc
This code provides the low level interface to the "shared memory
state machine" (smsm), and the virtual serial channels (smd), used
to communicate with the baseband processor.  Higher level transports
(rpc, ethernet, AT command channel, etc) ride on top of this.

Signed-off-by: Brian Swetland <swetland@google.com>
2010-05-12 09:14:52 -07:00
Daniel Walker 2012e49e8a arm: msm: move board-dream.c to board-trout.c
Move the naming of this board file back to the original Google naming.

Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-05-12 09:14:33 -07:00
Daniel Walker 43b39f9f04 arm: msm: add cpu frequency controls
This adds acpuclock-arm11.c from Google. This provides control
over the cpu frequency for arm11 cpu's.

This has shared authorship between Google, and Qualcomm. Most
of it was written by Mike Chan at Google.

Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2010-05-12 09:14:20 -07:00
Pavel Machek 348ee123a1 msm: add minimal board file for HTC Dream device
This is just enough to get the device booting and serial console
working.  Sufficient for debugging further MSM7k/Dream Support.
This will support HTC Dream / T-Mobile G1 / Android ADP1 (which
are all the same hardware, known as "trout" to the ARM machine
database).

Signed-off-by: Brian Swetland <swetland@google.com>
Reviewed-by: GeunSik Lim <geunsik.lim@samsung.com>
Signed-off-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
2009-11-20 06:40:19 -08:00
Brian Swetland f030d7b65e [ARM] msm: vreg interface to msm7k pmic
The baseband cpu owns the pmic, so voltage regulator control is only
available via a relatively limited interface through the proc_comm
transport.

Signed-off-by: Brian Swetland <swetland@google.com>
2008-10-22 02:41:00 -07:00
Brian Swetland 600f7cfebe [ARM] msm: clock: provide clk_*() api support for
Makes use of the proc_comm interface to provide clock control on
MSM7X01A family SoCs.

Signed-off-by: Brian Swetland <swetland@google.com>
2008-10-22 02:41:00 -07:00
Brian Swetland bcc0f6af07 [ARM] msm: clean up iomap and devices
- Add some more peripherals (sdcc, etc) to the iomap.
- Remove virtual base addresses for devices that we should be passing
  physical addresses to drivers via resources and ioremap()ing.
- don't try to use uarts for ll debug once the mmu is enabled due to
  problems with the peripheral window
- make base addresses void __iomem * and fixup irq.c and timer.c
- Remove common.c and bring in devices.c/devices.h similar to
  the PXA architecture.

Signed-off-by: Brian Swetland <swetland@google.com>
2008-10-22 02:40:59 -07:00
Brian Swetland b8a16e1fdf [ARM] msm: add proc_comm support, necessary for clock and power control
The proc_comm protocol is the lowest level protocol available for
communicating with the modem core.  It provides access to clock and
power control, among other things, and is safe for use from atomic
contexts, unlike the higher level SMD and RPC transports.

Signed-off-by: Brian Swetland <swetland@google.com>
2008-10-22 02:39:32 -07:00
Arve Hjønnevåg bfe645adf1 [ARM] msm: dma support for MSM7X00A
Signed-off-by: Brian Swetland <swetland@google.com>
2008-01-26 14:39:14 +00:00
Brian Swetland 9e73c84c89 [ARM] msm: board file for MACH_HALIBUT (QCT MSM7200A)
Add support for the Qualcomm MSM7200A eval board.
Common devices are defined in common.c, to avoid excessive
cut'n'pasting them into other board files.

Signed-off-by: Brian Swetland <swetland@google.com>
2008-01-26 14:39:14 +00:00
Arve Hjønnevåg 3e4ea3728a [ARM] msm: irq and timer support for ARCH_MSM7X00A
- Vectored Interrupt Controller support
- Timer support using the GPT and DGT timers

Signed-off-by: Brian Swetland <swetland@google.com>
2008-01-26 14:39:14 +00:00
Brian Swetland 3042102a28 [ARM] msm: core platform support for ARCH_MSM7X00A
- core header files for arch-msm
- Kconfig and Makefiles to enable ARCH_MSM7X00A builds
- MSM7X00A specific arch_idle
- peripheral iomap and irq number definitions

Signed-off-by: Brian Swetland <swetland@google.com>
2008-01-26 14:39:14 +00:00