Граф коммитов

7 Коммитов

Автор SHA1 Сообщение Дата
Laxman Dewangan cd9092c6ea dma: tegra: rename driver and compatible to match with dts
Rename the compatible name and driver name to match with
tegra dts file and as per clock driver.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
2012-07-13 08:49:54 +05:30
Laxman Dewangan 4a46ba36e2 dma: tegra: fix residual calculation for cyclic case
In cyclic mode of DMA, the byte transferred can be more
than the requested size and in this case, calculating
residuals based on the current position of DMA transfer to
bytes requested i.e. bytes required to transfer to reach
bytes requested from current DMA position.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
2012-07-13 08:49:54 +05:30
Laxman Dewangan 46fb3f8ef5 dma: tegra: set DMA_CYCLIC capability
Tegra's APB DMA driver support the cyclic mode of data
transfer and hence setting the DMA_CYCLIC caps for dma
channels.

This is require when generic sound dmaengine pcm driver
request for dma channel with CYCLIC capability.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
2012-06-27 19:18:55 +05:30
Laxman Dewangan 6660f7af52 dma: tegra: do not set transfer desc flag to DMA_CTRL_ACK in cyclic mode
The sound dmaengine pcm driver uses the dma in cyclic mode and
it does not ack the transfer descriptor  after transfer stops.
This may lead to hold that desc in chip's dma driver and does
not allow to reuse/free that descriptors. Hence not enabling
flag DMA_CTRL_ACK when dma runs in cyclic mode.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
2012-06-27 19:18:55 +05:30
Prashant Gaikwad 56482ec0b1 dma: tegra: add clk_prepare/clk_unprepare
Use clk_prepare/clk_unprepare as required by the generic clk framework.

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
2012-06-27 19:03:25 +05:30
Laxman Dewangan 597c854974 dma: tegra: use sg_dma_address() for getting dma buffer address
Use the sg_dma_address() to get the segment buffer address for
DMA transfer in place of sg_phys() which returns the physical
address of an sg entry.
The sg_dma_address() returns the correct buffer memory address
for DMA transfer.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
2012-06-27 19:01:52 +05:30
Laxman Dewangan ec8a158678 dma: tegra: add dmaengine based dma driver
Add dmaengine based NVIDIA's Tegra APB DMA driver.
This driver support the slave mode of data transfer from
peripheral to memory and vice versa.
The driver supports for the cyclic and non-cyclic mode
of data transfer.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
2012-06-08 10:53:05 +05:30