Граф коммитов

11 Коммитов

Автор SHA1 Сообщение Дата
Lorenzo Pieralisi 73158b77c9 ARM: dts: lpc32xx: cpus/cpu nodes dts updates
This patch updates the in-kernel dts files according to the latest cpus
and cpu bindings updates for ARM.

Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2013-05-23 10:45:13 +01:00
Alban Bedel b7d41c937e ARM: LPC32xx: Add the motor PWM to base dts file
Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de>
Signed-off-by: Roland Stigge <stigge@antcom.de>
2012-11-14 15:41:18 +01:00
Alexandre Pereira da Silva de63985444 ARM: LPC32xx: Add PWM to base dts file
Signed-off-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
Signed-off-by: Roland Stigge <stigge@antcom.de>
2012-07-20 13:33:09 +02:00
Roland Stigge cb85a9e508 ARM: LPC32xx: Fix lpc32xx.dtsi status property: "disable" -> "disabled"
This patches fixes some status = "disable" strings to "disabled", the correct
way of disabling nodes in the devicetree.

Signed-off-by: Roland Stigge <stigge@antcom.de>
2012-06-14 16:16:18 +02:00
Roland Stigge ac5ced91aa ARM: LPC32xx: High Speed UART configuration via DT
This patch fixes the DTS files for the High Speed UARTs 1, 2 and 7 of the
LPC32xx SoC, adjusting the compatible strings, adding interrupts and status
configuration. On the PHY3250 reference board, UART2 is enabled.

Signed-off-by: Roland Stigge <stigge@antcom.de>
Acked-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
2012-06-14 16:16:18 +02:00
Roland Stigge c70426f153 ARM: LPC32xx: DT conversion of Standard UARTs
This patch switches from static serial driver initialization to devicetree
configuration. This way, the Standard UARTs of the LPC32xx SoC can be enabled
individually via DT.

E.g., instead of Kconfig configuration, the phy3250.dts activates
UARTs 3 and 5.

Signed-off-by: Roland Stigge <stigge@antcom.de>
Tested-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
2012-06-14 16:16:18 +02:00
Roland Stigge 2c7fa28622 ARM: LPC32xx: DTS adjustment for using pl18x primecell
This patch adjusts the dts files to reference the pl18x primecell driver
correctly.

Signed-off-by: Roland Stigge <stigge@antcom.de>
2012-06-14 16:16:18 +02:00
Roland Stigge a6d1be0e58 ARM: LPC32xx: DTS adjustment for key matrix controller
This patch connects the lpc32xx-key driver to the LPC32xx platform (via
lpc32xx.dtsi), and more specifically to the reference board via its dts file.

Signed-off-by: Roland Stigge <stigge@antcom.de>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
2012-06-14 16:16:17 +02:00
Roland Stigge 6d1c3e93e3 ARM: LPC32xx: Adjust dtsi file for MLC controller configuration
This patch takes into account that the MTD NAND MLC controller needs more
registers, located actually before the previously allocated memory range,
already starting at 200a8000 instead of 200b0000.

Further, the interrupt for the controller is configured.

Signed-off-by: Roland Stigge <stigge@antcom.de>
Tested-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
2012-06-14 16:16:17 +02:00
Roland Stigge a035254aef ARM: LPC32xx: Adjust dts files to gpio dt binding
The GPIO devicetree binding in 3.5 doesn't register the various LPC32xx GPIO
banks via DT subnodes but always all at once, and changes the gpio referencing
to 3 cells (bank, gpio, flags). This patch adjusts the DTS files to this
binding that was just accepted to the gpio subsystem.

Signed-off-by: Roland Stigge <stigge@antcom.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
2012-05-30 16:15:53 -07:00
Roland Stigge e04920d9ef ARM: LPC32xx: DTS files for device tree conversion
This patch adds the dts files for the reference machine of LPC32xx:

* arch/arm/boot/dts/lpc32xx.dtsi: Include for devices based on LPC32xx
* arch/arm/boot/dts/phy3250.dts: Board support for PHYTEC phyCORE-LPC3250

Signed-off-by: Roland Stigge <stigge@antcom.de>
2012-04-22 12:01:19 +02:00