* pci/gregkh-driver-core:
PCI: Make pci_bus_attrs, pci_dev_attrs, dev_rescan_attr, dev_remove_attr, vga_attr static
PCI: convert bus code to use dev_groups
PCI: convert bus code to use drv_groups
PCI: convert bus code to use bus_groups
Local variables used only in this file are made static.
[bhelgaas: also make pci_dev_attrs[] static (from Fengguang)]
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
The dev_attrs field of struct bus_type is going away soon, dev_groups
should be used instead. This converts the PCI bus code to use the
correct field.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
The drv_attrs field of struct bus_type is going away soon, drv_groups
should be used instead. This converts the PCI bus code to use the
correct field.
Cc: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
The bus_attrs field of struct bus_type is going away soon, dev_groups
should be used instead. This converts the PCI bus code to use the
correct field.
Cc: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* pci/misc:
PCI: Remove unused PCI_MSIX_FLAGS_BIRMASK definition
PCI: acpiphp_ibm: Convert to dynamic debug
PCI: acpiphp: Convert to dynamic debug
PCI: Remove Intel Haswell D3 delays
PCI: Pass type, width, and prefetchability for window alignment
PCI: Document reason for using pci_is_root_bus()
PCI: Use pci_is_root_bus() to check for root bus
PCI: Remove unused "is_pcie" from pci_dev structure
PCI: Update pci_find_slot() description in pci.txt
[SCSI] qla2xxx: Use standard PCIe Capability Link register field names
PCI: Fix comment typo, remove unnecessary !! in pci_is_pcie()
PCI: Drop "setting latency timer" messages
PCI_MSIX_FLAGS_BIRMASK has been replaced by PCI_MSIX_TABLE_BIR for better
readability. Now no one uses it, remove it. No functional change.
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Add support for the PCIe port present on the i.MX6 family of controllers.
These use the Synopsis Designware core tied to their own PHY.
Signed-off-by: Sean Cross <xobs@kosagi.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
PCIe requires additional bits be defined for GPR8 and GPR12.
Signed-off-by: Sean Cross <xobs@kosagi.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* pci/host-exynos:
PCI: exynos: Turn off power of phy block when link failed
PCI: exynos: Add support for MSI
MAINTAINERS: Add Jingoo Han as Samsung Exynos PCIe driver maintainer
This patch is to use pr_debug/info/warn/err to replace acpiphp_ibm debug
functions and remove module's debug param.
User interface change: before this patch, boot with the "acpiphp_ibm.debug"
kernel parameter to turn on debug. After this patch, set
CONFIG_DYNAMIC_DEBUG=y and boot with "acpiphp_ibm.dyndebug=+p" instead.
See Documentation/dynamic-debug-howto.txt.
[bhelgaas: changelog]
Signed-off-by: Lan Tianyu <tianyu.lan@intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
This patch is to use pr_debug/info/warn/err to replace acpiphp debug
functions and remove module's debug param.
User interface change: before this patch, boot with the "acpiphp.debug"
kernel parameter to turn on debug. After this patch, set
CONFIG_DYNAMIC_DEBUG=y and boot with "acpiphp.dyndebug=+p" instead.
See Documentation/dynamic-debug-howto.txt.
[bhelgaas: changelog]
Signed-off-by: Lan Tianyu <tianyu.lan@intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
When link failed, there is no need to turn on phy block. Also,
turning on phy block is added, in order to turn on phy block
regardless of the default value of phy registers.
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
The latest Intel Haswell chipsets have a hardware optimization which
allows on-chip PCI devices to ignore the 10ms delay before entering
or exiting D3 suspend.
This patch implements the optimization as a PCI quirk, since we want
tight control over which devices use it. This way we can test each device
individually to be sure there are no issues before we enable the quirk.
The first set of devices are from the Haswell platform, which includes
every PCI device that is on the northbridge and southbridge.
This patch reduces the Haswell suspend time from 93 ms to 47 ms and resume
time from 160 ms to 64 ms.
Signed-off-by: Todd Brandt <todd.e.brandt@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
When calculating window_alignment(), type information like IORESOURCE_MEM
and IORESOURCE_PREFETCH may not be enough. For example, on powernv, we
need to know whether the window is 64-bit or not.
This patch passes the full resource type (res->flags) for window alignment.
[bhelgaas: changelog]
Signed-off-by: Wei Yang <weiyang@linux.vnet.ibm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Gavin Shan <shangw@linux.vnet.ibm.com>
Some code assumes "bus->self == NULL" means the bus is a root bus. This
adds a comment explaining why this is incorrect ("virtual" buses added for
SR-IOV have "bus->self == NULL" but are not root buses).
No functional change.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
In __pci_bus_size_bridges() we check whether a bus is a root bus by testing
bus->self. As indicated by commit 79af72d7 ("PCI: pci_is_root_bus
helper"), bus->self == NULL is not a proper way to check for a root bus.
One issue is that "virtual" buses added for SR-IOV (via virtfn_add_bus())
have bus->self == NULL but are not root buses.
This patch changes it to pci_is_root_bus() to check whether it is a root
bus.
[bhelgaas: changelog]
Signed-off-by: Wei Yang <weiyang@linux.vnet.ibm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
No one uses "is_pcie" now; remove this obsolete member.
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
pci_find_slot() has been removed from the kernel. Document its
closest replacement, pci_get_domain_bus_and_slot(), instead.
[bhelgaas: fix indentation, keep mention in "obsolete" section]
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Use the standard #defines for PCIe Link Capability register fields
rather than bare numbers. This also uses the new PCI Express Capability
accessor rather than reading the capability directly.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Saurav Kashyap <saurav.kashyap@qlogic.com>
Acked-by: Giridhar Malavali <giridhar.malavali@qlogic.com>
Use normal kernel-doc "Returns:" instead of "retrun"
Assignment to bool is always 1 or 0 so the !! isn't necessary.
Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* pci/yijing-pci_is_pcie-v2:
powerpc/pci: Use pci_is_pcie() to simplify code
[SCSI] qla2xxx: Use pcie_is_pcie() to simplify code
[SCSI] csiostor: Use pcie_capability_clear_and_set_word() to simplify code
[SCSI] bfa: Use pcie_set()/get_readrq() to simplify code
x86/pci: Use cached pci_dev->pcie_cap to simplify code
PCI: Use pci_is_pcie() to simplify code
* pci/bjorn-osc:
PCI/ACPI: Decode _OSC bitmasks symbolically
PCI/ACPI: Separate out _OSC "we don't support enough services" path
PCI/ACPI: Separate out _OSC "PCIe port services disabled" path
PCI/ACPI: Skip _OSC control tests if _OSC support call failed
PCI/ACPI: Run _OSC only once for OSPM feature support
PCI/ACPI: Split _OSC "support" and "control" flags into separate variables
PCI/ACPI: Move _OSC stuff from acpi_pci_root_add() to negotiate_os_control()
PCI/ACPI: Drop unnecessary _OSC existence tests
PCI/ACPI: Name _OSC #defines more consistently
ACPI: Write OSC_PCI_CONTROL_MASKS like OSC_PCI_SUPPORT_MASKS
ACPI: Remove unused OSC_PCI_NATIVE_HOTPLUG
ACPI: Tidy acpi_run_osc() declarations
ACPI: Rename OSC_QUERY_TYPE to OSC_QUERY_DWORD
ACPI: Write _OSC bit field definitions in hex
This updates _OSC-related messages to be more human-readable. We now always
show the features we declare support for (this was previously invisible) as
well as the features we are granted control of.
Typical changes:
-acpi PNP0A08:00: Requesting ACPI _OSC control (0x1d)
-acpi PNP0A08:00: ACPI _OSC control (0x1d) granted
+acpi PNP0A08:00: _OSC: OS supports [ExtendedConfig ASPM ClockPM Segments MSI]
+acpi PNP0A08:00: _OSC: OS now controls [PCIeHotplug PME AER PCIeCapability]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Test the services we support (extended config space, ASPM, MSI) separately
so we can give a better message. Previously we said "Unable to request
_OSC control..."; now we'll say "we support %#02x but %#02x are required".
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Test "pcie_ports_disabled" separately so we can give a better message.
Previously we said "Unable to request _OSC control..."; now we'll
say "PCIe port services disabled; not requesting _OSC control".
"pcie_ports_disabled" is true when CONFIG_PCIEPORTBUS=n or we boot
with "pcie_ports=compat".
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
If the _OSC support notification fails, we will never request control
(because "support == OSC_PCI_SEGMENT_GROUPS_SUPPORT", which doesn't include
all the features in ACPI_PCIE_REQ_SUPPORT), so we can return early to
simplify the code.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Previously, we ran _OSC once to tell the platform that we support
PCI Segment Groups, then we ran it again if we supported any additional
features (ASPM, MSI, or extended config space). I don't think it's
necessary to run it twice, since we can easily build the complete
mask of features we support before running _OSC the first time.
We run _OSC again later when requesting control of PCIe features;
that's unaffected by this change.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Previously we used "flags" for both:
- the bitmask of features we support (segments, ASPM, MSI, etc.), and
- the bitmask of features we want to control (native hotplug, AER, etc.)
To reduce confusion, this patch splits this into two variables:
"support" is the bitmask of features we support, and "control" is the
bitmask of features we want to control. No functional change.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
This doesn't change any of the _OSC code; it just moves it out into
a new function so it doesn't clutter acpi_pci_root_add() so much. This
also enables future simplifications.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
There's no need to check whether _OSC exists here; we eventually
call acpi_evaluate_object(..., "_OSC", ...), and that will fail
gracefully if _OSC doesn't exist.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Make PCI Host Bridge _OSC #defines more consistent. No functional change.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
We write OSC_PCI_SUPPORT_MASKS as a simple 0x1f, so do the same
for OSC_PCI_CONTROL_MASKS. No functional change.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
OSC_PCI_NATIVE_HOTPLUG is completely unused, so remove it. No functional
change.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Move the acpi_run_osc() prototype next to the related structure and
update comments. No functional change.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
OSC_QUERY_TYPE isn't a "type"; it's an index into the _OSC Capabilities
Buffer of DWORDs. Rename OSC_QUERY_TYPE, OSC_SUPPORT_TYPE, and
OSC_CONTROL_TYPE to OSC_QUERY_DWORD, etc., to make this clear.
No functional change.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Update _OSC definition comments to correspond to the 1-based spec wording
(DWORD 1, etc.) Write _OSC field #defines as hex to make clear that they
are bits in a 32-bit DWORD, not arbitrary values. No functional change.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
pci_is_pcie() and pcie_capability_clear_and_set_word() make it trivial
to set the PCIe Completion Timeout, so just fold the
csio_set_pcie_completion_timeout() function into its caller.
[bhelgaas: changelog, fold csio_set_pcie_completion_timeout() into caller]
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Jiang Liu <jiang.liu@huawei.com>
Cc: "James E.J. Bottomley" <JBottomley@parallels.com>
Cc: Naresh Kumar Inna <naresh@chelsio.com>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Jesper Juhl <jj@chaosbits.net>
Use pcie_get_readrq()/pcie_set_readrq() to simplify code.
Jon Mason proposed a similar patch a couple years ago (see below).
[bhelgaas: validate pcie_max_read_reqsz, add pointer to Jon's patch]
Reference: http://lkml.kernel.org/r/1309191190-14670-1-git-send-email-jdmason@kudzu.us
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Jiang Liu <jiang.liu@huawei.com>
Cc: Anil Gurumurthy <agurumur@brocade.com>
Cc: Vijaya Mohan Guvva <vmohan@brocade.com>
Cc: "James E.J. Bottomley" <JBottomley@parallels.com>
The PCI core caches the PCIe Capability offset in pci_dev->pcie_cap, so
use that instead of pci_find_capability(). Use pci_bus_set_ops() when
replacing the device pci_ops. And use #defines instead of numeric
constants.
[bhelgaas: changelog, also use PCI_EXP_LNKCTL_ASPMC]
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Use pci_is_pcie() instead of pci_find_capability() to simplify code.
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Bjorn Helgaas
Sachin Kamat
Greg Kroah-Hartman
Yijing Wang
Sean Cross
Lan Tianyu
Jingoo Han
Todd E Brandt
Wei Yang
Joe Perches
Linus Torvalds