Enable support for the ARM Performance Monitor Units in the Cortex-A15
CPU cores on R-Car M2-N by adding a device node for the PMU.
New Linux output:
hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Enable support for the ARM Performance Monitor Units in the Cortex-A15
CPU cores on R-Car V2H by adding a device node for the PMU.
New Linux output:
hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Enable support for the ARM Performance Monitor Units in the Cortex-A15
CPU cores on R-Car M2-W by adding a device node for the PMU.
New Linux output:
hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Enable support for the ARM Performance Monitor Units in the Cortex-A15
and Cortex-A7 CPU cores on R-Car H2 by adding device nodes for the two
PMUs.
New Linux output:
hw perfevents: enabled with armv7_cortex_a15 PMU driver, 7 counters available
hw perfevents: /pmu-1: failed to probe PMU!
hw perfevents: /pmu-1: failed to register PMU devices!
The last two lines are due to the Cortex-A7 CPU cores being described in
DT, but not enabled by the firmware.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Enable support for the ARM Performance Monitor Units in the Cortex-A9
CPU core on RZ/A1H by adding a device node for the PMU.
New Linux output:
hw perfevents: enabled with armv7_cortex_a9 PMU driver, 7 counters available
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
According to table 7.3 ("List of Interrupt IDs") in the RZ/A1H Hardware
User's Manual rev. 3.00, the realtime clock interrupts are level not
edge interrupts.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
According to table 7.3 ("List of Interrupt IDs") in the RZ/A1H Hardware
User's Manual rev. 3.00, the watchdog timer interrupt is a level
interrupt.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The PMU node references two interrupts, but lacks the interrupt-affinity
property, which is required in that case:
hw perfevents: no interrupt-affinity property for /pmu, guessing.
Add the missing property to fix this.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The PMU node references two interrupts, but lacks the interrupt-affinity
property, which is required in that case:
hw perfevents: no interrupt-affinity property for /pmu, guessing.
Add the missing property to fix this.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
R-Mobile APE6 (r8a73a4) contains four Cortex-A15 and four Cortex-A7
cores, hence the second interrupt specifier cell for Private Peripheral
Interrupts should use "GIC_CPU_MASK_SIMPLE(8)", so GIC interrupts are
delivered to all 8 processor cores.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
R-Car H2 (r8a7790) contains four Cortex-A15 and four Cortex-A7 cores,
hence the second interrupt specifier cell for Private Peripheral
Interrupts should use "GIC_CPU_MASK_SIMPLE(8)", to make sure interrupts
can be delivered to all 8 processor cores.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Instead of hardcoding the input codes we can use the symbol name for
better readability.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Instead of hardcoding the input codes we can use the symbol name for
better readability.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Instead of hardcoding the input codes we can use the symbol name for
better readability.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
OF graph endpoint connections must be bidirectional and dtc will now
warn if they are not. i.MX7 based DTs have an error and generate
warnings:
Warning (graph_endpoint): /replicator/ports/port@0/endpoint: graph connection to node '/soc/tpiu@30087000/port/endpoint' is not bidirectional
Warning (graph_endpoint): /soc/tpiu@30087000/port/endpoint: graph connection to node '/replicator/ports/port@1/endpoint' is not bidirectional
This appears to be a copy-n-paste error and the TPIU input should be
connected to replicator port 0 instead of port 1.
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Single child nodes in OF graph don't need an address and now dtc will
warn about this:
Warning (graph_child_address): /soc/aips@50000000/ldb@53fa8008/lvds-channel@0: graph node has single child node 'port@0', #address-cells/#size-cells are not necessary
Since the LDB should always have an output port, fix the warning by
adding the output port, 2, to the DT.
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
OF graph endpoint nodes are supposed to be named 'endpoint' with an
address if there is more than one. The i.MX IPU binding graph has used
unique endpoint names instead which now generate dtc warnings:
Warning (graph_endpoint): /soc/ipu@2400000/port@2/disp0-endpoint: graph endpont node name should be 'endpoint'
Warning (graph_endpoint): /soc/ipu@2400000/port@2/hdmi-endpoint: graph endpont node name should be 'endpoint'
Warning (graph_endpoint): /soc/ipu@2400000/port@2/mipi-endpoint: graph endpont node name should be 'endpoint'
Warning (graph_endpoint): /soc/ipu@2400000/port@2/lvds0-endpoint: graph endpont node name should be 'endpoint'
Warning (graph_endpoint): /soc/ipu@2400000/port@2/lvds1-endpoint: graph endpont node name should be 'endpoint'
Warning (graph_endpoint): /soc/ipu@2400000/port@3/disp1-endpoint: graph endpont node name should be 'endpoint'
Warning (graph_endpoint): /soc/ipu@2400000/port@3/hdmi-endpoint: graph endpont node name should be 'endpoint'
Warning (graph_endpoint): /soc/ipu@2400000/port@3/mipi-endpoint: graph endpont node name should be 'endpoint'
Warning (graph_endpoint): /soc/ipu@2400000/port@3/lvds0-endpoint: graph endpont node name should be 'endpoint'
Warning (graph_endpoint): /soc/ipu@2400000/port@3/lvds1-endpoint: graph endpont node name should be 'endpoint'
Warning (graph_endpoint): /soc/ipu@2800000/port@2/disp0-endpoint: graph endpont node name should be 'endpoint'
Warning (graph_endpoint): /soc/ipu@2800000/port@2/hdmi-endpoint: graph endpont node name should be 'endpoint'
Warning (graph_endpoint): /soc/ipu@2800000/port@2/mipi-endpoint: graph endpont node name should be 'endpoint'
Warning (graph_endpoint): /soc/ipu@2800000/port@2/lvds0-endpoint: graph endpont node name should be 'endpoint'
Warning (graph_endpoint): /soc/ipu@2800000/port@2/lvds1-endpoint: graph endpont node name should be 'endpoint'
Warning (graph_endpoint): /soc/ipu@2800000/port@3/hdmi-endpoint: graph endpont node name should be 'endpoint'
Warning (graph_endpoint): /soc/ipu@2800000/port@3/mipi-endpoint: graph endpont node name should be 'endpoint'
Warning (graph_endpoint): /soc/ipu@2800000/port@3/lvds0-endpoint: graph endpont node name should be 'endpoint'
Warning (graph_endpoint): /soc/ipu@2800000/port@3/lvds1-endpoint: graph endpont node name should be 'endpoint'
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add the 4th partiton named "mfg" with a block size 64K to store
manufacturing data.
Signed-off-by: Ken Lin <ken.lin@advantech.com.tw>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
It replaces underscore with hyphen in aliases name to fix DTC
alias_paths warning below, which is seen with various i.MX board dts
files when W=1 switch is on.
Warning (alias_paths): /aliases: aliases property name must include only lowercase and '-'
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Acked-By: Lothar Waßmann <LW@KARO-electronics.de>
Reviewed-by: Gary Bisson <gary.bisson@boundarydevices.com>
For soc level of clocks which are input to Clock Control Module, clock
driver expects them to be under 'clocks' container node. But for board
level clocks, this container is not really necessary. Let's drop it and
use an unique name for fixed rate clock, so that 'reg' property can be
saved as well.
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Acked-By: Lothar Waßmann <LW@KARO-electronics.de>
Instead of copying the whole node hierarchy, let's define a label for
clock osc26m in soc dtsi and use it for overriding clock-frequency.
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The clk32 clock is an input clock to CCM module, and should be defined
in soc dtsi rather than a board level dts. Let's move it into
imx1.dtsi.
While at it, let's drop unnecessary #address-cells/#size-cells from
'clocks' node to DTC warning avoid_unnecessary_addr_size seen with W=1
switch.
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
It drops unnecessary #address-cells/#size-cells from <soc>.dtsi 'clocks'
node to fix DTC warning avoid_unnecessary_addr_size seen with W=1
switch.
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
There is a debug LED(D11) connected to GPIO1_IO24,
add support for it.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
i.MX6SX Sabre Auto board has GPIO1_IO13 pin can be
MUXed as WDOG output to reset PMIC, add this function
support.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
i.MX6SX Sabre Auto board has two max7310 IO expander on I2C3 bus, add
support for them.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The board specific pinctrl function container node 'imx6x-sabreauto' is
not really necessary, since commit 5fcdf6a7ed ("pinctrl: imx: Allow
parsing DT without function nodes"). Let's drop it to save one level of
indentation.
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Let's drop the 'regulators' container node by giving VCC_SD3 an unique
name and removing 'reg' property, so that the fixed regulator can be
under root node directly.
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The 'fsl,uart-has-rtscts' property is deprecated and it is recommended
to use the generic 'uart-has-rtscts' property instead.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Remove unnecessary #address-cells/#size-cells from the switch nodes
to fix the following DTC warnings:
arch/arm/boot/dts/imx6q-b450v3.dtb: Warning (avoid_unnecessary_addr_size): /mdio-gpio/switch@0: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
GPIO_ACTIVE_LOW was being used to specify an interrupt, use
IRQ_TYPE_EDGE_RISING instead. This improves DT readability.
Signed-off-by: Hernán Gonzalez <hernan@vanguardiasur.com.ar>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
My recent Xen patch series introduces a new HYPERVISOR_memory_op to
support direct priv-mapping of certain guest resources (such as ioreq
pages, used by emulators) by a tools domain, rather than having to access
such resources via the guest P2M.
This patch adds the necessary infrastructure to the privcmd driver and
Xen MMU code to support direct resource mapping.
NOTE: The adjustment in the MMU code is partially cosmetic. Xen will now
allow a PV tools domain to map guest pages either by GFN or MFN, thus
the term 'mfn' has been swapped for 'pfn' in the lower layers of the
remap code.
Signed-off-by: Paul Durrant <paul.durrant@citrix.com>
Reviewed-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Signed-off-by: Juergen Gross <jgross@suse.com>
This removes the #address-cells and #size-cells properties from the
gpio-keys node in the da850-lego-ev3 device tree. These properties are
not needed since the child nodes don't have a reg property.
Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
This series adds support for am335x-pockebeagle and also add missing
pinctrl configuration for am335x evm and beagle bone variants.
There are also changes to add missing omap3 oscillator clocks for audio,
and fixes am437x tps65218 irq type used for various board specific
files.
There are also few minor fixes included that are not urgent. The
fixes for n8x0 audio also depend on driver changes, and the hp t410
mmc card detect mux typo is harmless.
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Merge tag 'omap-for-v4.18/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Device tree changes for omap variants for v4.18 merge window
This series adds support for am335x-pockebeagle and also add missing
pinctrl configuration for am335x evm and beagle bone variants.
There are also changes to add missing omap3 oscillator clocks for audio,
and fixes am437x tps65218 irq type used for various board specific
files.
There are also few minor fixes included that are not urgent. The
fixes for n8x0 audio also depend on driver changes, and the hp t410
mmc card detect mux typo is harmless.
* tag 'omap-for-v4.18/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: correct invalid I/O definition for MMC/SD card detect on T410
ARM: dts: omap2420-n810: Correct the audio codec (tlv320aic33) node
ARM: dts: omap2420-n810: Enable McBSP2 for audio
ARM: dts: am437x-sk-evm: Correct tps65218 irq type
ARM: dts: am437x-epos-evm: Correct tps65218 irq type
ARM: dts: am437x-cm-t43: Correct tps65218 irq type
ARM: dts: am437x-gp-evm: Correct tps65218 irq type
ARM: dts: Add am335x-pocketbeagle
ARM: dts: am33xx: Add pinmux data for mmc1 in am335x-evm, evmsk and beaglebone
ARM: dts: omap3-gta04: Add fixed 26MHz clock as fck for twl
ARM: dts: omap3-pandora: Add fixed 26MHz clock as fck for twl
ARM: dts: omap3-beagle-xm: Add fixed 26MHz clock as fck for twl
ARM: dts: logicpd-som-lv: Enable Touchscreen controller
Signed-off-by: Olof Johansson <olof@lixom.net>
This series improves the ti-sysc interconnect target module driver to
the point where a most of SoC can be booted with interconnect target
module data configured in device tree instead of legacy platform data.
The related device tree changes need some more work though, and can
wait for v4.19. Also some drivers using nested interconnects like DSS
need more work.
We can now remove the unused pm-noop code that is not doing anything
any longer. And we can now initialize things for PM and display pdata
later to prepare things for using ti-sysc driver.
We also need to add some more quirk handling so we can boot both with
platform data and dts data.
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Merge tag 'omap-for-v4.18/ti-sysc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
ti-sysc driver related changes for omap variants
This series improves the ti-sysc interconnect target module driver to
the point where a most of SoC can be booted with interconnect target
module data configured in device tree instead of legacy platform data.
The related device tree changes need some more work though, and can
wait for v4.19. Also some drivers using nested interconnects like DSS
need more work.
We can now remove the unused pm-noop code that is not doing anything
any longer. And we can now initialize things for PM and display pdata
later to prepare things for using ti-sysc driver.
We also need to add some more quirk handling so we can boot both with
platform data and dts data.
* tag 'omap-for-v4.18/ti-sysc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
bus: ti-sysc: Show module information for suspend if DEBUG is enabled
bus: ti-sysc: Tag sdio and wdt with legacy mode for suspend
bus: ti-sysc: Detect UARTs for SYSC_QUIRK_LEGACY_IDLE quirk on omap4
bus: ti-sysc: Detect omap4 type timers for quirk
bus: ti-sysc: Add initial support for external resets
bus: ti-sysc: Improve suspend and resume handling
bus: ti-sysc: Tag some modules resource providers for noirq suspend
bus: ti-sysc: Add handling for clkctrl opt clocks
bus: ti-sysc: Make child clock alias handling more generic
bus: ti-sysc: Handle simple-bus for nested children
ARM: OMAP2+: Make display related init into device_initcall
ARM: OMAP2+: Initialize SoC PM later
ARM: OMAP2+: Only probe SDMA via ti-sysc if configured in dts
ARM: OMAP2+: Use signed value for sysc register offsets
ARM: OMAP2+: Allow using ti-sysc for system timers
ARM: OMAP2+: Drop unused pm-noop
Signed-off-by: Olof Johansson <olof@lixom.net>
Highlights:
-----------
-MCU platforms updates:
-Update pwm-cells for stm32h743
-Add I2C support on stm32f7xx-disco boards and
on stm32h743i-eval board
-Add new stm32f469 dtsi file
-Add display support on stm32f469-disco (LTDC/DSI)
+ pannel orisetech (otm8009a)
-MPU STM32MP157 platform updates:
-Fix DTC (W=12) warnings
-Fix IRQ type definition for usart
-Add QSPI & NOR flash support on EV1 board
-Add CEC support
-Add USB host
-Add USBPHYC support and enable it on EV1 board
-Add LTDC and DSI support
-Add I2C support and enable it on ED1 and EV1 boards
-Add CRC support
-Add RNG support
-Add CRYP support
-Add DAC support
-Add LPTIMER support
-Add VREFBUFF support
-Add timers supports and enable timer trigger 6 on ED1 board
-Add MDMA, DMA and DMAMUX support and enable it
-Enable clock driver
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Merge tag 'stm32-dt-for-v4.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into next/dt
STM32 DT updates for v4.18, round 1
Highlights:
-----------
-MCU platforms updates:
-Update pwm-cells for stm32h743
-Add I2C support on stm32f7xx-disco boards and
on stm32h743i-eval board
-Add new stm32f469 dtsi file
-Add display support on stm32f469-disco (LTDC/DSI)
+ pannel orisetech (otm8009a)
-MPU STM32MP157 platform updates:
-Fix DTC (W=12) warnings
-Fix IRQ type definition for usart
-Add QSPI & NOR flash support on EV1 board
-Add CEC support
-Add USB host
-Add USBPHYC support and enable it on EV1 board
-Add LTDC and DSI support
-Add I2C support and enable it on ED1 and EV1 boards
-Add CRC support
-Add RNG support
-Add CRYP support
-Add DAC support
-Add LPTIMER support
-Add VREFBUFF support
-Add timers supports and enable timer trigger 6 on ED1 board
-Add MDMA, DMA and DMAMUX support and enable it
-Enable clock driver
* tag 'stm32-dt-for-v4.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (42 commits)
ARM: dts: stm32: update pwm-cells for LPTimer on stm32h743
ARM: dts: stm32: Add I2C1 support for stm32h743i-eval Board
ARM: dts: stm32: Add I2C support for STM32H743 SoC
ARM: dts: stm32: Add I2C1 support for stm32f746-disco Board
ARM: dts: stm32: Add I2C1 support for stm32f769-disco Board
ARM: dts: stm32: Append additional I2Cs for STM32F746 SoC
ARM: dts: stm32: Add display support on stm32f469-disco
ARM: dts: stm32: Add new stm32f469 dtsi file with mipi dsi
ARM: dts: stm32: Use gpio bindings in stm32f469-disco
ARM: dts: stm32: Fix IRQ_TYPE_NONE warnings on stm32mp157c
ARM: dts: stm32: Fix DTC warnings for stm32mp157
ARM: dts: stm32: add flash nor support on stm32mp157c eval board
ARM: dts: stm32: add qspi support for stm32mp157c
ARM: dts: stm32: add cec support on stm32mp157c-ev1
ARM: dts: stm32: add cec pins to stm32mp157c
ARM: dts: stm32: add cec support on stm32mp157c
ARM: dts: stm32: add USB Host (USBH) support to stm32mp157c
ARM: dts: stm32: enable USBPHYC on stm32mp157c-ev1
ARM: dts: stm32: add supplies to usbphyc ports on stm32mp157c-ed1
ARM: dts: stm32: add USBPHYC support to stm32mp157c
...
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch select DMA, DMAMUX and MDMA support for STM32MP157C machine.
Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch adds STM32F7 I2C support to multi_v7_defconfig and
enable the STM32 USB PHY Controller (USBPHYC) driver, implemented on
STM32MP1 SoC.
Signed-off-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com>
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
- Corrects the debounce interval on some nodes
- Drops the U8540/U9540 device trees
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Merge tag 'ux500-dts-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/dt
This:
- Corrects the debounce interval on some nodes
- Drops the U8540/U9540 device trees
* tag 'ux500-dts-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: ux500: Drop the U8540 device trees
ARM: dts: Ux500: Fix "debounce-interval" property misspelling
Signed-off-by: Olof Johansson <olof@lixom.net>
- Drops U8540 and U9540
- Cuts down the Kconfig options due to accumulated simplifications
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Merge tag 'ux500-machine-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/soc
These changes for ux500:
- Drops U8540 and U9540
- Cuts down the Kconfig options due to accumulated simplifications
* tag 'ux500-machine-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: ux500: Cut down Kconfig options
ARM: ux500: Drop U8540/9540 support
Signed-off-by: Olof Johansson <olof@lixom.net>
- Add missing 'fsl,sec-era' property for i.MX7S device tree CAAM node,
as the era information is used in various places inside CAAM driver.
- There are a few errors in imx51-zii-rdu1 device tree touchscreen
node. Fix them to get touchscreen actually work.
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Merge tag 'imx-fixes-4.17' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes
i.MX fixes for 4.17:
- Add missing 'fsl,sec-era' property for i.MX7S device tree CAAM node,
as the era information is used in various places inside CAAM driver.
- There are a few errors in imx51-zii-rdu1 device tree touchscreen
node. Fix them to get touchscreen actually work.
* tag 'imx-fixes-4.17' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: dts: imx51-zii-rdu1: fix touchscreen bindings
ARM: dts: imx7s: Pass the 'fsl,sec-era' property
Signed-off-by: Olof Johansson <olof@lixom.net>
This series of patches contains one BUG fix for trace if
CONFIG_DEBUG_PREEMPT is enabled and a regression fix for omap1 FIQ
handling on ams-delta. Then there's a dts fix for missing SoC
compatible on ti81xx board dts files that did matter until we added
the clkctrl clocks and without that some clocks are now not found.
Then there are two logicpd-som-lv specific dts fixes that fix
misconfigured pins for WLAN and audio. Turns out we had to revert
the third one because it caused another regression for USB.
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Merge tag 'omap-for-v17/fixes-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Fixes for omap variants for v4.17
This series of patches contains one BUG fix for trace if
CONFIG_DEBUG_PREEMPT is enabled and a regression fix for omap1 FIQ
handling on ams-delta. Then there's a dts fix for missing SoC
compatible on ti81xx board dts files that did matter until we added
the clkctrl clocks and without that some clocks are now not found.
Then there are two logicpd-som-lv specific dts fixes that fix
misconfigured pins for WLAN and audio. Turns out we had to revert
the third one because it caused another regression for USB.
* tag 'omap-for-v17/fixes-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
Revert "ARM: dts: logicpd-som-lv: Fix pinmux controller references"
ARM: dts: correct missing "compatible" entry for ti81xx SoCs
ARM: OMAP1: ams-delta: fix deferred_fiq handler
ARM: dts: logicpd-som-lv: Fix pinmux controller references
ARM: dts: logicpd-som-lv: Fix Audio Mute
ARM: dts: logicpd-som-lv: Fix WL127x Startup Issues
ARM: OMAP2+: powerdomain: use raw_smp_processor_id() for trace
Signed-off-by: Olof Johansson <olof@lixom.net>
4.17, please pull the following:
- Clement fixes in an incorrect trigger type for the ARM global timers
on the Cygnus platforms
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Merge tag 'arm-soc/for-4.17/devicetree-fixes' of https://github.com/Broadcom/stblinux into fixes
This pull request contains Broadcom ARM-basec SoCs Device Tree fixes for
4.17, please pull the following:
- Clement fixes in an incorrect trigger type for the ARM global timers
on the Cygnus platforms
* tag 'arm-soc/for-4.17/devicetree-fixes' of https://github.com/Broadcom/stblinux:
ARM: dts: cygnus: fix irq type for arm global timer
Signed-off-by: Olof Johansson <olof@lixom.net>
This contains a single revert for a patch that was merged in v4.17-rc1
and that turns out to cause a regression on some boards. Further, the
original issue that the patch was supposed to fix seems to have
disappeared.
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Merge tag 'tegra-for-4.17-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into fixes
ARM: tegra: Device tree fixes for v4.17
This contains a single revert for a patch that was merged in v4.17-rc1
and that turns out to cause a regression on some boards. Further, the
original issue that the patch was supposed to fix seems to have
disappeared.
* tag 'tegra-for-4.17-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: dts: tegra20: Revert "Fix ULPI regression on Tegra20"
Signed-off-by: Olof Johansson <olof@lixom.net>
Fix LVDS output on Gen2 boards
Laurent Pincart says "This patch series fixes LVDS output support on the
Lager, Koelsh, Porter and Gose boards that broke in v4.17-rc1 due to the
combination of the R-Car DU LVDS driver rework and the DT move of all
on-SoC peripherals to a /soc node.
We could handle the problem in the R-Car DU LVDS DT backward compatibility
code, but that fix would only be used for v4.17 as in v4.18 the Gen2 DT
will move to the new LVDS DT bindings. I thus propose merging these three
patches in v4.17 already to fix the problem as this is the simplest
solution."
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Merge tag 'renesas-fixes-for-v4.17' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes
Renesas ARM Based SoC Fixes for v4.17
Fix LVDS output on Gen2 boards
Laurent Pincart says "This patch series fixes LVDS output support on the
Lager, Koelsh, Porter and Gose boards that broke in v4.17-rc1 due to the
combination of the R-Car DU LVDS driver rework and the DT move of all
on-SoC peripherals to a /soc node.
We could handle the problem in the R-Car DU LVDS DT backward compatibility
code, but that fix would only be used for v4.17 as in v4.18 the Gen2 DT
will move to the new LVDS DT bindings. I thus propose merging these three
patches in v4.17 already to fix the problem as this is the simplest
solution."
* tag 'renesas-fixes-for-v4.17' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: dts: r8a7793: Convert to new LVDS DT bindings
ARM: dts: r8a7791: Convert to new LVDS DT bindings
ARM: dts: r8a7790: Convert to new LVDS DT bindings
Signed-off-by: Olof Johansson <olof@lixom.net>
The mms114 binding [1] specifies that the 'x' and 'y' should be
called respectively 'touchscreen-size-x' and 'touchscreen-size-y'
in coherence with the touchscreen [2] binding.
Update the mms114 node for trats2 and trats dts according to the
binding.
[1] Documentation/devicetree/bindings/input/touchscreen/mms114.txt
[2] Documentation/devicetree/bindings/input/touchscreen/touchscreen.txt
Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
As no more user of soc_is_exynos{4,5} we can safely remove them.
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Lets remove static mapping of SCU SFR mainly used in CORTEX-A9 SoC based
boards. Instead use mapping from device tree node of SCU.
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
[mszyprow: rebased, added fallback to scu_a9_get_base() when no SCU DT
node is available, removed compatibility break warning, fixed non-SMP
build, keep SCU base mapping to avoid issues with calls from CPUidle]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
There are 3 scaler devices in Exynos5420 SoCs, all are a part of MSCL
power domain. MSCL power domain and SYSMMU controllers (two per each
scaler device) have been already added to exynos5420.dtsi earlier,
so bind them to newly added devices.
Signed-off-by: Andrzej Pietrasiewicz <andrzej.p@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
The DTC was warning a lot about unit names etc, I think I fixed
them all. Stopping to include skeleton.dtsi fixes the last one.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The NAS4220B has the second ATA interface up and running.
Activate it in the device tree.
Signed-off-by: Roman Yeryomin <roman@advem.lv>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
These machines need to be booted from very specific harddisk
partitions (as the D-Link DNS-313 boots specifically from
partition 4). Add the proper bootargs so that everything works
smoothly.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The flash on the DNS-313 needs to be probed as JEDEC, it does
not conform to the common CFI standard.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Using the blue LED for disk read and the orange LED for
disk write gives a better user experience.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
We just used one LED for "disk activity" but using the green
LED for disk read and the red LED for disk write gives a way
better user experience.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The bpf syscall and selftests conflicts were trivial
overlapping changes.
The r8169 change involved moving the added mdelay from 'net' into a
different function.
A TLS close bug fix overlapped with the splitting of the TLS state
into separate TX and RX parts. I just expanded the tests in the bug
fix from "ctx->conf == X" into "ctx->tx_conf == X && ctx->rx_conf
== X".
Signed-off-by: David S. Miller <davem@davemloft.net>
This new syntax is slightly better designed & uses "compatible" string.
For details see Documentation/devicetree/bindings/mtd/partition.txt .
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Add MT7623N reference board with eMMC. On the board, there is additional
external PHY ICPlus IP1001 transceiver available by port 5 on the MDIO
bus connectted with GMAC2.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Suggested-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Add MT7623A reference board with eMMC and NAND, respectively.
The both boards compared against MT7623N BPI-R2, we could see there are
UART[0-1] and USB2 being removed, I2C2 and SPI1 being added, I2C1, UART2
owning distinct pin usage and an extra WM8960 codec chip plugged into the
I2C1 offering the functionality of audio player and recorder through
SoC audio front-end engine (AFE).
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Suggested-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Add a common file for MT7623A SoC level DTS, indicating MT7623A only
has a specific definition for power domain. That causes we need to change
related consumers devices such as audio, ethernet, crypto, NAND, and USB
controller to grasp its own power domain it should belong to.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Move all possible setups for pio into SoC level DTSI file mt7623.dtsi in
order to introduce more boards such as official MT7623A reference boards
without copy-n-pasting almost the same content of nodes in pio into every
new file.
So, it should be better to reuse those nodes by consolidating them into
the common file mt7623.dtsi from the current existent DTS and allow new
DTS files to refer to them.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Since those LEDs are parts of PMIC MT6323, it is reasonable to merge
those LEDs node definition back into mt6323.dtsi. This way can improve
the reusability of those nodes among different boards with the same PMIC.
And LED is very much board specific and thus the mt6323.dtsi only includes
the parent node here and leave these child nodes in the board specific
dts file.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Cc: Lee Jones <lee.jones@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
add BTIF, HSDMA and SPI-NOR device nodes and enable it on relevant boards
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Fix below a lot of Warnings (unit_address_vs_reg) that dtc complains so
much for
Node /oscillator@1 has a unit name, but no reg property
Node /oscillator@0 has a unit name, but no reg property
Node /pinctrl@10005000/cir@0 has a unit name, but no reg property
Node /pinctrl@10005000/i2c@0 has a unit name, but no reg property
Node /pinctrl@10005000/i2c@1 has a unit name, but no reg property
Node /pinctrl@10005000/i2s@0 has a unit name, but no reg property
Node /pinctrl@10005000/i2s@1 has a unit name, but no reg property
Node /pinctrl@10005000/keys@0 has a unit name, but no reg property
Node /pinctrl@10005000/leds@0 has a unit name, but no reg property
Node /pinctrl@10005000/pwm@0 has a unit name, but no reg property
Node /pinctrl@10005000/spi@0 has a unit name, but no reg property
Node /pinctrl@10005000/uart@0 has a unit name, but no reg property
Node /pinctrl@10005000/uart@1 has a unit name, but no reg property
Node /pinctrl@10005000/uart@2 has a unit name, but no reg property
Node /ethernet@1b100000/mdio-bus/switch@0/ports has a reg or ranges
property, but no unit name
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
There is 2GB DDR3 available on bananapi-r2 board as [1] specified.
[1] http://www.banana-pi.org/r2.html
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Below two wrong nodes in existing DTS files would cause a fail boot since
in fact the address 0 is not the correct place the memory device locates
at.
memory {
device_type = "memory";
reg = <0x0 0x0 0x0 0x0>;
};
memory@80000000 {
reg = <0x0 0x80000000 0x0 0x40000000>;
};
In order to avoid having a memory node starting at address 0, we can't
include file skeleton64.dtsi and instead need to explicitly manually
define a few of properties the DTS relies on such as #address-cells
and #size-cells in root node and device_type in the node memory@80000000.
Cc: stable@vger.kernel.org
Fixes: 31ac0d69a1 ("ARM: dts: mediatek: add MT7623 basic support")
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
The latest DTC throws warnings for character '_' in the node names.
Warning (node_name_chars_strict): /pmu_a15: Character '_' not recommended in node name
Warning (node_name_chars_strict): /pmu_a7: Character '_' not recommended in node name
The general recommendation is to use character '-' for all the node names.
This patch fixes the warnings following the recommendation.
Acked-by: Liviu Dudau <liviu.dudau@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Commit 2cff6dba57 ("ARM: dts: vexpress: fix node name unit-address presence warnings")
removed the unit address as there was no associated reg property in
these sysreg nodes.
Also the latest DTC throws warnings for character '_' in the node names.
Warning (node_name_chars_strict): /sysreg@10000/sys_led: Character '_' not recommended in node name
Warning (node_name_chars_strict): /sysreg@10000/sys_mci: Character '_' not recommended in node name
Warning (node_name_chars_strict): /sysreg@10000/sys_flash: Character '_' not recommended in node name
The correct way to fix this as well as the original unit-address presence
warnings is to use the standard gpio controller binding and specify the
reg properties as per the hardware as it was before.
However note that Vexpress sysreg MFD driver will still continue to use
the hardcoded values for compatibility reasons.
Acked-by: Liviu Dudau <liviu.dudau@arm.com>
Suggested-by: Rob Herring <robh@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Add SY8106A regulator to r_i2c bus and enable the r_i2c bus on
Orange Pi PC, then set the power supply of the ARM cores to this
regulator, in order to enable DVFS.
Signed-off-by: Ondrej Jirman <megous@megous.com>
[Icenowy: Enable DVFS in this patch, slight changes and change commit
message]
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
According to "EP93xx User’s Guide" it's called I2SINTR and has number 60.
Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
The Tronsmart MXIII Plus is an Android TV box which uses the Amlogic
S812 (Meson8m2) SoC. It uses a Realtek RTL8211F RGMII Ethernet PHY as
well as a Ricoh RN5T618 system power controller. It also comes with an
Ampak AP6330 SDIO wifi/Bluetooth combo chip (support for wifi and
Bluetooth is currently not added because the Linux drivers currently
only support one MMC controller and that is used for the SD card).
Signed-off-by: Oleg Ivanov <balbes-150@yandex.ru>
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This adds the pins for uart_A, which is used to connect to the Bluetooth
module on some devices.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This adds a meson8m2.dtsi which simply inherits meson8.dtsi as both SoCs
share most peripherals.
The known differences are:
- Meson8m2's hardware video decoder additionally supports H.265 decoding
- Meson8m2 has the same Gigabit MAC as Meson8b (instead of the 10/100M
MAC that Meson8 uses)
- Meson8m2 uses the same watchdog register layout/bits as Meson8b (using
the Meson8 watchdog compatible leads to an infinite hang when
rebooting the machine)
- Meson8m2 uses the same SAR ADC register layout/bits as Meson8b.
However, it uses the temperature sensor calibration formula (and
registers) Meson8b which differ from Meson8. This however is currently
not supported by the meson-saradc driver yet.
- the pin controller is mostly compatible with Meson8, Meson8m2 has
an additional function on eight pins and removes the "VGA" function.
So there's a total of 10 pins which are slightly changed, which is why
there's a separate compatible for the pin controller
- a separate compatible for the clock controller is used because at
least the Mali clock tree (not supported yet) is the same as on GXBB
while Meson8 and Meson8b have a reduced/older version of the Mali
clock tree.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add the newly introduced compatible string for the Meson8m2 SoC.
The existing Meson8 Kconfig entry is updated to also provide support for
the Meson8m2 SoCs. The Meson8m2 SoC is mostly identical to the Meson8 SoC
with just a few peripherals being updated. Both SoCs currently
share the same pinctrl, clock and GPIO IRQ bindings. Thus the existing
Kconfig entry is re-used to avoid duplication (the only cost is building
a few extra DTBs).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Many node labels in the device tree (like serial0, serial1, etc) are being
redefined, so let's modernize the device tree by using phandles to
extend the existing nodes. This helps reduce the whitespace.
Signed-off-by: Adam Ford <aford173@gmail.com>
[nsekhar@ti.com: drop tps6507x related changes]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
The Odroid-C1 comes with an IR receiver. It is connected to the GPIOAO_7
pin and thus using the SoC's internal IR decoder.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This makes it easier to find existing nodes. No functional changes.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This matches licensing used by other BCM5301X files and is preferred as:
1) GPL 2.0+ makes is clearly compatible with Linux kernel
2) MIT is also permissive but preferred over ISC
This file were created and ever touched by a group of three people only:
Álvaro, Hauke and me.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
Acked-by: Álvaro Fernández Rojas <noltari@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
It's an access point based on BCM47094 SoC with two BCM4366E wireless
chipsets.
Signed-off-by: Dan Haab <dan.haab@luxul.com>
Acked-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Luxul XWR-3150 is a wireless router similar to the XWR-3100 except:
1) It has more RAM
2) Its NAND controller in running in BCH8 mode
3) LAN ports LEDs are hardware controlled
Signed-off-by: Dan Haab <dan.haab@luxul.com>
Acked-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
The 7278 device is the first device that includes support for the V7
memory map developed for use in 64-bit architecture brcmstb devices.
This map relocates the register physical offset from 0xF0000000 to
0x0000000008000000.
Since the ARM PERIPHBASE value is also relocated in the V7 memory map
we can use its value to determine whether this device uses the new
V7 memory map and therefore where to look for the SUN_TOP_CTRL
register used to identify the chip family.
Signed-off-by: Doug Berger <opendmb@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
This commit allows a Broadcom Brahma-B53 core to be detected when executing
an arm architecture kernel in aarch32 state.
Signed-off-by: Doug Berger <opendmb@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
The constants defined in this file are equally useful in assembly and C
source files. The arm64 architecture version of this file allows
inclusion in both assembly and C source files, so this commit adds
that capability to the arm architecture version so that the constants
don't need to be defined in multiple places.
Signed-off-by: Doug Berger <opendmb@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Mylène Josserand <mylene.josserand@bootlin.com>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
It is a bit unorthodox to just include a file in the middle of a another
DTS file, it breaks the pattern from other device trees and also makes
it really hard to reference things across the files with phandles.
Restructure the include for the Versatile Express motherboards to happen
at the top of the file, reference the target nodes directly, and indent
the motherboard .dtsi files to reflect their actual depth in the
hierarchy.
This is a purely syntactic change that result in the same DTB files from
the DTS/DTSI files.
Cc: Robin Murphy <robin.murphy@arm.com>
Cc: Liviu Dudau <liviu.dudau@arm.com>
Cc: Mali DP Maintainers <malidp@foss.arm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Add the use of enable-method property for SMP support which allows
to handle the SMP support for this specific SoC.
This commit adds enable-method properties to all CPU nodes.
Signed-off-by: Mylène Josserand <mylene.josserand@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The R_CPUCFG is a collection of registers needed for SMP bringup
on clusters and cluster's reset.
For the moment, documentation about this register is found in
Allwinner's code only.
Signed-off-by: Mylène Josserand <mylene.josserand@bootlin.com>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
As we found in sun9i-a80, CPUCFG is a collection of registers that are
mapped to the SoC's signals from each individual processor core and
associated peripherals.
These registers are used for SMP bringup and CPU hotplugging.
Signed-off-by: Mylène Josserand <mylene.josserand@bootlin.com>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
This way we have one central definition of it, and user can select it as
needed. The new option is not user visible, which is the behavior
it had in most architectures, with a few notable exceptions:
- On x86_64 and mips/loongson3 it used to be user selectable, but
defaulted to y. It now is unconditional, which seems like the right
thing for 64-bit architectures without guaranteed availablity of
IOMMUs.
- on powerpc the symbol is user selectable and defaults to n, but
many boards select it. This change assumes no working setup
required a manual selection, but if that turned out to be wrong
we'll have to add another select statement or two for the respective
boards.
Signed-off-by: Christoph Hellwig <hch@lst.de>
swiotlb is only used as a library of helper for xen-swiotlb if Xen support
is enabled on arm, so don't build it by default.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Define this symbol if the architecture either uses 64-bit pointers or the
PHYS_ADDR_T_64BIT is set. This covers 95% of the old arch magic. We only
need an additional select for Xen on ARM (why anyway?), and we now always
set ARCH_DMA_ADDR_T_64BIT on mips boards with 64-bit physical addressing
instead of only doing it when highmem is set.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: James Hogan <jhogan@kernel.org>
Instead select the PHYS_ADDR_T_64BIT for 32-bit architectures that need a
64-bit phys_addr_t type directly.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: James Hogan <jhogan@kernel.org>
This way we have one central definition of it, and user can select it as
needed. Note that we now also always select it when CONFIG_DMA_API_DEBUG
is select, which fixes some incorrect checks in a few network drivers.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
This way we have one central definition of it, and user can select it as
needed.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
This avoids selecting IOMMU_HELPER just for this function. And we only
use it once or twice in normal builds so this often even is a size
reduction.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Same EEPROM as on Koelsch, et al.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the support for A83T.
A83T SoC has an additional register than A80 to handle CPU configurations:
R_CPUS_CFG. Information about the register comes from Allwinner's BSP
driver.
An important difference is the Power Off Gating register for clusters
which is BIT(4) in case of SUN9I-A80 and BIT(0) in case of SUN8I-A83T.
There is also a bit swap between sun8i-a83t and sun9i-a80 that must be
handled.
Signed-off-by: Mylène Josserand <mylene.josserand@bootlin.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
To prepare the support of sun8i-a83t, add a field in the smp_data
structure to know if we are on sun9i-a80 or sun8i-a83t.
Add also a global variable to retrieve which architecture we are
having.
Signed-off-by: Mylène Josserand <mylene.josserand@bootlin.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
To prepare the support for sun8i-a83t, rename the macro that handles
the power-off of clusters because it is different from sun9i-a80 to
sun8i-a83t.
The power off register for clusters are different from a80 and a83t.
Signed-off-by: Mylène Josserand <mylene.josserand@bootlin.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Now that a common function is available for CNTVOFF's
initialization, let's convert shmobile-apmu code to use
this function.
Signed-off-by: Mylène Josserand <mylene.josserand@bootlin.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Add the initialization of CNTVOFF for sun8i-a83t.
For boot CPU, create a new machine that handles this
function's call in an "init_early" callback. We need to initialize
CNTVOFF before the arch timer's initialization otherwise, it will
not be taken into account and fails to boot correctly.
Because of that, this function can't be called in SMP's early_initcall
function which is called after timer's init.
For secondary CPUs, add this function into secondary_startup
assembly entry.
Signed-off-by: Mylène Josserand <mylene.josserand@bootlin.com>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The CNTVOFF register from arch timer is uninitialized.
It should be done by the bootloader but it is currently not the case,
even for boot CPU because this SoC is booting in secure mode.
It leads to an random offset value meaning that each CPU will have a
different time, which isn't working very well.
Add assembly code used for boot CPU and secondary CPU cores to make
sure that the CNTVOFF register is initialized. Because this code can
be used by different platforms, add this assembly file in ARM's common
folder.
Signed-off-by: Mylène Josserand <mylene.josserand@bootlin.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Move the assembly code for cluster cache enabling and resuming
into an assembly file instead of having it directly in C code.
Remove the CFLAGS because we are using the ARM directive "arch"
instead.
Signed-off-by: Mylène Josserand <mylene.josserand@bootlin.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The constants defined in this file are equally useful in assembly and C
source files. The arm64 architecture version of this file allows
inclusion in both assembly and C source files, so this commit adds
that capability to the arm architecture version so that the constants
don't need to be defined in multiple places.
Signed-off-by: Doug Berger <opendmb@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Mylène Josserand <mylene.josserand@bootlin.com>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
There is no arch specific code required for dma-debug, so there is no
need to opt into the support either.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Robin Murphy <robin.murphy@arm.com>
Most mainstream architectures are using 65536 entries, so lets stick to
that. If someone is really desperate to override it that can still be
done through <asm/dma-mapping.h>, but I'd rather see a really good
rationale for that.
dma_debug_init is now called as a core_initcall, which for many
architectures means much earlier, and provides dma-debug functionality
earlier in the boot process. This should be safe as it only relies
on the memory allocator already being available.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Robin Murphy <robin.murphy@arm.com>
Commit d50f4630c2 ("arm: dts: Remove p1010-flexcan compatible from imx
series dts") removed the fallback compatible "fsl,p1010-flexcan" from
the imx device trees. As the flexcan cores on i.MX25, i.MX35 and i.MX53
are identical, introduce the first as fallback for the two latter ones.
Fixes: d50f4630c2 ("arm: dts: Remove p1010-flexcan compatible from imx series dts")
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: linux-stable <stable@vger.kernel.org> # >= v4.16
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Minor conflict, a CHECK was placed into an if() statement
in net-next, whilst a newline was added to that CHECK
call in 'net'. Thanks to Daniel for the merge resolution.
Signed-off-by: David S. Miller <davem@davemloft.net>
Remove the usage of skeleton.dtsi to fix the DTC warnings:
arch/arm/boot/dts/s3c6410-mini6410.dtb: Warning (unit_address_vs_reg):
/memory: node has a reg or ranges property, but no unit name
arch/arm/boot/dts/s3c6410-smdk6410.dtb: Warning (unit_address_vs_reg):
/memory: node has a reg or ranges property, but no unit name
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Remove the usage of skeleton.dtsi to fix the DTC warning:
arch/arm/boot/dts/s3c2416-smdk2416.dtb: Warning (unit_address_vs_reg):
/memory: node has a reg or ranges property, but no unit name
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
As per ARM documentation
PPI(0) ID27 - global timer interrupt is rising-edge sensitive.
set IRQ triggering type to IRQ_TYPE_EDGE_RISING for ARM Global timers.
Fixes: c9ad7bc5fe ("ARM: dts: Enable Broadcom Cygnus SoC")
Signed-off-by: Clément Péron <peron.clem@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
This matches licensing used by other BCM5301X files and is preferred as:
1) GPL 2.0+ makes is clearly compatible with Linux kernel
2) MIT is also permissive but preferred over ISC
These files were created and ever touched by a group of four people
only: Felix, INAGAKI, Hauke and me.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Felix Fietkau <nbd@nbd.name>
Acked-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
This was used by the ide, scsi and networking code in the past to
determine if they should bounce payloads. Now that the dma mapping
always have to support dma to all physical memory (thanks to swiotlb
for non-iommu systems) there is no need to this crude hack any more.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Palmer Dabbelt <palmer@sifive.com> (for riscv)
Reviewed-by: Jens Axboe <axboe@kernel.dk>
Currently the following error is seen from the CAAM driver:
caam 30900000.caam: device ID = 0x0a16030000000000 (Era -524)
Pass the 'fsl,sec-era' property to properly describe the
era information.
This error happens because the 'fsl,sec-era' is not passed via
device tree.
The era information is used in various places inside drivers/crypto/caam,
so pass the correct version via device tree.
Fixes: 0eeabcad7d ("ARM: dts: imx7s: add CAAM device node")
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The 66AK2G evm has support for dcan.
Add nodes and pinmuxes for dcan0 and dcan1.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
Commit 4c9a27a6c6 ("ARM: tegra: Fix ULPI regression on Tegra20") changed
"ulpi-link" clock from CDEV2 to PLL_P_OUT4. Turned out that PLL_P_OUT4 is
the parent of CDEV2 clock and original clock setup of "ulpi-link" was
correct. The reverted patch was fixing USB for one board and broke the
other, now Tegra's clk driver correctly sets parent for the CDEV2 clock
and hence patch could be reverted safely, restoring USB for all of the
boards.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Marcel Ziswiler <marcel@ziswiler.com>
Tested-by: Marcel Ziswiler <marcel@ziswiler.com>
Tested-by: Marc Dietrich <marvin24@gmx.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The U8540 was an evolved version of the U8500, but it was never
mass produced or put into products, only reference designs exist.
The upstream support was never completed and it is unlikely that
this will happen so drop the support for now to simplify
maintenance of the U8500.
Cc: Loic Pallardy <loic.pallardy@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
These systems are not plentiful and do not have any
strict memory constraints. Cut down the configurability
and select what is needed for all of them so they simply boot,
keeping only the UX500_SOC_DB8500 symbol which is used
elsewhere in the kernel for now, but default it to y.
Cc: Loic Pallardy <loic.pallardy@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The U8540 was an evolved version of the U8500, but it was never
mass produced or put into products, only reference designs exist.
The upstream support was never completed and it is unlikely that
this will happen so drop the support for now to simplify
maintenance of the U8500.
Cc: Loic Pallardy <loic.pallardy@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
LPTimer pwm cells should be updated to 3, to allow initialization of
channel, period and polarity.
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Add display support on the stm32f469-disco board.
Signed-off-by: Philippe Cornu <philippe.cornu@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
In the stm32f4 family, mipi dsi is only supported on stm32f469.
So add a new stm32f469 dtsi file & add mipi dsi support inside.
Signed-off-by: Philippe Cornu <philippe.cornu@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Since commit 83a86fbb5b ("irqchip/gic: Loudly complain about
the use of IRQ_TYPE_NONE"), a warning is raised if IRQ_TYPE_NONE is used.
So we use IRQ_TYPE_LEVEL_HIGH for usart nodes instead of IRQ_TYPE_NONE.
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Tested-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Fix DTC warnings for stm32mp157:
Warning (unit_address_vs_reg): /soc/pin-controller: node has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): /soc/pin-controller/uart4@0: node has a unit name, but no reg property
Warning (unit_address_vs_reg): /soc/pin-controller-z: node has a reg or ranges property, but no unit name
Warning (unit_address_vs_reg): /memory: node has a reg or ranges property, but no unit name
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
This patch adds flash nor on qspi. Each flash is
connected in quad mode and has its own chip select.
Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
This patch adds qspi support on stm32mp157c,
read in memory mapped, write in indirect mode.
Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Add support for USBH (USB Host) to STM32MP157C SoC.
USBH is a USB Host controller supporting the standard registers used for
full- and low-speed (OHCI controller) and high-speed (EHCI controller).
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
This patch enables USBPHYC (USB PHY Controller) on stm32mp157c-ev1.
This enables the two usbphyc usb2 ports.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Add support for USBPHYC (USB PHY Controller) to STM32MP157C SoC.
It manages two usb2 ports.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Add support for the display controller ltdc.
Signed-off-by: yannick fertre <yannick.fertre@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
These files were created and ever touched by a group of three people
only: Dan, Hauke and me. They were licensed under GNU/GPL or ISC.
Introducing and discussing SPDX-License-Identifier resulted in a
conclusion that ISC is a not recommended license (see also a
license-rules.rst). Moveover an old e-mail from Alan Cox was pointed
which explained that dual licensing is a safer solution than depending
on a common compatibility belief.
This commit switches most of BCM5301X DTS files to dual licensing using:
1) GPL 2.0+ to make sure they are compatible with Linux kernel
2) MIT to allow sharing with more permissive projects
Both licenses belong to the preferred ones (see LICENSES/preferred/).
An attempt to relicense remaining files will be made separately and will
require approve from more/other developers.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
Acked-by: Dan Haab <dan.haab@luxul.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Since LD_ABS/LD_IND instructions are now removed from the core and
reimplemented through a combination of inlined BPF instructions and
a slow-path helper, we can get rid of the complexity from arm32 JIT.
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Acked-by: Alexei Starovoitov <ast@kernel.org>
Signed-off-by: Alexei Starovoitov <ast@kernel.org>
Improve the DTS files by removing all the leading "0x" and zeros to fix the
following dtc warnings:
Warning (unit_address_format): Node /XXX unit name should not have leading "0x"
Warning (unit_address_format): Node /XXX unit name should not have leading 0s
Converted using the following command:
find arch/arm/boot/dts -type f \( -iname "*.dts" -o -iname "*.dtsi" \) -exec sed -i \
-e "s/@\([0-9a-fA-FxX\.;:#]\+\)\s*{/@\L\1 {/g" -e "s/@0x\(.*\) {/@\1 \
{/g" -e "s/@0\+\(.\+\) {/@\1 {/g" {} +
For simplicity, two sed expressions were used to solve each warnings separately.
To make the regex expression more robust a few other issues were resolved,
namely setting unit-address to lower case, and adding a whitespace before the
the opening curly brace: https://elinux.org/Device_Tree_Linux#Linux_conventions
This will solve also a side effect warning:
Warning (simple_bus_reg): Node /XXX@<UPPER> simple-bus unit address format error, expected "<lower>"
This is a follow up to commit 4c9847b737 ("dt-bindings: Remove leading 0x from bindings notation")
Reported-by: David Daney <ddaney@caviumnetworks.com>
Suggested-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mathieu Malaterre <malat@debian.org>
[krzk: Rerun the command to include few more changes, adjust the commit msg]
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
While the supported UHS mode can be obtained from CAPA2
register, SD Host Controller Standard Specification
doesn't define bits for MMC's HS200 and DDR mode capability.
Add properties to indicate MMC HS200 and DDR speed mode capability in
dt node.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Use sdhci-omap programming model based on the generic sdhci
library for programming the eMMC/SD/SDIO controller.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add support for WLAN using wilink8 module. On dra76-evm, MMC4 is
used for connecting to wilink8 module.
Signed-off-by: Vishal Mahaveer <vishalm@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The wilink module is a combo wireless connectivity sdio
card based on Texas Instrument's wl18xx solution. It is a
4-wire, 1.8V, embedded sdio wlan device with an external
irq line and is power-controlled by a gpio-based fixed
regulator.
Add pinmux configuration and IODelay values for MMC4.
On dra7-evm, MMC4 is used for connecting to wilink module.
IODelay data credits to : Vishal Mahaveer <vishalm@ti.com>
and Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Ido Yariv <ido@wizery.com>
Signed-off-by: Eyal Reizer <eyalr@ti.com>
Signed-off-by: Hari Nagalla <hnagalla@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
On TI's DRA74x EVM, EVM_3V6 is connected is connected to the VBAT line
of the wilink card. Model it here so that it can be used while adding
wilink8 WLAN support.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Wilink8 module is a combo wireless connectivity card based
on Texas Instrument's wl18xx solution.
Add support for the wlan capabilities of this module by muxing
the relevant mmc lines, and setting the required device-tree
data.
Signed-off-by: Eyal Reizer <eyalr@ti.com>
Signed-off-by: Hari Nagalla <hnagalla@ti.com>
[nsekhar@ti.com: drop WLAN_EN pinmux. It should be done by bootloader.
Also, some commit message adjustments]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The IO lines of MMC2 in am57xx-beagle-x15/am57xx-idk is connected to
3.3v. Use "ddr_3_3v" instead of "ddr_1_8v" to indicate DDR mode
works in 3.3v on these boards.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Include dra76x-mmc-iodelay.dtsi which has pinmux and IODelay
configuration values for the various MMC modes for am574x SoC
and use it in the pinctrl properties of MMC devicetree
nodes present in am574x-idk.dts.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
commit 0e43884cca ("ARM: dts: dra71-evm: Select pull
down for mmc1_clk line in default mode") modified mmc1_pins_default
pinctrl group in dra71-evm.dts to change the CLK line to
PIN_INPUT_PULLDOWN. However instead of changing the pinctrl group,
use the new pinctrl group "mmc1_pins_default_no_clk_pu" in
dra7-mmc-iodelay.dtsi added specifically to be used for CLK line
without external pull up.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
commit 18aa0f4bca ("ARM: dts: am57xx-idk: Select pull down
for mmc1_clk line in default mode") modified mmc1_pins_default
pinctrl group in am57xx-idk-common.dtsi in order to change the CLK
line to PIN_INPUT_PULLDOWN. However instead of modifying the pinctrl
group, use the new pinctrl group "mmc1_pins_default_no_clk_pu" in
dra7-mmc-iodelay.dtsi added specifically to be used for CLK line without
external pull up.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
During a short period when the bus voltage is switched from 3.3v to 1.8v,
(to enumerate UHS mode), the mmc module is disabled and the mmc IO lines
are kept in a state according to the programmed pad mux pull type.
According to 4.2.4.2 Timing to Switch Signal Voltage in "SD Specifications
Part 1 Physical Layer Specification Version 5.00 February 22, 2016", the
host should hold CLK low for at least 5ms.
In order to keep the card line low during voltage switch, the pad mux of
mmc1_clk line should be configured to pull down.
Add a new pinctrl group for clock line without pullup to be used in boards
where mmc1_clk line is not connected to an external pullup.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add "vqmmc-supply" property for mmc2 to indicate the supply connected
to the IO lines.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
mmc specific pinmux is selected from dra72x-mmc-iodelay.dtsi, so remove
it from dra72-evm-common.dtsi.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The missing "compatible" entries are needed by drivers/clk/ti/clkctrl.c,
and without them the structures initialized in drivers/clk/ti/clk-814x.c
are not passed to configuration code. The result is a "not found from
clkctrl data" error message, although boot proceeds anyway.
The reason why the compatible is not found is because the board specific
files override the SoC compatible without including it. This did not
cause any issues until with the clkctrl nodes got introduced.
Very lightly tested on a (lurching) AM3874 design that's in the middle
of a kernel upgrade from TI's abandoned 2.6.37 tree.
Also tested on j5eco-evm and hp-t410 to verify the clkctrl clocks are
found.
Fixes: bb30465b59 ("ARM: dts: dm814x: add clkctrl nodes")
Fixes: 80a06c0d83 ("ARM: dts: dm816x: add clkctrl nodes")
Signed-off-by: Graeme Smecher <gsmecher@threespeedlogic.com>
[tony: updated to fix for 8168-evm, updated comments]
Signed-off-by: Tony Lindgren <tony@atomide.com>
The deferred_fiq handler used to limit hardware operations to IRQ
unmask only, relying on gpio-omap assigned handler performing the ACKs.
Since commit 80ac93c274 ("gpio: omap: Fix lost edge interrupts") this
is no longer the case as handle_edge_irq() has been replaced with
handle_simmple_irq() which doesn't touch the hardware.
Add single ACK operation per each active IRQ pin to the handler. While
being at it, move unmask operation out of irq_counter loop so it is
also called only once for each active IRQ pin.
Fixes: 80ac93c274 ("gpio: omap: Fix lost edge interrupts")
Signed-off-by: Janusz Krzysztofik <jmkrzyszt@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
These definitions are hex, and the old value (decimal 40) doesn't make
sense in the context. I do not have a T410 and cannot test if this makes
any practical difference.
Fixes: f24f1bdc02 ("ARM: dts: Enable emmc on hp t410")
signed-off-by: Graeme Smecher <gsmecher@threespeedlogic.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This is not needed since commit fcbb1e02ee ("drivers: thermal:
Remove ARCH_HAS_BANDGAP dependency for samsung") from 2014.
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Turns out the compatible "nvidia,tegra124-hsuart" does not (yet) exist
and everybody else also uses it only in conjunction with
"nvidia,tegra30-hsuart".
Reported-by: Martin Šafařík <msafarik@retia.cz>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The Exynos5440 is not actively developed, there are no development
boards available and probably there are no real products with it.
Remove wide-tree support for Exynos5440.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
The Exynos5440 (quad-core A15 with GMAC, PCIe, SATA) was targeting
server platforms but it did not make it to the market really. There are
no development boards with it and probably there are no real products
neither. The development for Exynos5440 ended in 2013 and since then
the platform is in maintenance mode.
Remove all Device Tree sources for Exynos5440, as first step of removal
of the platform to simplify the code and drivers.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Andi Shyti <andi@etezian.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Add support for DAC (Digital to Analog Converter) to STM32MP157C.
STM32MP157C DAC has two output channels.
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Add LPtimer definitions, depending on features they provide:
- lptimer1 & 2 can act as PWM, trigger and encoder/counter
- lptimer3 can act as PWM and trigger
- lptimer4 & 5 can act as PWM
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
stm32mp157c has vrefbuf regulator that can provide analog reference
voltage from 1500mV to 2500mV.
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Enable timer 6 on stm32mp157c-ed1 that can serve as trigger for
ADC for instance.
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
stm32mp157c evaluation board has TIM2_CH4, TIM8_CH4 and TIM12_CH1
available on GPIO expansion connector.
Add PWM and associated triggers (for ADC/DAC) on these timers.
Keep them disabled so these pins can be used as GPIOs by default.
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
On i.MX6SX SabreAuto board, there is external 24MHz clock
source for analog clock2, add this clock source to clock tree
and remove "clocks" container for all input clocks.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Trivial fix to spelling mistake in status text string
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
dm644x_init_devices() is unnecessarily implemented as a
postcore_initcall().
This does not cause any issues now, but creates issues when
converting to common clock framework where clocks themselves
become platform devices and are initialized later. Because of
this, device clock acquisition and runtime PM on that device
fails.
Move the call to .init_machine() callback along with rest of
platform device's registration.
While at it, convert it to return void since return value is
ignored by caller anyway.
Reviewed-by: David Lechner <david@lechnology.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
All platforms now use the core_chipsel field in platform_data. Stop
using pdev->id in the aemif code.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
We now have the core_chipsel field in davinci_nand_pdata. Use it
instead of the platform_device id number.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
We now have the core_chipsel field in davinci_nand_pdata. Use it
instead of the platform_device id number.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
We now have the core_chipsel field in davinci_nand_pdata. Use it
instead of the platform_device id number.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
We now have the core_chipsel field in davinci_nand_pdata. Use it
instead of the platform_device id number.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
We now have the core_chipsel field in davinci_nand_pdata. Use it
instead of the platform_device id number.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
We now have the core_chipsel field in davinci_nand_pdata. Use it
instead of the platform_device id number.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
We now have the core_chipsel field in davinci_nand_pdata. Use it
instead of the platform_device id number.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
We now have the core_chipsel field in davinci_nand_pdata. Use it
instead of the platform_device id number.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
We now have the core_chipsel field in davinci_nand_pdata. Use it
instead of the platform_device id number.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
The GPIO chip is called davinci_gpio.0 in legacy mode. Fix it, so that
I2C can correctly lookup the recovery gpios.
Note that it is the gpio-davinci driver that sets the gpiochip label to
davinci_gpio.0.
Also, the I2C device uses an id of 1 on DM644x and DM355.
While at it, convert to using GPIO_TO_PIN() for referring to GPIO pin
numbers, like it is done in rest of the board support files.
Fixes: e535376537 ("i2c/ARM: davinci: Deep refactoring of I2C recovery")
Reviewed-by: David Lechner <david@lechnology.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Convert boilerplate license statement into proper SPDX identifier style.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Cc: Philippe Ombredanne <pombredanne@nexb.com>
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
The canonical compatible string is "atmel,maxtouch", let's use it. Also,
change the node name to be "touchscreen" rather than driver name.
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Add CAAM support on i.MX6UL.
Also, since CAAM is not available on i.MX6ULL the CAAM node
needs to be deleted in the imx6ull.dtsi.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The gpio_keys node does not have an address and thus does not need
address-cells or address size-properties.
This is flagged by dtc as follows:
# make dtbs W=1
arch/arm/boot/dts/emev2-kzm9d.dtb: Warning (avoid_unnecessary_addr_size): /gpio_keys: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
The vin port node does not have an address and thus does not need
address-cells or address size-properties.
This is flagged by dtc as follows:
# make dtbs W=1
arch/arm/boot/dts/r8a7794-silk.dtb: Warning (avoid_unnecessary_addr_size): /soc/video@e6ef0000/port: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
The vin port node does not have an address and thus does not need
address-cells or address size-properties.
This is flagged by dtc as follows:
# make dtbs W=1
arch/arm/boot/dts/r8a7794-alt.dtb: Warning (avoid_unnecessary_addr_size): /soc/video@e6ef0000/port: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
The vin port nodes does not have an address and thus does not need
address-cells or address size-properties.
This is flagged by dtc as follows:
# make dtbs W=1
arch/arm/boot/dts/r8a7791-koelsch.dtb: Warning (avoid_unnecessary_addr_size): /soc/video@e6ef0000/port: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
arch/arm/boot/dts/r8a7791-koelsch.dtb: Warning (avoid_unnecessary_addr_size): /soc/video@e6ef1000/port: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
The vin port nodes does not have an address and thus does not need
address-cells or address size-properties.
This is flagged by dtc as follows:
# make dtbs W=1
arch/arm/boot/dts/r8a7793-gose.dtb: Warning (avoid_unnecessary_addr_size): /soc/video@e6ef0000/port: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
arch/arm/boot/dts/r8a7793-gose.dtb: Warning (avoid_unnecessary_addr_size): /soc/video@e6ef1000/port: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
The vin port node does not have an address and thus does not need
address-cells or address size-properties.
This is flagged by dtc as follows:
# make dtbs W=1
arch/arm/boot/dts/r8a7791-porter.dtb: Warning (avoid_unnecessary_addr_size): /soc/video@e6ef0000/port: unnecessary #address-cells/#size-cells without
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
The vin port node does not have an address and thus does not need
address-cells or address size-properties.
This is flagged by dtc as follows:
# make dtbs W=1
arch/arm/boot/dts/r8a7790-lager.dtb: Warning (avoid_unnecessary_addr_size): /soc/video@e6ef1000/port: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
The pinmux controllers do not themselves need references to
'pinctrl-names' or 'pinctrl-0'
This patch removes some unnecessary typos.
Fixes: 89077c7145 ("ARM: dts: Add HSUSB2 EHCI Support to Logic PD DM37xx
SOM-LV")
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
- The n810 uses tlv320aic33 codec.
- GPIO118 is used as reset GPIO for the codec, which was missing.
- The MCLK of the codec is connected to the SYS_CLKOUT2 of omap2420. The
SYS_CLKOUT2 needs to be running at 12MHz.
- Add the pinctrl entries to configure the pins for GPIO118 and SYS_CLKOUT2
- Set DMIC clk mode for GPIO1
- Set DMIC data in for GPIO2
- Select 2V for the DMIC bias
- Add fixed regulators for the codec
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
McBSP2 is used with the tlv320aic33 codec for audio.
Pin mux change is needed to get the needed signals in/out from the SoC.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Tested-by: Jarkko Nikula <jarkko.nikula@bitmer.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
According to the documentation the interrupt line is active low.
The patch will silence the warning from gic_irq_domain_translate():
"Make it clear that broken DTs are... broken"
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Reviewed-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
According to the documentation the interrupt line is active low.
The patch will silence the warning from gic_irq_domain_translate():
"Make it clear that broken DTs are... broken"
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Reviewed-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
According to the documentation the interrupt line is active low.
The patch will silence the warning from gic_irq_domain_translate():
"Make it clear that broken DTs are... broken"
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Reviewed-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
According to the documentation the interrupt line is active low.
The patch will silence the warning from gic_irq_domain_translate():
"Make it clear that broken DTs are... broken"
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Reviewed-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
PocketBeagle is an ultra-tiny-yet-complete open-source USB-key-fob computer.
This board family can be indentified by the A335PBGL in the at24 eeprom:
A2: [aa 55 33 ee 41 33 33 35 50 42 47 4c 30 30 41 32 |.U3.A335PBGL00A2|]
http://beagleboard.org/pockethttps://github.com/beagleboard/pocketbeagle
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
CC: Tony Lindgren <tony@atomide.com>
CC: Jason Kridner <jkridner@beagleboard.org>
CC: Drew Fustini <drew@beagleboard.org>
CC: Peter Robinson <pbrobinson@redhat.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
am335x-evm, am335x-evmsk and am335x-beaglebone are currently relying on
pinmux set by the bootloader to set the correct value for mmc1. Fix
this by adding pinmux data for the same in kernel.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The board uses 26MHz oscillator for the twl4030 HFCLK.
This way we will not depend on the bootloader to configure the
CFG_BOOT:HFCLK_FREQ
Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The board uses 26MHz oscillator for the twl4030 HFCLK.
This way we will not depend on the bootloader to configure the
CFG_BOOT:HFCLK_FREQ
Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The board uses 26MHz oscillator for the twl4030 HFCLK.
This way we will not depend on the bootloader to configure the
CFG_BOOT:HFCLK_FREQ
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
We want to work towards phasing out the at24_platform_data structure.
There are few users and its contents can be represented using generic
device properties. Using device properties only will allow us to
significantly simplify the at24 configuration code.
Remove the at24_platform_data structure and replace it with an array
of property entries. Drop the byte_len/size property, as the model name
already implies the EEPROM's size.
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The OMAP35 and DM3730 SOM-LV contains a TSC2004 touch screen
controller connected to I2C3. This patch adds support for this
controller.
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The Audio has worked, but the mute pin has a weak pulldown which alows
some of the audio signal to pass very quietly. This patch fixes
that so the mute pin is actively driven high for mute or low for normal
operation.
Fixes: ab8dd3aed0 ("ARM: DTS: Add minimal Support for Logic
PD DM3730 SOM-LV")
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The VAUX3 rail from the PMIC powers a clock driver which clocks
the WL127x. This corrects a bug which did not correctly associate
the vin-supply with the proper power rail.
This also fixes a typo in the pinmuxing to properly configure the
interrupt pin.
Fixes: ab8dd3aed0 ("ARM: DTS: Add minimal Support for Logic PD
DM3730 SOM-LV")
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
smp_processor_id() checks preemption if CONFIG_DEBUG_PREEMPT is enabled,
causing a warning dump during boot:
[ 5.042377] BUG: using smp_processor_id() in preemptible [00000000] code: swapper/0/1
[ 5.050281] caller is pwrdm_set_next_pwrst+0x48/0x88
[ 5.055330] CPU: 1 PID: 1 Comm: swapper/0 Not tainted 4.14.24-g57341df0b4 #1
Use the raw_smp_processor_id() for the trace instead, this value does
not need to be perfectly correct. The alternative of disabling preempt
is too heavy weight operation to be applied in PM hot path for just
tracing purposes.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Since commit 09f3756bb9 ("dm9000: Return an ERR_PTR() in all
error conditions of dm9000_parse_dt()"), passing either non-NULL
platform data or device-tree for dm9000 driver to probe is
mandatory.
DM335 board was using none, so networking failed to initialize.
Fix it by passing non-NULL (but empty) platform data.
Fixes: 09f3756bb9 ("dm9000: Return an ERR_PTR() in all error conditions of dm9000_parse_dt()")
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
commit c4dc56be7e ("ARM: davinci: fix the GPIO lookup for omapl138-hawk")
fixed the GPIO chip name for look-up of MMC/SD CD and WP pins, but forgot
to change the GPIO numbers passed.
The GPIO numbers are not offsets from within a 32 GPIO bank. Fix the
GPIO numbers as well as remove the misleading comment.
Fixes: c4dc56be7e ("ARM: davinci: fix the GPIO lookup for omapl138-hawk")
Reviewed-by: David Lechner <david@lechnology.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
The GPIO chip is called davinci_gpio.0 in legacy mode. Fix it, so that
mmc can correctly lookup the wp and cp gpios. Also fix the GPIO numbers
as they are not offsets within a bank.
Note that it is the gpio-davinci driver that sets the gpiochip label to
davinci_gpio.0.
Fixes: bdf0e8364f ("ARM: davinci: da850-evm: use gpio descriptor for mmc pins")
Reviewed-by: David Lechner <david@lechnology.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
The GPIO chip is called davinci_gpio.0 in legacy mode. Fix it, so that
mmc can correctly lookup the wp and cp gpios. Also fix the GPIO numbers
as they are not offsets within a bank.
Note that it is the gpio-davinci driver that sets the gpiochip label to
davinci_gpio.0.
Fixes: b5e1438cf9 ("ARM: davinci: da830-evm: use gpio descriptor for mmc pins")
Reported-by: David Lechner <david@lechnology.com>
Reviewed-by: David Lechner <david@lechnology.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Commit 5d3b50d3c0 ("ARM: dts: renesas: r8a7790: Add FDP1 instances")
introduced the FDP1 for the r8a7790, but broke the sort ordering of the
device tree nodes.
Move the last VSP up to it's peers to correct the ordering.
Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
We can initialize almost everything at normal module_init time with
ti-sysc except for clocks and timers. To prepare for that, let's make
display init into device_initcall as otherwise we'll be calling
of_platform_populate() before the parent has probed.
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
There's no need to probe devices until at module_init time and we
currently have at least PM trying to use I2C for PMICs early on.
As only a part of the SoC init_early is SoC specific, we only need to call
the SoC specific PM init function. And we can modify omap2_common_pm_late_init()
so it becomes a late_initcall().
Note that this changes am335x to call omap2_clk_enable_autoidle_all() that
seems to be missing currently.
Cc: Keerthy <j-keerthy@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
We still have some SDMA probing using omap_device_build() for the
arch/arm/plat-omap/dma.c part that the dmaengine driver then uses.
So we still need to ensure that omap_device_build() works even if we
probe and manage the dmaengine driver via ti-sysc. And we don't want
to call dev_pm_domain_set() as otherwise we'd also have omap_device
try to manage the hardware in addition to ti-sysc.
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
We currently don't know if a revision register exists or not. Zero is
often a valid offset for the revision register. As we are still checking
device tree data against platform data, we will get bogus warnings with
correct device tree data because of incomplete platform data.
Let's fix the issue by using signed offsets and tag the revision registers
that don't exist with -ENODEV, and init the missing ones with the correct
revision register offset.
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
If a system timer is configured with an interrconnect target module in
the dts, the ti,hwmods and module fck are at the interconnect target
level. Then there's a separate fck for the timer child device.
If the child device has a separate functional clock, we need to configure
it directly. For example, timer clk clkctrl clock bit 0 is the module
clock for the interconnect target, and bit 24 being the functional clock
for the timer IP.
For system timers, we already mark them as disabled. Now must also mark
the interconnect target module as disabled to prevent ti-sysc to manage
it instead of the system timer.
Cc: Keerthy <j-keerthy@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Define the iW-RainboW-G23S board dependent part of the
EtherAVB device node.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Chris Paterson <chris.paterson2@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Define the generic R8A77470 part of the EtherAVB device node.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Chris Paterson <chris.paterson2@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
There is a random number generator that updates a register in the SCU
every second. This is compatible with the timeriomem rng driver in the
kernel.
From the timeriomem_rng bindings:
quality: estimated number of bits of true entropy per 1024 bits read
from the rng. Defaults to zero which causes the kernel's default
quality to be used instead. Note that the default quality is usually
zero which disables using this rng to automatically fill the kernel's
entropy pool.
As to the recommended value for us to use:
Rick Altherr <raltherr@google.com> wrote:
> Quality is #bit of entropy per 1000 bits read. 100 is a
> conservative value that was suggested by those in the know.
Signed-off-by: Joel Stanley <joel@jms.id.au>
The "dp-controller" node is not a bus and it does not have children with
reg/ranges properties so remove address-cells and size-cells properties.
This fixes warnings for all Exynos5 boards:
arch/arm/boot/dts/exynos5250-arndale.dtb: Warning (avoid_unnecessary_addr_size):
/soc/dp-controller@145b0000: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
exynos4412-midas.dtsi is base for galaxy-s3.dtsi and n710x.dts. All of
them contain fixed regulators named "voltage-regulator-X". Their
indexes got mixed up while splitting common code in commit c769eaf7a8
("ARM: dts: exynos: Split Trats2 DTS in preparation for Midas boards").
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Consistently put fixed regulators directly below root node, instead of
artificial "regulators" node in Exynos4210 Origen and Exynos4412 N710x.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
The children of gpio_keys node do not have reg/ranges properties so remove
address-cells and size-cells properties. This fixes warnings for
Exynos4210 Origen:
arch/arm/boot/dts/exynos4210-origen.dtb: Warning (avoid_unnecessary_addr_size):
/gpio_keys: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
The children of regulators node do not have reg/ranges properties. Move the
children up one level, get rid of regulators node and remove
address-cells and size-cells properties. This fixes warnings for
Exynos4412 Midas family boards:
arch/arm/boot/dts/exynos4412-i9300.dtb: Warning (avoid_unnecessary_addr_size):
/regulators: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
arch/arm/boot/dts/exynos4412-i9305.dtb: Warning (avoid_unnecessary_addr_size):
/regulators: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
arch/arm/boot/dts/exynos4412-n710x.dtb: Warning (avoid_unnecessary_addr_size):
/regulators: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
ARM:
- PSCI selection API, a leftover from 4.16 (for stable)
- Kick vcpu on active interrupt affinity change
- Plug a VMID allocation race on oversubscribed systems
- Silence debug messages
- Update Christoffer's email address (linaro -> arm)
x86:
- Expose userspace-relevant bits of a newly added feature
- Fix TLB flushing on VMX with VPID, but without EPT
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rMerge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm
Pull KVM fixes from Radim Krčmář:
"ARM:
- PSCI selection API, a leftover from 4.16 (for stable)
- Kick vcpu on active interrupt affinity change
- Plug a VMID allocation race on oversubscribed systems
- Silence debug messages
- Update Christoffer's email address (linaro -> arm)
x86:
- Expose userspace-relevant bits of a newly added feature
- Fix TLB flushing on VMX with VPID, but without EPT"
* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm:
x86/headers/UAPI: Move DISABLE_EXITS KVM capability bits to the UAPI
kvm: apic: Flush TLB after APIC mode/address change if VPIDs are in use
arm/arm64: KVM: Add PSCI version selection API
KVM: arm/arm64: vgic: Kick new VCPU on interrupt migration
arm64: KVM: Demote SVE and LORegion warnings to debug only
MAINTAINERS: Update e-mail address for Christoffer Dall
KVM: arm/arm64: Close VMID generation race
Enable the performance monitor unit on Meson8b.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Enable the performance monitor unit on Meson8.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This enables the Amlogic Meson PWM controller. It is used for a dimmable
LED on some devices. Additionally some devices use it to generate the
32.768 kHz (low power oscillator) clock.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Some boards come with a PMIC (system power controller, for example Ricoh
RN5T618) which is connected through I2C.
Enable the Meson I2C driver so the devices on the I2C bus can be
registered during boot.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add PWM and trigger support to stm32mp157c.
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
This updates the Gemini defconfig with a config that will bring
up most of the recently merged and updated devices to some
functional level:
- We enable high resolution timers (the right thing to do)
- Enable CMA for the framebuffer, and the new TVE200
framebuffer driver and the Ilitek ILI9322 driver for
graphics on the D-Link DIR-685. HIGHMEM support comes in
as part of this.
- Enable networking and the new Cortina Gemini ethernet
driver.
- Enable MDIO over GPIO and the Realtek PHY devices used on
several of these systems.
- Enable I2C over GPIO and SPI over GPIO which is used on
several of these devices.
- Enable the Thermal framework, GPIO fan control and LM75 sensor
adding cooling on the D-Link DNS-313 with no userspace
involved even if only the kernel is working, rock solid
thermal for this platform.
- Enable JEDEC flash probing to support the Eon flash chip in
D-Link DNS-313.
- Enable LED disk triggers for the NAS type devices.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
One of the bitbanged SPI hosts had wrongly named GPIO lines due to
sloppiness by yours truly.
Cc: arm@kernel.org
Cc: Mark Brown <broonie@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fix a build regression with split object directories reported by Russell
and fix range sizes for omap4 cm2 and prm modules.
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Merge tag 'omap-for-v4.17/fixes-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Pull "Two fixes for v4.17-rc cycle" from Tony Lindgren:
Fix a build regression with split object directories reported by Russell
and fix range sizes for omap4 cm2 and prm modules.
* tag 'omap-for-v4.17/fixes-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: Fix build when using split object directories
ARM: dts: Fix cm2 and prm sizes for omap4
The DTS file for the NAS4220B had the pin config for the
ethernet interface set to the pins in the SL3512 SoC while
this system is using SL3516. Fix it by referencing the
right SL3516 pins instead of the SL3512 pins.
Cc: stable@vger.kernel.org
Cc: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Reported-by: Andreas Fiedler <andreas.fiedler@gmx.net>
Reported-by: Roman Yeryomin <roman@advem.lv>
Tested-by: Roman Yeryomin <roman@advem.lv>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Call clear_siginfo to ensure every stack allocated siginfo is properly
initialized before being passed to the signal sending functions.
Note: It is not safe to depend on C initializers to initialize struct
siginfo on the stack because C is allowed to skip holes when
initializing a structure.
The initialization of struct siginfo in tracehook_report_syscall_exit
was moved from the helper user_single_step_siginfo into
tracehook_report_syscall_exit itself, to make it clear that the local
variable siginfo gets fully initialized.
In a few cases the scope of struct siginfo has been reduced to make it
clear that siginfo siginfo is not used on other paths in the function
in which it is declared.
Instances of using memset to initialize siginfo have been replaced
with calls clear_siginfo for clarity.
Signed-off-by: "Eric W. Biederman" <ebiederm@xmission.com>
This patch adds a device tree file for the H2+ version of the Libre
Computer Board ALL-H3-CC. It is the same board first introduced in
commit 6ca358645d ("ARM: dts: sun8i: h3: Add dts file for Libre
Computer Board ALL-H3-CC H3 ver."), with the H3 SoC replaced with
the H2+ SoC, and has only two 2Gb DDR3 chips instead of four.
The device tree utilizes the common board design file for ALL-H3-CC,
providing just the model strings and SoC specifics.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The dtb entry for the Banana Pi M2 Zero in the device tree makefile
somehow ended up in between two Orange Pi boards.
Move it so the list is properly sorted.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Since the libretech-all-h3-cc can use either the H2+, H3 or H5, move the
content of the dts file to a common dtsi file to be included by the H3
variant and in a following patch the H5 variant.
By the way, update the SPDX licence tag position.
Suggested-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The voltage of the VCC-1V2 regulator on the ALL-H3-CC H3 ver. should be
1.2V, not the 3.3V currently defined in the device tree.
Fix the voltage in the device tree.
Fixes: 6ca358645d ("ARM: dts: sun8i: h3: Add dts file for Libre
Computer Board ALL-H3-CC H3 ver.")
Cc: <stable@vger.kernel.org> # 4.16.x
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The Nintendo NES/SuperNES features an R16 already well supported in
mainline.
The console over UART0 may be wired on two ports of the R16, both
available on the NES Classic PCB.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The r8a7790 has three FDP1 instances.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Describe SCIF ports in the R8A77470 device tree.
Also it fixes the CPG clock index ZS from 6 to 5.
Fixes: 6929dfc591 ("ARM: dts: r8a77470: Initial SoC device tree")
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Enable the watchdog, so the board can be restarted by a watchdog
timeout.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Enable the watchdog, so the board can be restarted by a watchdog
timeout.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Enable the watchdog, so the board can be restarted by a watchdog
timeout.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Enable the watchdog, so the board can be restarted by a watchdog
timeout.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Enable the watchdog, so the board can be restarted by a watchdog
timeout.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Enable the watchdog, so the board can be restarted by a watchdog
timeout.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Enable the watchdog, so the board can be restarted by a watchdog
timeout.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Enable the watchdog, so the board can be restarted by a watchdog
timeout.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a device node for the Watchdog Timer (WDT) controller on the Renesas
R-Car M2-N (r8a7793) SoC.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a device node for the Watchdog Timer (WDT) controller on the Renesas
R-Car V2H (r8a7792) SoC.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch enables the watchdog from within the iwg20m SoM dtsi.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch enables the watchdog from within the iwg20m SoM dtsi.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit adds watchdog support to the r8a7794 dtsi.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit adds watchdog support to the r8a7791 dtsi.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit adds watchdog support to the r8a7790 dtsi.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch adds watchdog support to the r8a7745 SoC dtsi.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch adds watchdog support to the r8a7743 SoC dtsi.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch adjusts the definition of the SMP routine size according
to the latest changes made by commit:
"ARM: shmobile: Add watchdog support"
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch adjusts the definition of the SMP routine size according
to the latest changes made by commit:
"ARM: shmobile: Add watchdog support"
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch adjusts the definition of the SMP routine size according
to the latest changes made by commit:
"ARM: shmobile: Add watchdog support"
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch adjusts the definition of the SMP routine size according
to the latest changes made by commit:
"ARM: shmobile: Add watchdog support"
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch adjusts the definition of the SMP routine size according
to the latest changes made by commit:
"ARM: shmobile: Add watchdog support"
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch adjusts the definition of the SMP routine size according
to the latest changes made by commit:
"ARM: shmobile: Add watchdog support"
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch adjusts the definition of the SMP routine size according
to the latest changes made by commit:
"ARM: shmobile: Add watchdog support"
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The r8a7794 has one FDP1 instance.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The r8a7793 has two FDP1 instances.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The r8a7791 has two FDP1 instances.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
After moving all nodes under "soc" node in commit 5d99cc59a3 ("ARM:
dts: exynos: Move Exynos5250 and Exynos5420 nodes under soc"), the i2c20
alias in Peach Pit and Peach Pi stopped pointing to proper node:
arch/arm/boot/dts/exynos5420-peach-pit.dtb: Warning (alias_paths):
/aliases:i2c20: aliases property is not a valid node (/spi@12d40000/cros-ec@0/i2c-tunnel)
arch/arm/boot/dts/exynos5800-peach-pi.dtb: Warning (alias_paths):
/aliases:i2c20: aliases property is not a valid node (/spi@12d40000/cros-ec@0/i2c-tunnel)
Fixes: 5d99cc59a3 ("ARM: dts: exynos: Move Exynos5250 and Exynos5420 nodes under soc")
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Add syscon-phy-mode property specifying a phandle of system controller
to each ethernet node.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The GIO clock/reset, Another MAC clock, and the PHY clock are required
for the ethernet of Pro4 SoC.
And add clock-names and reset-names to the ethernet node of PXs2 since
we need to distinguish clocks and resets now.
Suggested-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Using 'at' or 'at24' as the <manufacturer> part of the compatible
string is now deprecated. Use a correct value: 'atmel,<model>'.
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Remove unused #address-cells and #size-cells from pinmux
node. This fixes W=1 warnings of the type:
arch/arm/boot/dts/da850-lcdk.dtb: Warning (avoid_unnecessary_addr_size): /soc@1c00000/pinmux@14120: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
Tested on DA850 LCDK by checking output of:
/sys/kernel/debug/pinctrl/1c14120.pinmux-pinctrl-single/pins
before and after the change.
Reviewed-by: David Lechner <david@lechnology.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Add unit name for memory node to squash the W=1 warning:
arch/arm/boot/dts/da850-lcdk.dtb: Warning (unit_address_vs_reg): /memory: node has a reg or ranges property, but no unit name
While at it, drop the device_type property from memory
node since its provided by da850.dtsi already.
Reviewed-by: David Lechner <david@lechnology.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
skeleton.dtsi is deprecated. Drop its usage in da850.dtsi
and move the nodes and properties included by it directly
to keep the dtb same.
The memory node has been changed to get rid of warnings
(see below). It contains the memory base address as that is
fixed for DA850 SoCs. But the size needs to be added by
bootloader or a board specific dts.
This gets rid of the following W=1 warnings:
arch/arm/boot/dts/da850-enbw-cmc.dtb: Warning (unit_address_vs_reg): /memory: node has a reg or ranges property, but no unit name
arch/arm/boot/dts/da850-evm.dtb: Warning (unit_address_vs_reg): /memory: node has a reg or ranges property, but no unit name
arch/arm/boot/dts/da850-lego-ev3.dtb: Warning (unit_address_vs_reg): /memory: node has a reg or ranges property, but no unit name
Reviewed-by: David Lechner <david@lechnology.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
The ALL-H3-CC has a fixed VDD-CPUX voltage at 1.2V, which is supplied
by a regulator.
Set the CPU's cpu-supply property to the VDD-CPUX regulator.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
[wens@csie.org: Fix device node ordering]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
The VDD-CPUX voltage of ALL-H3-CC H3 ver should be 1.2V, not the 3.3V
currently defined in the device tree.
Fix the voltage in the device tree.
Fixes: 6ca358645d ("ARM: dts: sun8i: h3: Add dts file for Libre Computer Board ALL-H3-CC H3 ver.")
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Cc: <stable@vger.kernel.org> # 4.16.x
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
The Raspberry Pi 3 B+ has a Microchip LAN7515 (connect via USB) and
a Cypress CYW43455 (connect via UART). This patch enables the necessary
drivers.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Eric Anholt <eric@anholt.net>
In order to gain more test coverage (e.g. Kernel CI) enable
the VCHIQ driver.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Eric Anholt <eric@anholt.net>
This patch enables the necessary driver for Raspberry Pi 3 B+,
which has a LAN7515 chip.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Eric Anholt <eric@anholt.net>
The Raspberry Pi 3 B+ has the following major differences compared
to the model 3 B:
* Microchip LAN7515 (Gigabit Ethernet with integrated USB 2.0 HUB)
* Cypress CYW43455 (802.11n/ac and BT 4.2)
We need to add the USB LAN chip so the bootloader can add the MAC address.
This is necessary because there ain't an EEPROM or a valid OTP.
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Eric Anholt <eric@anholt.net>
After commit a98d90e7d5 ("gpio: raspberrypi-exp: Driver for RPi3 GPIO
expander via mailbox service") we are able to control the rest of the
GPIOs of the RPi 3. So add all the missing parts (ACT LED,
Wifi & BT control, HDMI detect) to the DT.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Eric Anholt <eric@anholt.net>
All RPi 1 and 2 boards used the PWM (audio out) on pin 40 and 45.
So it was easy to define them in bcm2835-rpi.dtsi. Starting with RPi 3
this wont work anymore, because it uses pin 40 and 41. Furthermore the
Zero variants doesn't have audio out.
This patch fixes this pin conflict by moving the PWM node to the board-level.
Change summary:
RPi 3 B: PWM1 45 -> 41
Zero, Zero W: PWM disabled
all other: no functional change
Reported-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Eric Anholt <eric@anholt.net>
GPL-1.0 is not part of the valid identifier list and as its meaning is GPL
version 1.0 only this would be incompatible with the kernel license.
As this code was included into the kernel, assume its GPL-1.0+
Fixes: 84b2170109 ("ARM: S3C24XX: Add SPDX license identifiers")
Cc: Arnaud Patard <arnaud.patard@rtp-net.org>
Cc: Ben Dooks <ben-linux@fluff.org>
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Enable the remoteproc framework and the da8xx remoteproc driver by
default in the davinci defconfig.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
The last Renesas ARM platform using this driver was removed in commit
a521422ea4 ("ARM: shmobile: mackerel: Remove Legacy C board
code").
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The last Renesas ARM platform using this driver was removed in commit
a521422ea4 ("ARM: shmobile: mackerel: Remove Legacy C board
code").
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The internal LVDS encoder now has DT bindings separate from the DU. Port
the device tree over to the new model.
Fixes: c6a27fa41f ("drm: rcar-du: Convert LVDS encoder code to bridge driver")
Fixes: bff8f8c2fe ("ARM: dts: r8a7793: add soc node")
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The internal LVDS encoder now has DT bindings separate from the DU. Port
the device tree over to the new model.
Fixes: c6a27fa41f ("drm: rcar-du: Convert LVDS encoder code to bridge driver")
Fixes: bb21803ea4 ("ARM: dts: r8a7791: add soc node")
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The internal LVDS encoder now has DT bindings separate from the DU. Port
the device tree over to the new model.
Fixes: c6a27fa41f ("drm: rcar-du: Convert LVDS encoder code to bridge driver")
Fixes: 4bdb7aa7dc ("ARM: dts: r8a7790: add soc node")
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the RZ/N1D SoC to the reset of the Renesas SoC Collection.
Signed-off-by: Michel Pollet <michel.pollet@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>