Граф коммитов

3 Коммитов

Автор SHA1 Сообщение Дата
Catalin Marinas 6a0e243069 [ARM] 3352/1: DSB required for the completion of a TLB maintenance operation
Patch from Catalin Marinas

Chapter B2.7.3 in the latest ARM ARM (with v6 information) states that
the completion of a TLB maintenance operation is only guaranteed by
the execution of a DSB (Data Syncronization Barrier, formerly Data
Write Barrier or Drain Write Buffer).

Note that a DSB is only needed in the flush_tlb_kernel_* functions
since the completion is guaranteed by a mode change (i.e. switching
back to user mode) for the flush_tlb_user_* functions.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-03-07 14:42:27 +00:00
Russell King 603fff5442 [PATCH] ARM SMP: TLB implementations only affect local CPU
The existing TLB flush implementations only have an effect on
the local CPU.  Prefix them with local_.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-06-28 13:40:39 +01:00
Linus Torvalds 1da177e4c3 Linux-2.6.12-rc2
Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.

Let it rip!
2005-04-16 15:20:36 -07:00