9117fc44fd
[ Upstream commit 1fe15be1fb613534ecbac5f8c3f8744f757d237d ]
Currently zynqmp divider round rate is considering single parent and
calculating rate and parent rate accordingly. But if divider clock flag
is set to SET_RATE_PARENT then its not trying to traverse through all
parent rate and not selecting best parent rate from that. So use common
divider_round_rate() which is traversing through all clock parents and
its rate and calculating proper parent rate.
Fixes:
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.. | ||
Kconfig | ||
Makefile | ||
clk-gate-zynqmp.c | ||
clk-mux-zynqmp.c | ||
clk-zynqmp.h | ||
clkc.c | ||
divider.c | ||
pll.c |