fde10aab82
[ Upstream commit a85ed162f0efcfdd664954414a05d1d560cc95dc ]
For DSP_A, data is a BCK cycle behind LRCK trigger edge. For DSP_B, this
delay doesn't exist. Fix the delay configuration to match the standard.
Fixes:
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.. | ||
common | ||
mt2701 | ||
mt6797 | ||
mt8173 | ||
mt8183 | ||
mt8192 | ||
mt8195 | ||
Kconfig | ||
Makefile |