913 строки
25 KiB
Plaintext
913 строки
25 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
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*/
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/* AM437x SK EVM */
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/dts-v1/;
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#include "am4372.dtsi"
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#include <dt-bindings/pinctrl/am43xx.h>
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#include <dt-bindings/pwm/pwm.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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/ {
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model = "TI AM437x SK EVM";
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compatible = "ti,am437x-sk-evm","ti,am4372","ti,am43";
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aliases {
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display0 = &lcd0;
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};
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chosen {
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stdout-path = &uart0;
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};
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/* fixed 32k external oscillator clock */
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clk_32k_rtc: clk_32k_rtc {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <32768>;
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};
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lcd_bl: backlight {
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compatible = "pwm-backlight";
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pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
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brightness-levels = <0 51 53 56 62 75 101 152 255>;
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default-brightness-level = <8>;
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};
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sound {
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compatible = "simple-audio-card";
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simple-audio-card,name = "AM437x-SK-EVM";
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simple-audio-card,widgets =
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"Headphone", "Headphone Jack",
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"Line", "Line In";
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simple-audio-card,routing =
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"Headphone Jack", "HPLOUT",
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"Headphone Jack", "HPROUT",
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"LINE1L", "Line In",
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"LINE1R", "Line In";
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simple-audio-card,format = "dsp_b";
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simple-audio-card,bitclock-master = <&sound_master>;
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simple-audio-card,frame-master = <&sound_master>;
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simple-audio-card,bitclock-inversion;
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simple-audio-card,cpu {
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sound-dai = <&mcasp1>;
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};
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sound_master: simple-audio-card,codec {
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sound-dai = <&tlv320aic3106>;
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system-clock-frequency = <24000000>;
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};
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};
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matrix_keypad: matrix_keypad0 {
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compatible = "gpio-matrix-keypad";
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pinctrl-names = "default";
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pinctrl-0 = <&matrix_keypad_pins>;
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debounce-delay-ms = <5>;
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col-scan-delay-us = <5>;
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row-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH /* Bank5, pin5 */
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&gpio5 6 GPIO_ACTIVE_HIGH>; /* Bank5, pin6 */
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col-gpios = <&gpio5 13 GPIO_ACTIVE_HIGH /* Bank5, pin13 */
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&gpio5 4 GPIO_ACTIVE_HIGH>; /* Bank5, pin4 */
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linux,keymap = <
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MATRIX_KEY(0, 0, KEY_DOWN)
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MATRIX_KEY(0, 1, KEY_RIGHT)
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MATRIX_KEY(1, 0, KEY_LEFT)
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MATRIX_KEY(1, 1, KEY_UP)
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>;
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&leds_pins>;
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led0 {
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label = "am437x-sk:red:heartbeat";
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gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 0 */
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linux,default-trigger = "heartbeat";
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default-state = "off";
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};
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led1 {
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label = "am437x-sk:green:mmc1";
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gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 1 */
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linux,default-trigger = "mmc0";
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default-state = "off";
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};
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led2 {
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label = "am437x-sk:blue:cpu0";
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gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 2 */
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linux,default-trigger = "cpu0";
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default-state = "off";
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};
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led3 {
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label = "am437x-sk:blue:usr3";
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gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 3 */
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default-state = "off";
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};
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};
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lcd0: display {
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compatible = "newhaven,nhd-4.3-480272ef-atxl", "panel-dpi";
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label = "lcd";
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pinctrl-names = "default";
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pinctrl-0 = <&lcd_pins>;
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backlight = <&lcd_bl>;
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enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
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panel-timing {
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clock-frequency = <9000000>;
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hactive = <480>;
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vactive = <272>;
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hfront-porch = <2>;
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hback-porch = <2>;
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hsync-len = <41>;
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vfront-porch = <2>;
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vback-porch = <2>;
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vsync-len = <10>;
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hsync-active = <0>;
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vsync-active = <0>;
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de-active = <1>;
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pixelclk-active = <1>;
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};
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port {
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lcd_in: endpoint {
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remote-endpoint = <&dpi_out>;
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};
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};
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};
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vmmcwl_fixed: fixedregulator-mmcwl {
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/*
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* WL_EN is not SDIO standard compliant. It is an out of band
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* signal and hard to be dealt with in a standard way by the
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* SDIO core driver.
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* So modelling the WL_EN line as a regulator was a natural
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* choice as the MMC core already deals with MMC supplies.
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*/
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compatible = "regulator-fixed";
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regulator-name = "vmmcwl_fixed";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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gpio = <&gpio4 8 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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};
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&am43xx_pinmux {
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matrix_keypad_pins: matrix_keypad_pins {
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pinctrl-single,pins = <
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AM4372_IOPAD(0xa4c, PIN_OUTPUT | MUX_MODE7) /* gpio5_13.gpio5_13 */
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AM4372_IOPAD(0xa50, PIN_OUTPUT | MUX_MODE7) /* spi4_sclk.gpio5_4 */
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AM4372_IOPAD(0xa54, PIN_INPUT | MUX_MODE7) /* spi4_d0.gpio5_5 */
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AM4372_IOPAD(0xa58, PIN_INPUT | MUX_MODE7) /* spi4_d1.gpio5_5 */
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>;
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};
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leds_pins: leds_pins {
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pinctrl-single,pins = <
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AM4372_IOPAD(0xa28, PIN_OUTPUT | MUX_MODE7) /* uart3_rxd.gpio5_2 */
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AM4372_IOPAD(0xa2c, PIN_OUTPUT | MUX_MODE7) /* uart3_txd.gpio5_3 */
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AM4372_IOPAD(0xa30, PIN_OUTPUT | MUX_MODE7) /* uart3_ctsn.gpio5_0 */
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AM4372_IOPAD(0xa34, PIN_OUTPUT | MUX_MODE7) /* uart3_rtsn.gpio5_1 */
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>;
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};
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i2c0_pins: i2c0_pins {
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pinctrl-single,pins = <
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AM4372_IOPAD(0x988, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
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AM4372_IOPAD(0x98c, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
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>;
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};
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i2c1_pins: i2c1_pins {
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pinctrl-single,pins = <
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AM4372_IOPAD(0x95c, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_cs0.i2c1_scl */
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AM4372_IOPAD(0x958, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_d1.i2c1_sda */
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>;
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};
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mmc1_pins: pinmux_mmc1_pins {
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pinctrl-single,pins = <
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AM4372_IOPAD(0x8f0, PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
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AM4372_IOPAD(0x8f4, PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
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AM4372_IOPAD(0x8f8, PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
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AM4372_IOPAD(0x8fc, PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
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AM4372_IOPAD(0x900, PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */
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AM4372_IOPAD(0x904, PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
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AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
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>;
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};
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ecap0_pins: backlight_pins {
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pinctrl-single,pins = <
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AM4372_IOPAD(0x964, PIN_OUTPUT | MUX_MODE0) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out */
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>;
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};
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edt_ft5306_ts_pins: edt_ft5306_ts_pins {
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pinctrl-single,pins = <
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AM4372_IOPAD(0x874, PIN_INPUT | MUX_MODE7) /* gpmc_wpn.gpio0_31 */
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AM4372_IOPAD(0x878, PIN_OUTPUT | MUX_MODE7) /* gpmc_be1n.gpio1_28 */
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>;
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};
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vpfe0_pins_default: vpfe0_pins_default {
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pinctrl-single,pins = <
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AM4372_IOPAD(0x9b0, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_hd mode 0*/
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AM4372_IOPAD(0x9b4, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_vd mode 0*/
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AM4372_IOPAD(0x9b8, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_field mode 0*/
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AM4372_IOPAD(0x9bc, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_wen mode 0*/
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AM4372_IOPAD(0x9c0, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_pclk mode 0*/
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AM4372_IOPAD(0x9c4, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data8 mode 0*/
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AM4372_IOPAD(0x9c8, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data9 mode 0*/
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AM4372_IOPAD(0xa08, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data0 mode 0*/
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AM4372_IOPAD(0xa0c, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data1 mode 0*/
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AM4372_IOPAD(0xa10, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data2 mode 0*/
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AM4372_IOPAD(0xa14, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data3 mode 0*/
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AM4372_IOPAD(0xa18, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data4 mode 0*/
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AM4372_IOPAD(0xa1c, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data5 mode 0*/
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AM4372_IOPAD(0xa20, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data6 mode 0*/
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AM4372_IOPAD(0xa24, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data7 mode 0*/
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>;
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};
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vpfe0_pins_sleep: vpfe0_pins_sleep {
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pinctrl-single,pins = <
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AM4372_IOPAD(0x9b0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
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AM4372_IOPAD(0x9b4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
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AM4372_IOPAD(0x9b8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
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AM4372_IOPAD(0x9bc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
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AM4372_IOPAD(0x9c0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
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AM4372_IOPAD(0x9c4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
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AM4372_IOPAD(0x9c8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
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AM4372_IOPAD(0xa08, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
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AM4372_IOPAD(0xa0c, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
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AM4372_IOPAD(0xa10, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
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AM4372_IOPAD(0xa14, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
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AM4372_IOPAD(0xa18, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
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AM4372_IOPAD(0xa1c, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
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AM4372_IOPAD(0xa20, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
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AM4372_IOPAD(0xa24, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
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>;
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};
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clkout1_pin: pinmux_clkout1_pin {
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pinctrl-single,pins = <
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0x270 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* XDMA_EVENT_INTR0/CLKOUT1 */
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>;
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};
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cpsw_default: cpsw_default {
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pinctrl-single,pins = <
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/* Slave 1 */
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AM4372_IOPAD(0x92c, PIN_OUTPUT | MUX_MODE2) /* mii1_txclk.rmii1_tclk */
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AM4372_IOPAD(0x914, PIN_OUTPUT | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
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AM4372_IOPAD(0x928, PIN_OUTPUT | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
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AM4372_IOPAD(0x924, PIN_OUTPUT | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
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AM4372_IOPAD(0x920, PIN_OUTPUT | MUX_MODE2) /* mii1_txd0.rgmii1_td2 */
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AM4372_IOPAD(0x91c, PIN_OUTPUT | MUX_MODE2) /* mii1_txd1.rgmii1_td3 */
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AM4372_IOPAD(0x930, PIN_INPUT | MUX_MODE2) /* mii1_rxclk.rmii1_rclk */
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AM4372_IOPAD(0x918, PIN_INPUT | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
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AM4372_IOPAD(0x940, PIN_INPUT | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
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AM4372_IOPAD(0x93c, PIN_INPUT | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
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AM4372_IOPAD(0x938, PIN_INPUT | MUX_MODE2) /* mii1_rxd0.rgmii1_rd2 */
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AM4372_IOPAD(0x934, PIN_INPUT | MUX_MODE2) /* mii1_rxd1.rgmii1_rd3 */
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/* Slave 2 */
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AM4372_IOPAD(0x858, PIN_OUTPUT | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */
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AM4372_IOPAD(0x840, PIN_OUTPUT | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */
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AM4372_IOPAD(0x854, PIN_OUTPUT | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */
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AM4372_IOPAD(0x850, PIN_OUTPUT | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */
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AM4372_IOPAD(0x84c, PIN_OUTPUT | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */
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AM4372_IOPAD(0x848, PIN_OUTPUT | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */
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AM4372_IOPAD(0x85c, PIN_INPUT | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */
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AM4372_IOPAD(0x844, PIN_INPUT | MUX_MODE2) /* gpmc_a1.rgmii2_rtcl */
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AM4372_IOPAD(0x86c, PIN_INPUT | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */
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AM4372_IOPAD(0x868, PIN_INPUT | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */
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AM4372_IOPAD(0x864, PIN_INPUT | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */
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AM4372_IOPAD(0x860, PIN_INPUT | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */
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>;
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};
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cpsw_sleep: cpsw_sleep {
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pinctrl-single,pins = <
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/* Slave 1 reset value */
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AM4372_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
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/* Slave 2 reset value */
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AM4372_IOPAD(0x858, PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0x840, PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0x854, PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0x850, PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0x84c, PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0x848, PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE7)
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>;
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};
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davinci_mdio_default: davinci_mdio_default {
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pinctrl-single,pins = <
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/* MDIO */
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AM4372_IOPAD(0x948, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
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AM4372_IOPAD(0x94c, PIN_OUTPUT | MUX_MODE0) /* mdio_clk.mdio_clk */
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>;
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};
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davinci_mdio_sleep: davinci_mdio_sleep {
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pinctrl-single,pins = <
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/* MDIO reset value */
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AM4372_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
AM4372_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
>;
|
|
};
|
|
|
|
dss_pins: dss_pins {
|
|
pinctrl-single,pins = <
|
|
AM4372_IOPAD(0x820, PIN_OUTPUT | MUX_MODE1) /* gpmc ad 8 -> DSS DATA 23 */
|
|
AM4372_IOPAD(0x824, PIN_OUTPUT | MUX_MODE1)
|
|
AM4372_IOPAD(0x828, PIN_OUTPUT | MUX_MODE1)
|
|
AM4372_IOPAD(0x82c, PIN_OUTPUT | MUX_MODE1)
|
|
AM4372_IOPAD(0x830, PIN_OUTPUT | MUX_MODE1)
|
|
AM4372_IOPAD(0x834, PIN_OUTPUT | MUX_MODE1)
|
|
AM4372_IOPAD(0x838, PIN_OUTPUT | MUX_MODE1)
|
|
AM4372_IOPAD(0x83c, PIN_OUTPUT | MUX_MODE1) /* gpmc ad 15 -> DSS DATA 16 */
|
|
AM4372_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0) /* DSS DATA 0 */
|
|
AM4372_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0)
|
|
AM4372_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0)
|
|
AM4372_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0)
|
|
AM4372_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0)
|
|
AM4372_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0)
|
|
AM4372_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0)
|
|
AM4372_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0)
|
|
AM4372_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0)
|
|
AM4372_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0)
|
|
AM4372_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0)
|
|
AM4372_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0)
|
|
AM4372_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0)
|
|
AM4372_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0)
|
|
AM4372_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0)
|
|
AM4372_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0) /* DSS DATA 15 */
|
|
AM4372_IOPAD(0x8e0, PIN_OUTPUT | MUX_MODE0) /* DSS VSYNC */
|
|
AM4372_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE0) /* DSS HSYNC */
|
|
AM4372_IOPAD(0x8e8, PIN_OUTPUT | MUX_MODE0) /* DSS PCLK */
|
|
AM4372_IOPAD(0x8ec, PIN_OUTPUT | MUX_MODE0) /* DSS AC BIAS EN */
|
|
|
|
>;
|
|
};
|
|
|
|
qspi_pins: qspi_pins {
|
|
pinctrl-single,pins = <
|
|
AM4372_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE3) /* gpmc_csn0.qspi_csn */
|
|
AM4372_IOPAD(0x888, PIN_OUTPUT | MUX_MODE2) /* gpmc_csn3.qspi_clk */
|
|
AM4372_IOPAD(0x890, PIN_INPUT | MUX_MODE3) /* gpmc_advn_ale.qspi_d0 */
|
|
AM4372_IOPAD(0x894, PIN_INPUT | MUX_MODE3) /* gpmc_oen_ren.qspi_d1 */
|
|
AM4372_IOPAD(0x898, PIN_INPUT | MUX_MODE3) /* gpmc_wen.qspi_d2 */
|
|
AM4372_IOPAD(0x89c, PIN_INPUT | MUX_MODE3) /* gpmc_be0n_cle.qspi_d3 */
|
|
>;
|
|
};
|
|
|
|
mcasp1_pins: mcasp1_pins {
|
|
pinctrl-single,pins = <
|
|
AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
|
|
AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */
|
|
AM4372_IOPAD(0x908, PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */
|
|
AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
|
|
>;
|
|
};
|
|
|
|
mcasp1_pins_sleep: mcasp1_pins_sleep {
|
|
pinctrl-single,pins = <
|
|
AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
AM4372_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
>;
|
|
};
|
|
|
|
lcd_pins: lcd_pins {
|
|
pinctrl-single,pins = <
|
|
AM4372_IOPAD(0x81c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpcm_ad7.gpio1_7 */
|
|
>;
|
|
};
|
|
|
|
usb1_pins: usb1_pins {
|
|
pinctrl-single,pins = <
|
|
AM4372_IOPAD(0xac0, PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */
|
|
>;
|
|
};
|
|
|
|
usb2_pins: usb2_pins {
|
|
pinctrl-single,pins = <
|
|
AM4372_IOPAD(0xac4, PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */
|
|
>;
|
|
};
|
|
|
|
mmc3_pins_default: pinmux_mmc3_pins_default {
|
|
pinctrl-single,pins = <
|
|
AM4372_IOPAD(0x9f0, PIN_INPUT_PULLUP | MUX_MODE3) /* (AD21) cam1_data2.mmc2_clk */
|
|
AM4372_IOPAD(0x9f4, PIN_INPUT_PULLUP | MUX_MODE3) /* (AE22) cam1_data3.mmc2_cmd */
|
|
AM4372_IOPAD(0x9f8, PIN_INPUT_PULLUP | MUX_MODE3) /* (AD22) cam1_data4.mmc2_dat0 */
|
|
AM4372_IOPAD(0x9fc, PIN_INPUT_PULLUP | MUX_MODE3) /* (AE23) cam1_data5.mmc2_dat1 */
|
|
AM4372_IOPAD(0xa00, PIN_INPUT_PULLUP | MUX_MODE3) /* (AD23) cam1_data6.mmc2_dat2 */
|
|
AM4372_IOPAD(0xa04, PIN_INPUT_PULLUP | MUX_MODE3) /* (AE24) cam1_data7.mmc2_dat3 */
|
|
>;
|
|
};
|
|
|
|
mmc3_pins_sleep: pinmux_mmc3_pins_sleep {
|
|
pinctrl-single,pins = <
|
|
AM4372_IOPAD(0x9f0, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (AD21) cam1_data2.mmc2_clk */
|
|
AM4372_IOPAD(0x9f4, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (AE22) cam1_data3.mmc2_cmd */
|
|
AM4372_IOPAD(0x9f8, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (AD22) cam1_data4.mmc2_dat0 */
|
|
AM4372_IOPAD(0x9fc, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (AE23) cam1_data5.mmc2_dat1 */
|
|
AM4372_IOPAD(0xa00, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (AD23) cam1_data6.mmc2_dat2 */
|
|
AM4372_IOPAD(0xa04, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (AE24) cam1_data7.mmc2_dat3 */
|
|
>;
|
|
};
|
|
|
|
wlan_pins_default: pinmux_wlan_pins_default {
|
|
pinctrl-single,pins = <
|
|
AM4372_IOPAD(0x9d0, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* cam1_data8.gpio4_8 WL_EN */
|
|
AM4372_IOPAD(0x9e4, PIN_INPUT | WAKEUP_ENABLE | MUX_MODE7) /* cam1_wen.gpio4_13 WL_IRQ */
|
|
>;
|
|
};
|
|
|
|
wlan_pins_sleep: pinmux_wlan_pins_sleep {
|
|
pinctrl-single,pins = <
|
|
AM4372_IOPAD(0x9d0, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* cam1_data8.gpio4_8 WL_EN */
|
|
AM4372_IOPAD(0x9e4, PIN_INPUT | WAKEUP_ENABLE | MUX_MODE7) /* cam1_wen.gpio4_13 WL_IRQ */
|
|
>;
|
|
};
|
|
|
|
uart1_bt_pins_default: pinmux_uart1_bt_pins_default {
|
|
pinctrl-single,pins = <
|
|
AM4372_IOPAD(0x980, PIN_INPUT | MUX_MODE0) /* uart1_rxd.uart1_rxd */
|
|
AM4372_IOPAD(0x984, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_txd.uart1_txd */
|
|
AM4372_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_ctsn.uart1_ctsn */
|
|
AM4372_IOPAD(0x97c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_rtsn.uart1_rtsn */
|
|
AM4372_IOPAD(0x9cc, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* cam1_data9.gpio4_7 BT_EN */
|
|
>;
|
|
};
|
|
|
|
uart1_bt_pins_sleep: pinmux_uart1_bt_pins_sleep {
|
|
pinctrl-single,pins = <
|
|
AM4372_IOPAD(0x980, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* uart1_rxd.uart1_rxd */
|
|
AM4372_IOPAD(0x984, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* uart1_txd.uart1_txd */
|
|
AM4372_IOPAD(0x978, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* uart1_ctsn.uart1_ctsn */
|
|
AM4372_IOPAD(0x97c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* uart1_rtsn.uart1_rtsn */
|
|
AM4372_IOPAD(0x9cc, PIN_OUTPUT_PULLUP | MUX_MODE7) /* cam1_data9.gpio4_7 BT_EN */
|
|
>;
|
|
};
|
|
};
|
|
|
|
&i2c0 {
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2c0_pins>;
|
|
clock-frequency = <100000>;
|
|
|
|
tps@24 {
|
|
compatible = "ti,tps65218";
|
|
reg = <0x24>;
|
|
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
|
|
dcdc1: regulator-dcdc1 {
|
|
/* VDD_CORE limits min of OPP50 and max of OPP100 */
|
|
regulator-name = "vdd_core";
|
|
regulator-min-microvolt = <912000>;
|
|
regulator-max-microvolt = <1144000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
dcdc2: regulator-dcdc2 {
|
|
/* VDD_MPU limits min of OPP50 and max of OPP_NITRO */
|
|
regulator-name = "vdd_mpu";
|
|
regulator-min-microvolt = <912000>;
|
|
regulator-max-microvolt = <1378000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
dcdc3: regulator-dcdc3 {
|
|
regulator-name = "vdds_ddr";
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
};
|
|
regulator-state-disk {
|
|
regulator-off-in-suspend;
|
|
};
|
|
};
|
|
|
|
dcdc4: regulator-dcdc4 {
|
|
regulator-name = "v3_3d";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
dcdc5: regulator-dcdc5 {
|
|
compatible = "ti,tps65218-dcdc5";
|
|
regulator-name = "v1_0bat";
|
|
regulator-min-microvolt = <1000000>;
|
|
regulator-max-microvolt = <1000000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
};
|
|
};
|
|
|
|
dcdc6: regulator-dcdc6 {
|
|
compatible = "ti,tps65218-dcdc6";
|
|
regulator-name = "v1_8bat";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
regulator-state-mem {
|
|
regulator-on-in-suspend;
|
|
};
|
|
};
|
|
|
|
ldo1: regulator-ldo1 {
|
|
regulator-name = "v1_8d";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
power-button {
|
|
compatible = "ti,tps65218-pwrbutton";
|
|
status = "okay";
|
|
interrupts = <3 IRQ_TYPE_EDGE_BOTH>;
|
|
};
|
|
};
|
|
|
|
at24@50 {
|
|
compatible = "atmel,24c256";
|
|
pagesize = <64>;
|
|
reg = <0x50>;
|
|
};
|
|
};
|
|
|
|
&i2c1 {
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2c1_pins>;
|
|
clock-frequency = <400000>;
|
|
|
|
ov2659@30 {
|
|
compatible = "ovti,ov2659";
|
|
reg = <0x30>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&clkout1_pin>;
|
|
|
|
clocks = <&clkout1_mux_ck>;
|
|
clock-names = "xvclk";
|
|
assigned-clocks = <&clkout1_mux_ck>;
|
|
assigned-clock-parents = <&clkout1_osc_div_ck>;
|
|
|
|
port {
|
|
ov2659_1: endpoint {
|
|
remote-endpoint = <&vpfe0_ep>;
|
|
link-frequencies = /bits/ 64 <70000000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
edt-ft5306@38 {
|
|
status = "okay";
|
|
compatible = "edt,edt-ft5306", "edt,edt-ft5x06";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&edt_ft5306_ts_pins>;
|
|
|
|
reg = <0x38>;
|
|
interrupt-parent = <&gpio0>;
|
|
interrupts = <31 IRQ_TYPE_EDGE_FALLING>;
|
|
|
|
reset-gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
|
|
|
|
touchscreen-size-x = <480>;
|
|
touchscreen-size-y = <272>;
|
|
|
|
wakeup-source;
|
|
};
|
|
|
|
tlv320aic3106: tlv320aic3106@1b {
|
|
#sound-dai-cells = <0>;
|
|
compatible = "ti,tlv320aic3106";
|
|
reg = <0x1b>;
|
|
status = "okay";
|
|
|
|
/* Regulators */
|
|
AVDD-supply = <&dcdc4>;
|
|
IOVDD-supply = <&dcdc4>;
|
|
DRVDD-supply = <&dcdc4>;
|
|
DVDD-supply = <&ldo1>;
|
|
};
|
|
|
|
lis331dlh@18 {
|
|
compatible = "st,lis331dlh";
|
|
reg = <0x18>;
|
|
status = "okay";
|
|
|
|
Vdd-supply = <&dcdc4>;
|
|
Vdd_IO-supply = <&dcdc4>;
|
|
interrupts-extended = <&gpio1 6 0>, <&gpio2 1 0>;
|
|
};
|
|
};
|
|
|
|
&epwmss0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&ecap0 {
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&ecap0_pins>;
|
|
};
|
|
|
|
&gpio0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&gpio1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&gpio4 {
|
|
status = "okay";
|
|
};
|
|
|
|
&gpio5 {
|
|
status = "okay";
|
|
};
|
|
|
|
&mmc1 {
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&mmc1_pins>;
|
|
|
|
vmmc-supply = <&dcdc4>;
|
|
bus-width = <4>;
|
|
cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
&uart1 {
|
|
status = "okay";
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <&uart1_bt_pins_default>;
|
|
pinctrl-1 = <&uart1_bt_pins_sleep>;
|
|
};
|
|
|
|
&mmc3 {
|
|
status = "okay";
|
|
/*
|
|
* these are on the crossbar and are outlined in the
|
|
* xbar-event-map element
|
|
*/
|
|
dmas = <&edma_xbar 30 0 1>,
|
|
<&edma_xbar 31 0 2>;
|
|
dma-names = "tx", "rx";
|
|
vmmc-supply = <&vmmcwl_fixed>;
|
|
bus-width = <4>;
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <&mmc3_pins_default>;
|
|
pinctrl-1 = <&mmc3_pins_sleep>;
|
|
cap-power-off-card;
|
|
keep-power-in-suspend;
|
|
ti,non-removable;
|
|
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
wlcore: wlcore@2 {
|
|
compatible = "ti,wl1835";
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <&wlan_pins_default>;
|
|
pinctrl-1 = <&wlan_pins_sleep>;
|
|
reg = <2>;
|
|
interrupt-parent = <&gpio4>;
|
|
interrupts = <13 IRQ_TYPE_LEVEL_HIGH>;
|
|
};
|
|
};
|
|
|
|
&usb2_phy1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb1 {
|
|
dr_mode = "otg";
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&usb1_pins>;
|
|
};
|
|
|
|
&usb2_phy2 {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb2 {
|
|
dr_mode = "host";
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&usb2_pins>;
|
|
};
|
|
|
|
&qspi {
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&qspi_pins>;
|
|
|
|
spi-max-frequency = <48000000>;
|
|
m25p80@0 {
|
|
compatible = "mx66l51235l";
|
|
spi-max-frequency = <48000000>;
|
|
reg = <0>;
|
|
spi-cpol;
|
|
spi-cpha;
|
|
spi-tx-bus-width = <1>;
|
|
spi-rx-bus-width = <4>;
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
/* MTD partition table.
|
|
* The ROM checks the first 512KiB
|
|
* for a valid file to boot(XIP).
|
|
*/
|
|
partition@0 {
|
|
label = "QSPI.U_BOOT";
|
|
reg = <0x00000000 0x000080000>;
|
|
};
|
|
partition@1 {
|
|
label = "QSPI.U_BOOT.backup";
|
|
reg = <0x00080000 0x00080000>;
|
|
};
|
|
partition@2 {
|
|
label = "QSPI.U-BOOT-SPL_OS";
|
|
reg = <0x00100000 0x00010000>;
|
|
};
|
|
partition@3 {
|
|
label = "QSPI.U_BOOT_ENV";
|
|
reg = <0x00110000 0x00010000>;
|
|
};
|
|
partition@4 {
|
|
label = "QSPI.U-BOOT-ENV.backup";
|
|
reg = <0x00120000 0x00010000>;
|
|
};
|
|
partition@5 {
|
|
label = "QSPI.KERNEL";
|
|
reg = <0x00130000 0x0800000>;
|
|
};
|
|
partition@6 {
|
|
label = "QSPI.FILESYSTEM";
|
|
reg = <0x00930000 0x36D0000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&mac {
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <&cpsw_default>;
|
|
pinctrl-1 = <&cpsw_sleep>;
|
|
dual_emac = <1>;
|
|
status = "okay";
|
|
};
|
|
|
|
&davinci_mdio {
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <&davinci_mdio_default>;
|
|
pinctrl-1 = <&davinci_mdio_sleep>;
|
|
status = "okay";
|
|
|
|
ethphy0: ethernet-phy@4 {
|
|
reg = <4>;
|
|
};
|
|
|
|
ethphy1: ethernet-phy@5 {
|
|
reg = <5>;
|
|
};
|
|
};
|
|
|
|
&cpsw_emac0 {
|
|
phy-handle = <ðphy0>;
|
|
phy-mode = "rgmii";
|
|
dual_emac_res_vlan = <1>;
|
|
};
|
|
|
|
&cpsw_emac1 {
|
|
phy-handle = <ðphy1>;
|
|
phy-mode = "rgmii";
|
|
dual_emac_res_vlan = <2>;
|
|
};
|
|
|
|
&elm {
|
|
status = "okay";
|
|
};
|
|
|
|
&mcasp1 {
|
|
#sound-dai-cells = <0>;
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <&mcasp1_pins>;
|
|
pinctrl-1 = <&mcasp1_pins_sleep>;
|
|
|
|
status = "okay";
|
|
|
|
op-mode = <0>;
|
|
tdm-slots = <2>;
|
|
serial-dir = <
|
|
0 0 1 2
|
|
>;
|
|
|
|
tx-num-evt = <1>;
|
|
rx-num-evt = <1>;
|
|
};
|
|
|
|
&dss {
|
|
status = "okay";
|
|
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&dss_pins>;
|
|
|
|
port {
|
|
dpi_out: endpoint@0 {
|
|
remote-endpoint = <&lcd_in>;
|
|
data-lines = <24>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&rtc {
|
|
clocks = <&clk_32k_rtc>, <&clk_32768_ck>;
|
|
clock-names = "ext-clk", "int-clk";
|
|
status = "okay";
|
|
};
|
|
|
|
&wdt {
|
|
status = "okay";
|
|
};
|
|
|
|
&cpu {
|
|
cpu0-supply = <&dcdc2>;
|
|
};
|
|
|
|
&vpfe0 {
|
|
status = "okay";
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <&vpfe0_pins_default>;
|
|
pinctrl-1 = <&vpfe0_pins_sleep>;
|
|
|
|
/* Camera port */
|
|
port {
|
|
vpfe0_ep: endpoint {
|
|
remote-endpoint = <&ov2659_1>;
|
|
ti,am437x-vpfe-interface = <0>;
|
|
bus-width = <8>;
|
|
hsync-active = <0>;
|
|
vsync-active = <0>;
|
|
};
|
|
};
|
|
};
|