Lee Jones 0473b177c3 clk: ux500: Remove BML8580 clock ... There is no mention of the PRCMU_BML8580CLK in any of the Design Specifications for the chips supported in Mainline. In fact, where it is incorrectly used in the u8540 clock definition driver it would have the side effect of using the incorrect clock management address ([PRCM_BML8580CLK_MGT] 0x108 instead of the correct value 0x04C). Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>		2013-09-26 11:05:22 +02:00
..
Makefile	clk: ux500: Add support for sysctrl clocks	2013-04-10 11:27:56 -07:00
abx500-clk.c	clk: ux500: abx500-clk: rename ux500 audio codec aliases	2013-05-28 22:50:31 -07:00
clk-prcc.c	ARM: ux500: get rid of <mach/[hardware|db8500-regs].h>	2013-04-08 13:59:28 +02:00
clk-prcmu.c	clk: ux500: Fix prcmu clocks registration	2013-03-27 08:35:33 -07:00
clk-sysctrl.c	clk: ux500: clk-sysctrl: handle clocks with no parents	2013-05-29 11:52:18 -07:00
clk.h	clk: ux500: fix mismatched types	2013-04-22 11:46:10 -07:00
u8500_clk.c	clk: ux500: Provide device enumeration number suffix for SMSC911x	2013-05-29 11:52:18 -07:00
u8540_clk.c	clk: ux500: Remove BML8580 clock	2013-09-26 11:05:22 +02:00
u9540_clk.c	clk: ux500: Pass clock base adresses in initcall for u8540 and u9540	2013-06-06 18:16:04 -07:00