590 строки
15 KiB
C
590 строки
15 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* R-Car Gen3 THS thermal sensor driver
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* Based on rcar_thermal.c and work from Hien Dang and Khiem Nguyen.
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*
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* Copyright (C) 2016 Renesas Electronics Corporation.
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* Copyright (C) 2016 Sang Engineering
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*/
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/sys_soc.h>
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#include <linux/thermal.h>
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#include "thermal_hwmon.h"
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/* Register offsets */
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#define REG_GEN3_IRQSTR 0x04
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#define REG_GEN3_IRQMSK 0x08
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#define REG_GEN3_IRQCTL 0x0C
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#define REG_GEN3_IRQEN 0x10
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#define REG_GEN3_IRQTEMP1 0x14
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#define REG_GEN3_IRQTEMP2 0x18
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#define REG_GEN3_IRQTEMP3 0x1C
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#define REG_GEN3_CTSR 0x20
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#define REG_GEN3_THCTR 0x20
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#define REG_GEN3_TEMP 0x28
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#define REG_GEN3_THCODE1 0x50
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#define REG_GEN3_THCODE2 0x54
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#define REG_GEN3_THCODE3 0x58
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#define REG_GEN3_PTAT1 0x5c
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#define REG_GEN3_PTAT2 0x60
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#define REG_GEN3_PTAT3 0x64
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#define REG_GEN3_THSCP 0x68
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/* IRQ{STR,MSK,EN} bits */
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#define IRQ_TEMP1 BIT(0)
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#define IRQ_TEMP2 BIT(1)
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#define IRQ_TEMP3 BIT(2)
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#define IRQ_TEMPD1 BIT(3)
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#define IRQ_TEMPD2 BIT(4)
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#define IRQ_TEMPD3 BIT(5)
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/* CTSR bits */
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#define CTSR_PONM BIT(8)
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#define CTSR_AOUT BIT(7)
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#define CTSR_THBGR BIT(5)
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#define CTSR_VMEN BIT(4)
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#define CTSR_VMST BIT(1)
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#define CTSR_THSST BIT(0)
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/* THCTR bits */
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#define THCTR_PONM BIT(6)
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#define THCTR_THSST BIT(0)
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/* THSCP bits */
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#define THSCP_COR_PARA_VLD (BIT(15) | BIT(14))
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#define CTEMP_MASK 0xFFF
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#define MCELSIUS(temp) ((temp) * 1000)
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#define GEN3_FUSE_MASK 0xFFF
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#define TSC_MAX_NUM 5
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/* Structure for thermal temperature calculation */
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struct equation_coefs {
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int a1;
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int b1;
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int a2;
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int b2;
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};
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struct rcar_gen3_thermal_tsc {
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void __iomem *base;
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struct thermal_zone_device *zone;
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struct equation_coefs coef;
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int tj_t;
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int thcode[3];
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};
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struct rcar_gen3_thermal_priv {
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struct rcar_gen3_thermal_tsc *tscs[TSC_MAX_NUM];
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struct thermal_zone_device_ops ops;
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unsigned int num_tscs;
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void (*thermal_init)(struct rcar_gen3_thermal_priv *priv,
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struct rcar_gen3_thermal_tsc *tsc);
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int ptat[3];
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};
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static inline u32 rcar_gen3_thermal_read(struct rcar_gen3_thermal_tsc *tsc,
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u32 reg)
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{
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return ioread32(tsc->base + reg);
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}
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static inline void rcar_gen3_thermal_write(struct rcar_gen3_thermal_tsc *tsc,
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u32 reg, u32 data)
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{
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iowrite32(data, tsc->base + reg);
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}
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/*
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* Linear approximation for temperature
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*
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* [reg] = [temp] * a + b => [temp] = ([reg] - b) / a
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*
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* The constants a and b are calculated using two triplets of int values PTAT
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* and THCODE. PTAT and THCODE can either be read from hardware or use hard
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* coded values from driver. The formula to calculate a and b are taken from
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* BSP and sparsely documented and understood.
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*
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* Examining the linear formula and the formula used to calculate constants a
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* and b while knowing that the span for PTAT and THCODE values are between
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* 0x000 and 0xfff the largest integer possible is 0xfff * 0xfff == 0xffe001.
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* Integer also needs to be signed so that leaves 7 bits for binary
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* fixed point scaling.
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*/
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#define FIXPT_SHIFT 7
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#define FIXPT_INT(_x) ((_x) << FIXPT_SHIFT)
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#define INT_FIXPT(_x) ((_x) >> FIXPT_SHIFT)
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#define FIXPT_DIV(_a, _b) DIV_ROUND_CLOSEST(((_a) << FIXPT_SHIFT), (_b))
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#define FIXPT_TO_MCELSIUS(_x) ((_x) * 1000 >> FIXPT_SHIFT)
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#define RCAR3_THERMAL_GRAN 500 /* mili Celsius */
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/* no idea where these constants come from */
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#define TJ_3 -41
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static void rcar_gen3_thermal_calc_coefs(struct rcar_gen3_thermal_priv *priv,
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struct rcar_gen3_thermal_tsc *tsc,
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int ths_tj_1)
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{
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/* TODO: Find documentation and document constant calculation formula */
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/*
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* Division is not scaled in BSP and if scaled it might overflow
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* the dividend (4095 * 4095 << 14 > INT_MAX) so keep it unscaled
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*/
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tsc->tj_t = (FIXPT_INT((priv->ptat[1] - priv->ptat[2]) * (ths_tj_1 - TJ_3))
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/ (priv->ptat[0] - priv->ptat[2])) + FIXPT_INT(TJ_3);
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tsc->coef.a1 = FIXPT_DIV(FIXPT_INT(tsc->thcode[1] - tsc->thcode[2]),
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tsc->tj_t - FIXPT_INT(TJ_3));
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tsc->coef.b1 = FIXPT_INT(tsc->thcode[2]) - tsc->coef.a1 * TJ_3;
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tsc->coef.a2 = FIXPT_DIV(FIXPT_INT(tsc->thcode[1] - tsc->thcode[0]),
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tsc->tj_t - FIXPT_INT(ths_tj_1));
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tsc->coef.b2 = FIXPT_INT(tsc->thcode[0]) - tsc->coef.a2 * ths_tj_1;
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}
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static int rcar_gen3_thermal_round(int temp)
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{
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int result, round_offs;
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round_offs = temp >= 0 ? RCAR3_THERMAL_GRAN / 2 :
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-RCAR3_THERMAL_GRAN / 2;
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result = (temp + round_offs) / RCAR3_THERMAL_GRAN;
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return result * RCAR3_THERMAL_GRAN;
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}
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static int rcar_gen3_thermal_get_temp(struct thermal_zone_device *tz, int *temp)
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{
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struct rcar_gen3_thermal_tsc *tsc = tz->devdata;
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int mcelsius, val;
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int reg;
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/* Read register and convert to mili Celsius */
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reg = rcar_gen3_thermal_read(tsc, REG_GEN3_TEMP) & CTEMP_MASK;
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if (reg <= tsc->thcode[1])
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val = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b1,
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tsc->coef.a1);
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else
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val = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b2,
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tsc->coef.a2);
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mcelsius = FIXPT_TO_MCELSIUS(val);
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/* Guaranteed operating range is -40C to 125C. */
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/* Round value to device granularity setting */
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*temp = rcar_gen3_thermal_round(mcelsius);
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return 0;
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}
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static int rcar_gen3_thermal_mcelsius_to_temp(struct rcar_gen3_thermal_tsc *tsc,
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int mcelsius)
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{
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int celsius, val;
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celsius = DIV_ROUND_CLOSEST(mcelsius, 1000);
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if (celsius <= INT_FIXPT(tsc->tj_t))
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val = celsius * tsc->coef.a1 + tsc->coef.b1;
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else
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val = celsius * tsc->coef.a2 + tsc->coef.b2;
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return INT_FIXPT(val);
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}
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static int rcar_gen3_thermal_set_trips(struct thermal_zone_device *tz, int low, int high)
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{
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struct rcar_gen3_thermal_tsc *tsc = tz->devdata;
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u32 irqmsk = 0;
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if (low != -INT_MAX) {
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irqmsk |= IRQ_TEMPD1;
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rcar_gen3_thermal_write(tsc, REG_GEN3_IRQTEMP1,
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rcar_gen3_thermal_mcelsius_to_temp(tsc, low));
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}
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if (high != INT_MAX) {
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irqmsk |= IRQ_TEMP2;
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rcar_gen3_thermal_write(tsc, REG_GEN3_IRQTEMP2,
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rcar_gen3_thermal_mcelsius_to_temp(tsc, high));
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}
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rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, irqmsk);
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return 0;
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}
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static const struct thermal_zone_device_ops rcar_gen3_tz_of_ops = {
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.get_temp = rcar_gen3_thermal_get_temp,
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.set_trips = rcar_gen3_thermal_set_trips,
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};
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static irqreturn_t rcar_gen3_thermal_irq(int irq, void *data)
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{
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struct rcar_gen3_thermal_priv *priv = data;
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unsigned int i;
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u32 status;
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for (i = 0; i < priv->num_tscs; i++) {
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status = rcar_gen3_thermal_read(priv->tscs[i], REG_GEN3_IRQSTR);
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rcar_gen3_thermal_write(priv->tscs[i], REG_GEN3_IRQSTR, 0);
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if (status && priv->tscs[i]->zone)
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thermal_zone_device_update(priv->tscs[i]->zone,
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THERMAL_EVENT_UNSPECIFIED);
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}
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return IRQ_HANDLED;
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}
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static const struct soc_device_attribute r8a7795es1[] = {
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{ .soc_id = "r8a7795", .revision = "ES1.*" },
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{ /* sentinel */ }
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};
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static bool rcar_gen3_thermal_read_fuses(struct rcar_gen3_thermal_priv *priv)
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{
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unsigned int i;
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u32 thscp;
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/* If fuses are not set, fallback to pseudo values. */
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thscp = rcar_gen3_thermal_read(priv->tscs[0], REG_GEN3_THSCP);
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if ((thscp & THSCP_COR_PARA_VLD) != THSCP_COR_PARA_VLD) {
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/* Default THCODE values in case FUSEs are not set. */
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static const int thcodes[TSC_MAX_NUM][3] = {
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{ 3397, 2800, 2221 },
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{ 3393, 2795, 2216 },
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{ 3389, 2805, 2237 },
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{ 3415, 2694, 2195 },
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{ 3356, 2724, 2244 },
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};
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priv->ptat[0] = 2631;
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priv->ptat[1] = 1509;
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priv->ptat[2] = 435;
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for (i = 0; i < priv->num_tscs; i++) {
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struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];
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tsc->thcode[0] = thcodes[i][0];
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tsc->thcode[1] = thcodes[i][1];
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tsc->thcode[2] = thcodes[i][2];
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}
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return false;
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}
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/*
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* Set the pseudo calibration points with fused values.
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* PTAT is shared between all TSCs but only fused for the first
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* TSC while THCODEs are fused for each TSC.
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*/
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priv->ptat[0] = rcar_gen3_thermal_read(priv->tscs[0], REG_GEN3_PTAT1) &
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GEN3_FUSE_MASK;
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priv->ptat[1] = rcar_gen3_thermal_read(priv->tscs[0], REG_GEN3_PTAT2) &
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GEN3_FUSE_MASK;
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priv->ptat[2] = rcar_gen3_thermal_read(priv->tscs[0], REG_GEN3_PTAT3) &
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GEN3_FUSE_MASK;
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for (i = 0; i < priv->num_tscs; i++) {
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struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];
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tsc->thcode[0] = rcar_gen3_thermal_read(tsc, REG_GEN3_THCODE1) &
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GEN3_FUSE_MASK;
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tsc->thcode[1] = rcar_gen3_thermal_read(tsc, REG_GEN3_THCODE2) &
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GEN3_FUSE_MASK;
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tsc->thcode[2] = rcar_gen3_thermal_read(tsc, REG_GEN3_THCODE3) &
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GEN3_FUSE_MASK;
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}
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return true;
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}
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static void rcar_gen3_thermal_init_r8a7795es1(struct rcar_gen3_thermal_priv *priv,
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struct rcar_gen3_thermal_tsc *tsc)
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{
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rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, CTSR_THBGR);
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rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, 0x0);
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usleep_range(1000, 2000);
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rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, CTSR_PONM);
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rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0x3F);
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rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0);
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if (priv->ops.set_trips)
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rcar_gen3_thermal_write(tsc, REG_GEN3_IRQEN,
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IRQ_TEMPD1 | IRQ_TEMP2);
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rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,
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CTSR_PONM | CTSR_AOUT | CTSR_THBGR | CTSR_VMEN);
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usleep_range(100, 200);
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rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,
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CTSR_PONM | CTSR_AOUT | CTSR_THBGR | CTSR_VMEN |
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CTSR_VMST | CTSR_THSST);
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usleep_range(1000, 2000);
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}
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static void rcar_gen3_thermal_init(struct rcar_gen3_thermal_priv *priv,
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struct rcar_gen3_thermal_tsc *tsc)
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{
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u32 reg_val;
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reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR);
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reg_val &= ~THCTR_PONM;
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rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val);
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usleep_range(1000, 2000);
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rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0);
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rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0);
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if (priv->ops.set_trips)
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rcar_gen3_thermal_write(tsc, REG_GEN3_IRQEN,
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IRQ_TEMPD1 | IRQ_TEMP2);
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reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR);
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reg_val |= THCTR_THSST;
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rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val);
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usleep_range(1000, 2000);
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}
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static const int rcar_gen3_ths_tj_1 = 126;
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static const int rcar_gen3_ths_tj_1_m3_w = 116;
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static const struct of_device_id rcar_gen3_thermal_dt_ids[] = {
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{
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.compatible = "renesas,r8a774a1-thermal",
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.data = &rcar_gen3_ths_tj_1_m3_w,
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},
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{
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.compatible = "renesas,r8a774b1-thermal",
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.data = &rcar_gen3_ths_tj_1,
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},
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{
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.compatible = "renesas,r8a774e1-thermal",
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.data = &rcar_gen3_ths_tj_1,
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},
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{
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.compatible = "renesas,r8a7795-thermal",
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.data = &rcar_gen3_ths_tj_1,
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},
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{
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.compatible = "renesas,r8a7796-thermal",
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.data = &rcar_gen3_ths_tj_1_m3_w,
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},
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{
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.compatible = "renesas,r8a77961-thermal",
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.data = &rcar_gen3_ths_tj_1_m3_w,
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},
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{
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.compatible = "renesas,r8a77965-thermal",
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.data = &rcar_gen3_ths_tj_1,
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},
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{
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.compatible = "renesas,r8a77980-thermal",
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.data = &rcar_gen3_ths_tj_1,
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},
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{
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.compatible = "renesas,r8a779a0-thermal",
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.data = &rcar_gen3_ths_tj_1,
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},
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{
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.compatible = "renesas,r8a779f0-thermal",
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.data = &rcar_gen3_ths_tj_1,
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},
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{
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.compatible = "renesas,r8a779g0-thermal",
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.data = &rcar_gen3_ths_tj_1,
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},
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{},
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};
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MODULE_DEVICE_TABLE(of, rcar_gen3_thermal_dt_ids);
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static int rcar_gen3_thermal_remove(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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pm_runtime_put(dev);
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pm_runtime_disable(dev);
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return 0;
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}
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static void rcar_gen3_hwmon_action(void *data)
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{
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struct thermal_zone_device *zone = data;
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thermal_remove_hwmon_sysfs(zone);
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}
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static int rcar_gen3_thermal_request_irqs(struct rcar_gen3_thermal_priv *priv,
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struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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unsigned int i;
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char *irqname;
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int ret, irq;
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for (i = 0; i < 2; i++) {
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irq = platform_get_irq_optional(pdev, i);
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if (irq < 0)
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return irq;
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irqname = devm_kasprintf(dev, GFP_KERNEL, "%s:ch%d",
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dev_name(dev), i);
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if (!irqname)
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return -ENOMEM;
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ret = devm_request_threaded_irq(dev, irq, NULL,
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rcar_gen3_thermal_irq,
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IRQF_ONESHOT, irqname, priv);
|
|
if (ret)
|
|
return ret;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int rcar_gen3_thermal_probe(struct platform_device *pdev)
|
|
{
|
|
struct rcar_gen3_thermal_priv *priv;
|
|
struct device *dev = &pdev->dev;
|
|
const int *ths_tj_1 = of_device_get_match_data(dev);
|
|
struct resource *res;
|
|
struct thermal_zone_device *zone;
|
|
unsigned int i;
|
|
int ret;
|
|
|
|
priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
|
|
if (!priv)
|
|
return -ENOMEM;
|
|
|
|
priv->ops = rcar_gen3_tz_of_ops;
|
|
priv->thermal_init = rcar_gen3_thermal_init;
|
|
if (soc_device_match(r8a7795es1))
|
|
priv->thermal_init = rcar_gen3_thermal_init_r8a7795es1;
|
|
|
|
platform_set_drvdata(pdev, priv);
|
|
|
|
if (rcar_gen3_thermal_request_irqs(priv, pdev))
|
|
priv->ops.set_trips = NULL;
|
|
|
|
pm_runtime_enable(dev);
|
|
pm_runtime_get_sync(dev);
|
|
|
|
for (i = 0; i < TSC_MAX_NUM; i++) {
|
|
struct rcar_gen3_thermal_tsc *tsc;
|
|
|
|
res = platform_get_resource(pdev, IORESOURCE_MEM, i);
|
|
if (!res)
|
|
break;
|
|
|
|
tsc = devm_kzalloc(dev, sizeof(*tsc), GFP_KERNEL);
|
|
if (!tsc) {
|
|
ret = -ENOMEM;
|
|
goto error_unregister;
|
|
}
|
|
|
|
tsc->base = devm_ioremap_resource(dev, res);
|
|
if (IS_ERR(tsc->base)) {
|
|
ret = PTR_ERR(tsc->base);
|
|
goto error_unregister;
|
|
}
|
|
|
|
priv->tscs[i] = tsc;
|
|
}
|
|
|
|
priv->num_tscs = i;
|
|
|
|
if (!rcar_gen3_thermal_read_fuses(priv))
|
|
dev_info(dev, "No calibration values fused, fallback to driver values\n");
|
|
|
|
for (i = 0; i < priv->num_tscs; i++) {
|
|
struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];
|
|
|
|
priv->thermal_init(priv, tsc);
|
|
rcar_gen3_thermal_calc_coefs(priv, tsc, *ths_tj_1);
|
|
|
|
zone = devm_thermal_of_zone_register(dev, i, tsc, &priv->ops);
|
|
if (IS_ERR(zone)) {
|
|
dev_err(dev, "Sensor %u: Can't register thermal zone\n", i);
|
|
ret = PTR_ERR(zone);
|
|
goto error_unregister;
|
|
}
|
|
tsc->zone = zone;
|
|
|
|
tsc->zone->tzp->no_hwmon = false;
|
|
ret = thermal_add_hwmon_sysfs(tsc->zone);
|
|
if (ret)
|
|
goto error_unregister;
|
|
|
|
ret = devm_add_action_or_reset(dev, rcar_gen3_hwmon_action, zone);
|
|
if (ret)
|
|
goto error_unregister;
|
|
|
|
ret = thermal_zone_get_num_trips(tsc->zone);
|
|
if (ret < 0)
|
|
goto error_unregister;
|
|
|
|
dev_info(dev, "Sensor %u: Loaded %d trip points\n", i, ret);
|
|
}
|
|
|
|
if (!priv->num_tscs) {
|
|
ret = -ENODEV;
|
|
goto error_unregister;
|
|
}
|
|
|
|
return 0;
|
|
|
|
error_unregister:
|
|
rcar_gen3_thermal_remove(pdev);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int __maybe_unused rcar_gen3_thermal_resume(struct device *dev)
|
|
{
|
|
struct rcar_gen3_thermal_priv *priv = dev_get_drvdata(dev);
|
|
unsigned int i;
|
|
|
|
for (i = 0; i < priv->num_tscs; i++) {
|
|
struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];
|
|
|
|
priv->thermal_init(priv, tsc);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static SIMPLE_DEV_PM_OPS(rcar_gen3_thermal_pm_ops, NULL,
|
|
rcar_gen3_thermal_resume);
|
|
|
|
static struct platform_driver rcar_gen3_thermal_driver = {
|
|
.driver = {
|
|
.name = "rcar_gen3_thermal",
|
|
.pm = &rcar_gen3_thermal_pm_ops,
|
|
.of_match_table = rcar_gen3_thermal_dt_ids,
|
|
},
|
|
.probe = rcar_gen3_thermal_probe,
|
|
.remove = rcar_gen3_thermal_remove,
|
|
};
|
|
module_platform_driver(rcar_gen3_thermal_driver);
|
|
|
|
MODULE_LICENSE("GPL v2");
|
|
MODULE_DESCRIPTION("R-Car Gen3 THS thermal sensor driver");
|
|
MODULE_AUTHOR("Wolfram Sang <wsa+renesas@sang-engineering.com>");
|