587 строки
15 KiB
C
587 строки
15 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* MaxLinear/Exar USB to Serial driver
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*
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* Copyright (c) 2020 Manivannan Sadhasivam <mani@kernel.org>
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*
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* Based on the initial driver written by Patong Yang:
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*
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* https://lore.kernel.org/r/20180404070634.nhspvmxcjwfgjkcv@advantechmxl-desktop
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*
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* Copyright (c) 2018 Patong Yang <patong.mxl@gmail.com>
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <linux/tty.h>
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#include <linux/usb.h>
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#include <linux/usb/serial.h>
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struct xr_txrx_clk_mask {
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u16 tx;
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u16 rx0;
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u16 rx1;
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};
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#define XR_INT_OSC_HZ 48000000U
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#define XR21V141X_MIN_SPEED 46U
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#define XR21V141X_MAX_SPEED XR_INT_OSC_HZ
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/* USB Requests */
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#define XR21V141X_SET_REQ 0
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#define XR21V141X_GET_REQ 1
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#define XR21V141X_CLOCK_DIVISOR_0 0x04
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#define XR21V141X_CLOCK_DIVISOR_1 0x05
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#define XR21V141X_CLOCK_DIVISOR_2 0x06
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#define XR21V141X_TX_CLOCK_MASK_0 0x07
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#define XR21V141X_TX_CLOCK_MASK_1 0x08
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#define XR21V141X_RX_CLOCK_MASK_0 0x09
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#define XR21V141X_RX_CLOCK_MASK_1 0x0a
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/* XR21V141X register blocks */
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#define XR21V141X_UART_REG_BLOCK 0
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#define XR21V141X_UM_REG_BLOCK 4
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#define XR21V141X_UART_CUSTOM_BLOCK 0x66
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/* XR21V141X UART Manager Registers */
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#define XR21V141X_UM_FIFO_ENABLE_REG 0x10
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#define XR21V141X_UM_ENABLE_TX_FIFO 0x01
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#define XR21V141X_UM_ENABLE_RX_FIFO 0x02
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#define XR21V141X_UM_RX_FIFO_RESET 0x18
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#define XR21V141X_UM_TX_FIFO_RESET 0x1c
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#define XR21V141X_UART_ENABLE_TX 0x1
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#define XR21V141X_UART_ENABLE_RX 0x2
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#define XR21V141X_UART_MODE_RI BIT(0)
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#define XR21V141X_UART_MODE_CD BIT(1)
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#define XR21V141X_UART_MODE_DSR BIT(2)
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#define XR21V141X_UART_MODE_DTR BIT(3)
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#define XR21V141X_UART_MODE_CTS BIT(4)
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#define XR21V141X_UART_MODE_RTS BIT(5)
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#define XR21V141X_UART_BREAK_ON 0xff
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#define XR21V141X_UART_BREAK_OFF 0
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#define XR21V141X_UART_DATA_MASK GENMASK(3, 0)
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#define XR21V141X_UART_DATA_7 0x7
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#define XR21V141X_UART_DATA_8 0x8
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#define XR21V141X_UART_PARITY_MASK GENMASK(6, 4)
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#define XR21V141X_UART_PARITY_SHIFT 4
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#define XR21V141X_UART_PARITY_NONE (0x0 << XR21V141X_UART_PARITY_SHIFT)
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#define XR21V141X_UART_PARITY_ODD (0x1 << XR21V141X_UART_PARITY_SHIFT)
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#define XR21V141X_UART_PARITY_EVEN (0x2 << XR21V141X_UART_PARITY_SHIFT)
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#define XR21V141X_UART_PARITY_MARK (0x3 << XR21V141X_UART_PARITY_SHIFT)
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#define XR21V141X_UART_PARITY_SPACE (0x4 << XR21V141X_UART_PARITY_SHIFT)
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#define XR21V141X_UART_STOP_MASK BIT(7)
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#define XR21V141X_UART_STOP_SHIFT 7
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#define XR21V141X_UART_STOP_1 (0x0 << XR21V141X_UART_STOP_SHIFT)
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#define XR21V141X_UART_STOP_2 (0x1 << XR21V141X_UART_STOP_SHIFT)
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#define XR21V141X_UART_FLOW_MODE_NONE 0x0
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#define XR21V141X_UART_FLOW_MODE_HW 0x1
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#define XR21V141X_UART_FLOW_MODE_SW 0x2
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#define XR21V141X_UART_MODE_GPIO_MASK GENMASK(2, 0)
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#define XR21V141X_UART_MODE_RTS_CTS 0x1
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#define XR21V141X_UART_MODE_DTR_DSR 0x2
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#define XR21V141X_UART_MODE_RS485 0x3
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#define XR21V141X_UART_MODE_RS485_ADDR 0x4
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#define XR21V141X_REG_ENABLE 0x03
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#define XR21V141X_REG_FORMAT 0x0b
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#define XR21V141X_REG_FLOW_CTRL 0x0c
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#define XR21V141X_REG_XON_CHAR 0x10
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#define XR21V141X_REG_XOFF_CHAR 0x11
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#define XR21V141X_REG_LOOPBACK 0x12
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#define XR21V141X_REG_TX_BREAK 0x14
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#define XR21V141X_REG_RS845_DELAY 0x15
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#define XR21V141X_REG_GPIO_MODE 0x1a
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#define XR21V141X_REG_GPIO_DIR 0x1b
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#define XR21V141X_REG_GPIO_INT_MASK 0x1c
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#define XR21V141X_REG_GPIO_SET 0x1d
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#define XR21V141X_REG_GPIO_CLR 0x1e
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#define XR21V141X_REG_GPIO_STATUS 0x1f
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static int xr_set_reg(struct usb_serial_port *port, u8 block, u8 reg, u8 val)
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{
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struct usb_serial *serial = port->serial;
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int ret;
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ret = usb_control_msg(serial->dev,
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usb_sndctrlpipe(serial->dev, 0),
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XR21V141X_SET_REQ,
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USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
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val, reg | (block << 8), NULL, 0,
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USB_CTRL_SET_TIMEOUT);
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if (ret < 0) {
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dev_err(&port->dev, "Failed to set reg 0x%02x: %d\n", reg, ret);
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return ret;
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}
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return 0;
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}
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static int xr_get_reg(struct usb_serial_port *port, u8 block, u8 reg, u8 *val)
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{
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struct usb_serial *serial = port->serial;
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u8 *dmabuf;
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int ret;
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dmabuf = kmalloc(1, GFP_KERNEL);
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if (!dmabuf)
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return -ENOMEM;
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ret = usb_control_msg(serial->dev,
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usb_rcvctrlpipe(serial->dev, 0),
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XR21V141X_GET_REQ,
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USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
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0, reg | (block << 8), dmabuf, 1,
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USB_CTRL_GET_TIMEOUT);
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if (ret == 1) {
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*val = *dmabuf;
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ret = 0;
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} else {
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dev_err(&port->dev, "Failed to get reg 0x%02x: %d\n", reg, ret);
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if (ret >= 0)
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ret = -EIO;
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}
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kfree(dmabuf);
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return ret;
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}
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static int xr_set_reg_uart(struct usb_serial_port *port, u8 reg, u8 val)
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{
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return xr_set_reg(port, XR21V141X_UART_REG_BLOCK, reg, val);
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}
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static int xr_get_reg_uart(struct usb_serial_port *port, u8 reg, u8 *val)
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{
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return xr_get_reg(port, XR21V141X_UART_REG_BLOCK, reg, val);
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}
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static int xr_set_reg_um(struct usb_serial_port *port, u8 reg, u8 val)
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{
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return xr_set_reg(port, XR21V141X_UM_REG_BLOCK, reg, val);
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}
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/*
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* According to datasheet, below is the recommended sequence for enabling UART
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* module in XR21V141X:
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*
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* Enable Tx FIFO
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* Enable Tx and Rx
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* Enable Rx FIFO
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*/
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static int xr_uart_enable(struct usb_serial_port *port)
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{
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int ret;
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ret = xr_set_reg_um(port, XR21V141X_UM_FIFO_ENABLE_REG,
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XR21V141X_UM_ENABLE_TX_FIFO);
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if (ret)
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return ret;
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ret = xr_set_reg_uart(port, XR21V141X_REG_ENABLE,
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XR21V141X_UART_ENABLE_TX | XR21V141X_UART_ENABLE_RX);
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if (ret)
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return ret;
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ret = xr_set_reg_um(port, XR21V141X_UM_FIFO_ENABLE_REG,
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XR21V141X_UM_ENABLE_TX_FIFO | XR21V141X_UM_ENABLE_RX_FIFO);
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if (ret)
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xr_set_reg_uart(port, XR21V141X_REG_ENABLE, 0);
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return ret;
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}
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static int xr_uart_disable(struct usb_serial_port *port)
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{
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int ret;
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ret = xr_set_reg_uart(port, XR21V141X_REG_ENABLE, 0);
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if (ret)
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return ret;
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ret = xr_set_reg_um(port, XR21V141X_UM_FIFO_ENABLE_REG, 0);
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return ret;
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}
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static int xr_tiocmget(struct tty_struct *tty)
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{
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struct usb_serial_port *port = tty->driver_data;
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u8 status;
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int ret;
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ret = xr_get_reg_uart(port, XR21V141X_REG_GPIO_STATUS, &status);
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if (ret)
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return ret;
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/*
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* Modem control pins are active low, so reading '0' means it is active
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* and '1' means not active.
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*/
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ret = ((status & XR21V141X_UART_MODE_DTR) ? 0 : TIOCM_DTR) |
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((status & XR21V141X_UART_MODE_RTS) ? 0 : TIOCM_RTS) |
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((status & XR21V141X_UART_MODE_CTS) ? 0 : TIOCM_CTS) |
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((status & XR21V141X_UART_MODE_DSR) ? 0 : TIOCM_DSR) |
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((status & XR21V141X_UART_MODE_RI) ? 0 : TIOCM_RI) |
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((status & XR21V141X_UART_MODE_CD) ? 0 : TIOCM_CD);
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return ret;
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}
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static int xr_tiocmset_port(struct usb_serial_port *port,
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unsigned int set, unsigned int clear)
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{
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u8 gpio_set = 0;
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u8 gpio_clr = 0;
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int ret = 0;
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/* Modem control pins are active low, so set & clr are swapped */
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if (set & TIOCM_RTS)
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gpio_clr |= XR21V141X_UART_MODE_RTS;
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if (set & TIOCM_DTR)
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gpio_clr |= XR21V141X_UART_MODE_DTR;
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if (clear & TIOCM_RTS)
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gpio_set |= XR21V141X_UART_MODE_RTS;
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if (clear & TIOCM_DTR)
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gpio_set |= XR21V141X_UART_MODE_DTR;
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/* Writing '0' to gpio_{set/clr} bits has no effect, so no need to do */
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if (gpio_clr)
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ret = xr_set_reg_uart(port, XR21V141X_REG_GPIO_CLR, gpio_clr);
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if (gpio_set)
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ret = xr_set_reg_uart(port, XR21V141X_REG_GPIO_SET, gpio_set);
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return ret;
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}
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static int xr_tiocmset(struct tty_struct *tty,
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unsigned int set, unsigned int clear)
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{
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struct usb_serial_port *port = tty->driver_data;
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return xr_tiocmset_port(port, set, clear);
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}
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static void xr_dtr_rts(struct usb_serial_port *port, int on)
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{
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if (on)
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xr_tiocmset_port(port, TIOCM_DTR | TIOCM_RTS, 0);
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else
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xr_tiocmset_port(port, 0, TIOCM_DTR | TIOCM_RTS);
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}
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static void xr_break_ctl(struct tty_struct *tty, int break_state)
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{
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struct usb_serial_port *port = tty->driver_data;
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u8 state;
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if (break_state == 0)
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state = XR21V141X_UART_BREAK_OFF;
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else
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state = XR21V141X_UART_BREAK_ON;
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dev_dbg(&port->dev, "Turning break %s\n",
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state == XR21V141X_UART_BREAK_OFF ? "off" : "on");
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xr_set_reg_uart(port, XR21V141X_REG_TX_BREAK, state);
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}
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/* Tx and Rx clock mask values obtained from section 3.3.4 of datasheet */
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static const struct xr_txrx_clk_mask xr21v141x_txrx_clk_masks[] = {
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{ 0x000, 0x000, 0x000 },
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{ 0x000, 0x000, 0x000 },
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{ 0x100, 0x000, 0x100 },
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{ 0x020, 0x400, 0x020 },
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{ 0x010, 0x100, 0x010 },
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{ 0x208, 0x040, 0x208 },
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{ 0x104, 0x820, 0x108 },
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{ 0x844, 0x210, 0x884 },
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{ 0x444, 0x110, 0x444 },
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{ 0x122, 0x888, 0x224 },
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{ 0x912, 0x448, 0x924 },
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{ 0x492, 0x248, 0x492 },
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{ 0x252, 0x928, 0x292 },
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{ 0x94a, 0x4a4, 0xa52 },
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{ 0x52a, 0xaa4, 0x54a },
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{ 0xaaa, 0x954, 0x4aa },
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{ 0xaaa, 0x554, 0xaaa },
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{ 0x555, 0xad4, 0x5aa },
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{ 0xb55, 0xab4, 0x55a },
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{ 0x6b5, 0x5ac, 0xb56 },
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{ 0x5b5, 0xd6c, 0x6d6 },
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{ 0xb6d, 0xb6a, 0xdb6 },
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{ 0x76d, 0x6da, 0xbb6 },
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{ 0xedd, 0xdda, 0x76e },
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{ 0xddd, 0xbba, 0xeee },
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{ 0x7bb, 0xf7a, 0xdde },
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{ 0xf7b, 0xef6, 0x7de },
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{ 0xdf7, 0xbf6, 0xf7e },
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{ 0x7f7, 0xfee, 0xefe },
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{ 0xfdf, 0xfbe, 0x7fe },
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{ 0xf7f, 0xefe, 0xffe },
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{ 0xfff, 0xffe, 0xffd },
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};
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static int xr_set_baudrate(struct tty_struct *tty,
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struct usb_serial_port *port)
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{
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u32 divisor, baud, idx;
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u16 tx_mask, rx_mask;
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int ret;
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baud = tty->termios.c_ospeed;
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if (!baud)
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return 0;
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baud = clamp(baud, XR21V141X_MIN_SPEED, XR21V141X_MAX_SPEED);
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divisor = XR_INT_OSC_HZ / baud;
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idx = ((32 * XR_INT_OSC_HZ) / baud) & 0x1f;
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tx_mask = xr21v141x_txrx_clk_masks[idx].tx;
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if (divisor & 0x01)
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rx_mask = xr21v141x_txrx_clk_masks[idx].rx1;
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else
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rx_mask = xr21v141x_txrx_clk_masks[idx].rx0;
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dev_dbg(&port->dev, "Setting baud rate: %u\n", baud);
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/*
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* XR21V141X uses fractional baud rate generator with 48MHz internal
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* oscillator and 19-bit programmable divisor. So theoretically it can
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* generate most commonly used baud rates with high accuracy.
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*/
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ret = xr_set_reg_uart(port, XR21V141X_CLOCK_DIVISOR_0,
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divisor & 0xff);
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if (ret)
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return ret;
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ret = xr_set_reg_uart(port, XR21V141X_CLOCK_DIVISOR_1,
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(divisor >> 8) & 0xff);
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if (ret)
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return ret;
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ret = xr_set_reg_uart(port, XR21V141X_CLOCK_DIVISOR_2,
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(divisor >> 16) & 0xff);
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if (ret)
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return ret;
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ret = xr_set_reg_uart(port, XR21V141X_TX_CLOCK_MASK_0,
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tx_mask & 0xff);
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if (ret)
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return ret;
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ret = xr_set_reg_uart(port, XR21V141X_TX_CLOCK_MASK_1,
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(tx_mask >> 8) & 0xff);
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if (ret)
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return ret;
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ret = xr_set_reg_uart(port, XR21V141X_RX_CLOCK_MASK_0,
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rx_mask & 0xff);
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if (ret)
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return ret;
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ret = xr_set_reg_uart(port, XR21V141X_RX_CLOCK_MASK_1,
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(rx_mask >> 8) & 0xff);
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if (ret)
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return ret;
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tty_encode_baud_rate(tty, baud, baud);
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return 0;
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}
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static void xr_set_flow_mode(struct tty_struct *tty,
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struct usb_serial_port *port,
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struct ktermios *old_termios)
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{
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u8 flow, gpio_mode;
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int ret;
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ret = xr_get_reg_uart(port, XR21V141X_REG_GPIO_MODE, &gpio_mode);
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if (ret)
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return;
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/* Set GPIO mode for controlling the pins manually by default. */
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gpio_mode &= ~XR21V141X_UART_MODE_GPIO_MASK;
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if (C_CRTSCTS(tty) && C_BAUD(tty) != B0) {
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dev_dbg(&port->dev, "Enabling hardware flow ctrl\n");
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gpio_mode |= XR21V141X_UART_MODE_RTS_CTS;
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flow = XR21V141X_UART_FLOW_MODE_HW;
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} else if (I_IXON(tty)) {
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u8 start_char = START_CHAR(tty);
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u8 stop_char = STOP_CHAR(tty);
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dev_dbg(&port->dev, "Enabling sw flow ctrl\n");
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flow = XR21V141X_UART_FLOW_MODE_SW;
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xr_set_reg_uart(port, XR21V141X_REG_XON_CHAR, start_char);
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xr_set_reg_uart(port, XR21V141X_REG_XOFF_CHAR, stop_char);
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} else {
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dev_dbg(&port->dev, "Disabling flow ctrl\n");
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flow = XR21V141X_UART_FLOW_MODE_NONE;
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}
|
|
|
|
/*
|
|
* As per the datasheet, UART needs to be disabled while writing to
|
|
* FLOW_CONTROL register.
|
|
*/
|
|
xr_uart_disable(port);
|
|
xr_set_reg_uart(port, XR21V141X_REG_FLOW_CTRL, flow);
|
|
xr_uart_enable(port);
|
|
|
|
xr_set_reg_uart(port, XR21V141X_REG_GPIO_MODE, gpio_mode);
|
|
|
|
if (C_BAUD(tty) == B0)
|
|
xr_dtr_rts(port, 0);
|
|
else if (old_termios && (old_termios->c_cflag & CBAUD) == B0)
|
|
xr_dtr_rts(port, 1);
|
|
}
|
|
|
|
static void xr_set_termios(struct tty_struct *tty,
|
|
struct usb_serial_port *port,
|
|
struct ktermios *old_termios)
|
|
{
|
|
struct ktermios *termios = &tty->termios;
|
|
u8 bits = 0;
|
|
int ret;
|
|
|
|
if (!old_termios || (tty->termios.c_ospeed != old_termios->c_ospeed))
|
|
xr_set_baudrate(tty, port);
|
|
|
|
switch (C_CSIZE(tty)) {
|
|
case CS5:
|
|
case CS6:
|
|
/* CS5 and CS6 are not supported, so just restore old setting */
|
|
termios->c_cflag &= ~CSIZE;
|
|
if (old_termios)
|
|
termios->c_cflag |= old_termios->c_cflag & CSIZE;
|
|
else
|
|
bits |= XR21V141X_UART_DATA_8;
|
|
break;
|
|
case CS7:
|
|
bits |= XR21V141X_UART_DATA_7;
|
|
break;
|
|
case CS8:
|
|
default:
|
|
bits |= XR21V141X_UART_DATA_8;
|
|
break;
|
|
}
|
|
|
|
if (C_PARENB(tty)) {
|
|
if (C_CMSPAR(tty)) {
|
|
if (C_PARODD(tty))
|
|
bits |= XR21V141X_UART_PARITY_MARK;
|
|
else
|
|
bits |= XR21V141X_UART_PARITY_SPACE;
|
|
} else {
|
|
if (C_PARODD(tty))
|
|
bits |= XR21V141X_UART_PARITY_ODD;
|
|
else
|
|
bits |= XR21V141X_UART_PARITY_EVEN;
|
|
}
|
|
}
|
|
|
|
if (C_CSTOPB(tty))
|
|
bits |= XR21V141X_UART_STOP_2;
|
|
else
|
|
bits |= XR21V141X_UART_STOP_1;
|
|
|
|
ret = xr_set_reg_uart(port, XR21V141X_REG_FORMAT, bits);
|
|
if (ret)
|
|
return;
|
|
|
|
xr_set_flow_mode(tty, port, old_termios);
|
|
}
|
|
|
|
static int xr_open(struct tty_struct *tty, struct usb_serial_port *port)
|
|
{
|
|
u8 gpio_dir;
|
|
int ret;
|
|
|
|
ret = xr_uart_enable(port);
|
|
if (ret) {
|
|
dev_err(&port->dev, "Failed to enable UART\n");
|
|
return ret;
|
|
}
|
|
|
|
/*
|
|
* Configure DTR and RTS as outputs and RI, CD, DSR and CTS as
|
|
* inputs.
|
|
*/
|
|
gpio_dir = XR21V141X_UART_MODE_DTR | XR21V141X_UART_MODE_RTS;
|
|
xr_set_reg_uart(port, XR21V141X_REG_GPIO_DIR, gpio_dir);
|
|
|
|
/* Setup termios */
|
|
if (tty)
|
|
xr_set_termios(tty, port, NULL);
|
|
|
|
ret = usb_serial_generic_open(tty, port);
|
|
if (ret) {
|
|
xr_uart_disable(port);
|
|
return ret;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void xr_close(struct usb_serial_port *port)
|
|
{
|
|
usb_serial_generic_close(port);
|
|
|
|
xr_uart_disable(port);
|
|
}
|
|
|
|
static int xr_probe(struct usb_serial *serial, const struct usb_device_id *id)
|
|
{
|
|
/* Don't bind to control interface */
|
|
if (serial->interface->cur_altsetting->desc.bInterfaceNumber == 0)
|
|
return -ENODEV;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct usb_device_id id_table[] = {
|
|
{ USB_DEVICE(0x04e2, 0x1410) }, /* XR21V141X */
|
|
{ }
|
|
};
|
|
MODULE_DEVICE_TABLE(usb, id_table);
|
|
|
|
static struct usb_serial_driver xr_device = {
|
|
.driver = {
|
|
.owner = THIS_MODULE,
|
|
.name = "xr_serial",
|
|
},
|
|
.id_table = id_table,
|
|
.num_ports = 1,
|
|
.probe = xr_probe,
|
|
.open = xr_open,
|
|
.close = xr_close,
|
|
.break_ctl = xr_break_ctl,
|
|
.set_termios = xr_set_termios,
|
|
.tiocmget = xr_tiocmget,
|
|
.tiocmset = xr_tiocmset,
|
|
.dtr_rts = xr_dtr_rts
|
|
};
|
|
|
|
static struct usb_serial_driver * const serial_drivers[] = {
|
|
&xr_device, NULL
|
|
};
|
|
|
|
module_usb_serial_driver(serial_drivers, id_table);
|
|
|
|
MODULE_AUTHOR("Manivannan Sadhasivam <mani@kernel.org>");
|
|
MODULE_DESCRIPTION("MaxLinear/Exar USB to Serial driver");
|
|
MODULE_LICENSE("GPL");
|