618 строки
15 KiB
C
618 строки
15 KiB
C
/*
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* Code to handle x86 style IRQs plus some generic interrupt stuff.
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*
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* Copyright (C) 1992 Linus Torvalds
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* Copyright (C) 1994, 1995, 1996, 1997, 1998 Ralf Baechle
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* Copyright (C) 1999 SuSE GmbH (Philipp Rumpf, prumpf@tux.org)
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* Copyright (C) 1999-2000 Grant Grundler
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* Copyright (c) 2005 Matthew Wilcox
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/bitops.h>
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#include <linux/errno.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/kernel_stat.h>
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#include <linux/seq_file.h>
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#include <linux/types.h>
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#include <asm/io.h>
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#include <asm/smp.h>
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#include <asm/ldcw.h>
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#undef PARISC_IRQ_CR16_COUNTS
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extern irqreturn_t timer_interrupt(int, void *);
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extern irqreturn_t ipi_interrupt(int, void *);
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#define EIEM_MASK(irq) (1UL<<(CPU_IRQ_MAX - irq))
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/* Bits in EIEM correlate with cpu_irq_action[].
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** Numbered *Big Endian*! (ie bit 0 is MSB)
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*/
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static volatile unsigned long cpu_eiem = 0;
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/*
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** local ACK bitmap ... habitually set to 1, but reset to zero
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** between ->ack() and ->end() of the interrupt to prevent
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** re-interruption of a processing interrupt.
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*/
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static DEFINE_PER_CPU(unsigned long, local_ack_eiem) = ~0UL;
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static void cpu_mask_irq(struct irq_data *d)
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{
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unsigned long eirr_bit = EIEM_MASK(d->irq);
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cpu_eiem &= ~eirr_bit;
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/* Do nothing on the other CPUs. If they get this interrupt,
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* The & cpu_eiem in the do_cpu_irq_mask() ensures they won't
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* handle it, and the set_eiem() at the bottom will ensure it
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* then gets disabled */
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}
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static void __cpu_unmask_irq(unsigned int irq)
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{
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unsigned long eirr_bit = EIEM_MASK(irq);
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cpu_eiem |= eirr_bit;
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/* This is just a simple NOP IPI. But what it does is cause
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* all the other CPUs to do a set_eiem(cpu_eiem) at the end
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* of the interrupt handler */
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smp_send_all_nop();
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}
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static void cpu_unmask_irq(struct irq_data *d)
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{
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__cpu_unmask_irq(d->irq);
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}
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void cpu_ack_irq(struct irq_data *d)
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{
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unsigned long mask = EIEM_MASK(d->irq);
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int cpu = smp_processor_id();
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/* Clear in EIEM so we can no longer process */
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per_cpu(local_ack_eiem, cpu) &= ~mask;
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/* disable the interrupt */
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set_eiem(cpu_eiem & per_cpu(local_ack_eiem, cpu));
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/* and now ack it */
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mtctl(mask, 23);
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}
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void cpu_eoi_irq(struct irq_data *d)
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{
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unsigned long mask = EIEM_MASK(d->irq);
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int cpu = smp_processor_id();
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/* set it in the eiems---it's no longer in process */
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per_cpu(local_ack_eiem, cpu) |= mask;
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/* enable the interrupt */
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set_eiem(cpu_eiem & per_cpu(local_ack_eiem, cpu));
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}
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#ifdef CONFIG_SMP
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int cpu_check_affinity(struct irq_data *d, const struct cpumask *dest)
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{
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int cpu_dest;
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/* timer and ipi have to always be received on all CPUs */
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if (irqd_is_per_cpu(d))
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return -EINVAL;
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/* whatever mask they set, we just allow one CPU */
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cpu_dest = first_cpu(*dest);
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return cpu_dest;
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}
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static int cpu_set_affinity_irq(struct irq_data *d, const struct cpumask *dest,
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bool force)
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{
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int cpu_dest;
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cpu_dest = cpu_check_affinity(d, dest);
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if (cpu_dest < 0)
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return -1;
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cpumask_copy(d->affinity, dest);
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return 0;
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}
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#endif
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static struct irq_chip cpu_interrupt_type = {
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.name = "CPU",
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.irq_mask = cpu_mask_irq,
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.irq_unmask = cpu_unmask_irq,
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.irq_ack = cpu_ack_irq,
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.irq_eoi = cpu_eoi_irq,
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#ifdef CONFIG_SMP
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.irq_set_affinity = cpu_set_affinity_irq,
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#endif
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/* XXX: Needs to be written. We managed without it so far, but
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* we really ought to write it.
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*/
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.irq_retrigger = NULL,
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};
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DEFINE_PER_CPU_SHARED_ALIGNED(irq_cpustat_t, irq_stat);
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#define irq_stats(x) (&per_cpu(irq_stat, x))
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/*
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* /proc/interrupts printing for arch specific interrupts
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*/
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int arch_show_interrupts(struct seq_file *p, int prec)
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{
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int j;
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#ifdef CONFIG_DEBUG_STACKOVERFLOW
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seq_printf(p, "%*s: ", prec, "STK");
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", irq_stats(j)->kernel_stack_usage);
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seq_puts(p, " Kernel stack usage\n");
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# ifdef CONFIG_IRQSTACKS
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seq_printf(p, "%*s: ", prec, "IST");
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", irq_stats(j)->irq_stack_usage);
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seq_puts(p, " Interrupt stack usage\n");
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# endif
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#endif
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#ifdef CONFIG_SMP
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seq_printf(p, "%*s: ", prec, "RES");
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", irq_stats(j)->irq_resched_count);
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seq_puts(p, " Rescheduling interrupts\n");
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seq_printf(p, "%*s: ", prec, "CAL");
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", irq_stats(j)->irq_call_count);
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seq_puts(p, " Function call interrupts\n");
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#endif
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seq_printf(p, "%*s: ", prec, "UAH");
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", irq_stats(j)->irq_unaligned_count);
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seq_puts(p, " Unaligned access handler traps\n");
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seq_printf(p, "%*s: ", prec, "FPA");
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", irq_stats(j)->irq_fpassist_count);
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seq_puts(p, " Floating point assist traps\n");
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seq_printf(p, "%*s: ", prec, "TLB");
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", irq_stats(j)->irq_tlb_count);
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seq_puts(p, " TLB shootdowns\n");
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return 0;
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}
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int show_interrupts(struct seq_file *p, void *v)
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{
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int i = *(loff_t *) v, j;
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unsigned long flags;
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if (i == 0) {
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seq_puts(p, " ");
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for_each_online_cpu(j)
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seq_printf(p, " CPU%d", j);
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#ifdef PARISC_IRQ_CR16_COUNTS
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seq_printf(p, " [min/avg/max] (CPU cycle counts)");
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#endif
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seq_putc(p, '\n');
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}
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if (i < NR_IRQS) {
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struct irq_desc *desc = irq_to_desc(i);
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struct irqaction *action;
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raw_spin_lock_irqsave(&desc->lock, flags);
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action = desc->action;
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if (!action)
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goto skip;
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seq_printf(p, "%3d: ", i);
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#ifdef CONFIG_SMP
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
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#else
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seq_printf(p, "%10u ", kstat_irqs(i));
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#endif
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seq_printf(p, " %14s", irq_desc_get_chip(desc)->name);
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#ifndef PARISC_IRQ_CR16_COUNTS
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seq_printf(p, " %s", action->name);
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while ((action = action->next))
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seq_printf(p, ", %s", action->name);
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#else
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for ( ;action; action = action->next) {
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unsigned int k, avg, min, max;
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min = max = action->cr16_hist[0];
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for (avg = k = 0; k < PARISC_CR16_HIST_SIZE; k++) {
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int hist = action->cr16_hist[k];
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if (hist) {
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avg += hist;
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} else
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break;
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if (hist > max) max = hist;
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if (hist < min) min = hist;
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}
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avg /= k;
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seq_printf(p, " %s[%d/%d/%d]", action->name,
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min,avg,max);
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}
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#endif
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seq_putc(p, '\n');
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skip:
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raw_spin_unlock_irqrestore(&desc->lock, flags);
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}
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if (i == NR_IRQS)
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arch_show_interrupts(p, 3);
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return 0;
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}
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/*
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** The following form a "set": Virtual IRQ, Transaction Address, Trans Data.
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** Respectively, these map to IRQ region+EIRR, Processor HPA, EIRR bit.
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**
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** To use txn_XXX() interfaces, get a Virtual IRQ first.
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** Then use that to get the Transaction address and data.
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*/
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int cpu_claim_irq(unsigned int irq, struct irq_chip *type, void *data)
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{
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if (irq_has_action(irq))
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return -EBUSY;
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if (irq_get_chip(irq) != &cpu_interrupt_type)
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return -EBUSY;
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/* for iosapic interrupts */
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if (type) {
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irq_set_chip_and_handler(irq, type, handle_percpu_irq);
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irq_set_chip_data(irq, data);
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__cpu_unmask_irq(irq);
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}
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return 0;
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}
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int txn_claim_irq(int irq)
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{
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return cpu_claim_irq(irq, NULL, NULL) ? -1 : irq;
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}
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/*
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* The bits_wide parameter accommodates the limitations of the HW/SW which
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* use these bits:
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* Legacy PA I/O (GSC/NIO): 5 bits (architected EIM register)
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* V-class (EPIC): 6 bits
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* N/L/A-class (iosapic): 8 bits
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* PCI 2.2 MSI: 16 bits
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* Some PCI devices: 32 bits (Symbios SCSI/ATM/HyperFabric)
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*
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* On the service provider side:
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* o PA 1.1 (and PA2.0 narrow mode) 5-bits (width of EIR register)
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* o PA 2.0 wide mode 6-bits (per processor)
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* o IA64 8-bits (0-256 total)
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*
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* So a Legacy PA I/O device on a PA 2.0 box can't use all the bits supported
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* by the processor...and the N/L-class I/O subsystem supports more bits than
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* PA2.0 has. The first case is the problem.
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*/
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int txn_alloc_irq(unsigned int bits_wide)
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{
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int irq;
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/* never return irq 0 cause that's the interval timer */
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for (irq = CPU_IRQ_BASE + 1; irq <= CPU_IRQ_MAX; irq++) {
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if (cpu_claim_irq(irq, NULL, NULL) < 0)
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continue;
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if ((irq - CPU_IRQ_BASE) >= (1 << bits_wide))
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continue;
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return irq;
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}
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/* unlikely, but be prepared */
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return -1;
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}
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unsigned long txn_affinity_addr(unsigned int irq, int cpu)
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{
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#ifdef CONFIG_SMP
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struct irq_data *d = irq_get_irq_data(irq);
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cpumask_copy(d->affinity, cpumask_of(cpu));
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#endif
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return per_cpu(cpu_data, cpu).txn_addr;
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}
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unsigned long txn_alloc_addr(unsigned int virt_irq)
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{
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static int next_cpu = -1;
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next_cpu++; /* assign to "next" CPU we want this bugger on */
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/* validate entry */
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while ((next_cpu < nr_cpu_ids) &&
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(!per_cpu(cpu_data, next_cpu).txn_addr ||
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!cpu_online(next_cpu)))
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next_cpu++;
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if (next_cpu >= nr_cpu_ids)
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next_cpu = 0; /* nothing else, assign monarch */
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return txn_affinity_addr(virt_irq, next_cpu);
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}
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unsigned int txn_alloc_data(unsigned int virt_irq)
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{
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return virt_irq - CPU_IRQ_BASE;
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}
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static inline int eirr_to_irq(unsigned long eirr)
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{
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int bit = fls_long(eirr);
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return (BITS_PER_LONG - bit) + TIMER_IRQ;
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}
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#ifdef CONFIG_IRQSTACKS
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/*
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* IRQ STACK - used for irq handler
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*/
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#define IRQ_STACK_SIZE (4096 << 2) /* 16k irq stack size */
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union irq_stack_union {
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unsigned long stack[IRQ_STACK_SIZE/sizeof(unsigned long)];
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volatile unsigned int slock[4];
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volatile unsigned int lock[1];
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};
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DEFINE_PER_CPU(union irq_stack_union, irq_stack_union) = {
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.slock = { 1,1,1,1 },
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};
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#endif
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int sysctl_panic_on_stackoverflow = 1;
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static inline void stack_overflow_check(struct pt_regs *regs)
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{
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#ifdef CONFIG_DEBUG_STACKOVERFLOW
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#define STACK_MARGIN (256*6)
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/* Our stack starts directly behind the thread_info struct. */
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unsigned long stack_start = (unsigned long) current_thread_info();
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unsigned long sp = regs->gr[30];
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unsigned long stack_usage;
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unsigned int *last_usage;
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int cpu = smp_processor_id();
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/* if sr7 != 0, we interrupted a userspace process which we do not want
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* to check for stack overflow. We will only check the kernel stack. */
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if (regs->sr[7])
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return;
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/* calculate kernel stack usage */
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stack_usage = sp - stack_start;
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#ifdef CONFIG_IRQSTACKS
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if (likely(stack_usage <= THREAD_SIZE))
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goto check_kernel_stack; /* found kernel stack */
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/* check irq stack usage */
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stack_start = (unsigned long) &per_cpu(irq_stack_union, cpu).stack;
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stack_usage = sp - stack_start;
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last_usage = &per_cpu(irq_stat.irq_stack_usage, cpu);
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if (unlikely(stack_usage > *last_usage))
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*last_usage = stack_usage;
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if (likely(stack_usage < (IRQ_STACK_SIZE - STACK_MARGIN)))
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return;
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pr_emerg("stackcheck: %s will most likely overflow irq stack "
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"(sp:%lx, stk bottom-top:%lx-%lx)\n",
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current->comm, sp, stack_start, stack_start + IRQ_STACK_SIZE);
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goto panic_check;
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check_kernel_stack:
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#endif
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/* check kernel stack usage */
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last_usage = &per_cpu(irq_stat.kernel_stack_usage, cpu);
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if (unlikely(stack_usage > *last_usage))
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*last_usage = stack_usage;
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if (likely(stack_usage < (THREAD_SIZE - STACK_MARGIN)))
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return;
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pr_emerg("stackcheck: %s will most likely overflow kernel stack "
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"(sp:%lx, stk bottom-top:%lx-%lx)\n",
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current->comm, sp, stack_start, stack_start + THREAD_SIZE);
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#ifdef CONFIG_IRQSTACKS
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panic_check:
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#endif
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if (sysctl_panic_on_stackoverflow)
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panic("low stack detected by irq handler - check messages\n");
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#endif
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}
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#ifdef CONFIG_IRQSTACKS
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/* in entry.S: */
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void call_on_stack(unsigned long p1, void *func, unsigned long new_stack);
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static void execute_on_irq_stack(void *func, unsigned long param1)
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{
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union irq_stack_union *union_ptr;
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unsigned long irq_stack;
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volatile unsigned int *irq_stack_in_use;
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union_ptr = &per_cpu(irq_stack_union, smp_processor_id());
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irq_stack = (unsigned long) &union_ptr->stack;
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irq_stack = ALIGN(irq_stack + sizeof(irq_stack_union.slock),
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64); /* align for stack frame usage */
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/* We may be called recursive. If we are already using the irq stack,
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* just continue to use it. Use spinlocks to serialize
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* the irq stack usage.
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*/
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irq_stack_in_use = (volatile unsigned int *)__ldcw_align(union_ptr);
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if (!__ldcw(irq_stack_in_use)) {
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void (*direct_call)(unsigned long p1) = func;
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/* We are using the IRQ stack already.
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* Do direct call on current stack. */
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direct_call(param1);
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return;
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}
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/* This is where we switch to the IRQ stack. */
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call_on_stack(param1, func, irq_stack);
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/* free up irq stack usage. */
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*irq_stack_in_use = 1;
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}
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asmlinkage void do_softirq(void)
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{
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__u32 pending;
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unsigned long flags;
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if (in_interrupt())
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return;
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local_irq_save(flags);
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pending = local_softirq_pending();
|
|
|
|
if (pending)
|
|
execute_on_irq_stack(__do_softirq, 0);
|
|
|
|
local_irq_restore(flags);
|
|
}
|
|
#endif /* CONFIG_IRQSTACKS */
|
|
|
|
/* ONLY called from entry.S:intr_extint() */
|
|
void do_cpu_irq_mask(struct pt_regs *regs)
|
|
{
|
|
struct pt_regs *old_regs;
|
|
unsigned long eirr_val;
|
|
int irq, cpu = smp_processor_id();
|
|
#ifdef CONFIG_SMP
|
|
struct irq_desc *desc;
|
|
cpumask_t dest;
|
|
#endif
|
|
|
|
old_regs = set_irq_regs(regs);
|
|
local_irq_disable();
|
|
irq_enter();
|
|
|
|
eirr_val = mfctl(23) & cpu_eiem & per_cpu(local_ack_eiem, cpu);
|
|
if (!eirr_val)
|
|
goto set_out;
|
|
irq = eirr_to_irq(eirr_val);
|
|
|
|
#ifdef CONFIG_SMP
|
|
desc = irq_to_desc(irq);
|
|
cpumask_copy(&dest, desc->irq_data.affinity);
|
|
if (irqd_is_per_cpu(&desc->irq_data) &&
|
|
!cpu_isset(smp_processor_id(), dest)) {
|
|
int cpu = first_cpu(dest);
|
|
|
|
printk(KERN_DEBUG "redirecting irq %d from CPU %d to %d\n",
|
|
irq, smp_processor_id(), cpu);
|
|
gsc_writel(irq + CPU_IRQ_BASE,
|
|
per_cpu(cpu_data, cpu).hpa);
|
|
goto set_out;
|
|
}
|
|
#endif
|
|
stack_overflow_check(regs);
|
|
|
|
#ifdef CONFIG_IRQSTACKS
|
|
execute_on_irq_stack(&generic_handle_irq, irq);
|
|
#else
|
|
generic_handle_irq(irq);
|
|
#endif /* CONFIG_IRQSTACKS */
|
|
|
|
out:
|
|
irq_exit();
|
|
set_irq_regs(old_regs);
|
|
return;
|
|
|
|
set_out:
|
|
set_eiem(cpu_eiem & per_cpu(local_ack_eiem, cpu));
|
|
goto out;
|
|
}
|
|
|
|
static struct irqaction timer_action = {
|
|
.handler = timer_interrupt,
|
|
.name = "timer",
|
|
.flags = IRQF_TIMER | IRQF_PERCPU | IRQF_IRQPOLL,
|
|
};
|
|
|
|
#ifdef CONFIG_SMP
|
|
static struct irqaction ipi_action = {
|
|
.handler = ipi_interrupt,
|
|
.name = "IPI",
|
|
.flags = IRQF_PERCPU,
|
|
};
|
|
#endif
|
|
|
|
static void claim_cpu_irqs(void)
|
|
{
|
|
int i;
|
|
for (i = CPU_IRQ_BASE; i <= CPU_IRQ_MAX; i++) {
|
|
irq_set_chip_and_handler(i, &cpu_interrupt_type,
|
|
handle_percpu_irq);
|
|
}
|
|
|
|
irq_set_handler(TIMER_IRQ, handle_percpu_irq);
|
|
setup_irq(TIMER_IRQ, &timer_action);
|
|
#ifdef CONFIG_SMP
|
|
irq_set_handler(IPI_IRQ, handle_percpu_irq);
|
|
setup_irq(IPI_IRQ, &ipi_action);
|
|
#endif
|
|
}
|
|
|
|
void __init init_IRQ(void)
|
|
{
|
|
local_irq_disable(); /* PARANOID - should already be disabled */
|
|
mtctl(~0UL, 23); /* EIRR : clear all pending external intr */
|
|
#ifdef CONFIG_SMP
|
|
if (!cpu_eiem) {
|
|
claim_cpu_irqs();
|
|
cpu_eiem = EIEM_MASK(IPI_IRQ) | EIEM_MASK(TIMER_IRQ);
|
|
}
|
|
#else
|
|
claim_cpu_irqs();
|
|
cpu_eiem = EIEM_MASK(TIMER_IRQ);
|
|
#endif
|
|
set_eiem(cpu_eiem); /* EIEM : enable all external intr */
|
|
}
|