146 строки
3.5 KiB
C
146 строки
3.5 KiB
C
/*
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* R/W semaphores for ia64
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*
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* Copyright (C) 2003 Ken Chen <kenneth.w.chen@intel.com>
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* Copyright (C) 2003 Asit Mallick <asit.k.mallick@intel.com>
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* Copyright (C) 2005 Christoph Lameter <clameter@sgi.com>
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*
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* Based on asm-i386/rwsem.h and other architecture implementation.
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*
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* The MSW of the count is the negated number of active writers and
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* waiting lockers, and the LSW is the total number of active locks.
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*
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* The lock count is initialized to 0 (no active and no waiting lockers).
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*
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* When a writer subtracts WRITE_BIAS, it'll get 0xffffffff00000001 for
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* the case of an uncontended lock. Readers increment by 1 and see a positive
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* value when uncontended, negative if there are writers (and maybe) readers
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* waiting (in which case it goes to sleep).
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*/
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#ifndef _ASM_IA64_RWSEM_H
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#define _ASM_IA64_RWSEM_H
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#ifndef _LINUX_RWSEM_H
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#error "Please don't include <asm/rwsem.h> directly, use <linux/rwsem.h> instead."
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#endif
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#include <asm/intrinsics.h>
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#define RWSEM_UNLOCKED_VALUE __IA64_UL_CONST(0x0000000000000000)
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#define RWSEM_ACTIVE_BIAS (1L)
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#define RWSEM_ACTIVE_MASK (0xffffffffL)
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#define RWSEM_WAITING_BIAS (-0x100000000L)
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#define RWSEM_ACTIVE_READ_BIAS RWSEM_ACTIVE_BIAS
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#define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS)
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/*
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* lock for reading
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*/
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static inline void
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__down_read (struct rw_semaphore *sem)
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{
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long result = ia64_fetchadd8_acq((unsigned long *)&sem->count, 1);
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if (result < 0)
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rwsem_down_read_failed(sem);
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}
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/*
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* lock for writing
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*/
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static inline void
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__down_write (struct rw_semaphore *sem)
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{
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long old, new;
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do {
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old = sem->count;
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new = old + RWSEM_ACTIVE_WRITE_BIAS;
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} while (cmpxchg_acq(&sem->count, old, new) != old);
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if (old != 0)
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rwsem_down_write_failed(sem);
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}
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/*
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* unlock after reading
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*/
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static inline void
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__up_read (struct rw_semaphore *sem)
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{
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long result = ia64_fetchadd8_rel((unsigned long *)&sem->count, -1);
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if (result < 0 && (--result & RWSEM_ACTIVE_MASK) == 0)
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rwsem_wake(sem);
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}
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/*
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* unlock after writing
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*/
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static inline void
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__up_write (struct rw_semaphore *sem)
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{
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long old, new;
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do {
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old = sem->count;
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new = old - RWSEM_ACTIVE_WRITE_BIAS;
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} while (cmpxchg_rel(&sem->count, old, new) != old);
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if (new < 0 && (new & RWSEM_ACTIVE_MASK) == 0)
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rwsem_wake(sem);
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}
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/*
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* trylock for reading -- returns 1 if successful, 0 if contention
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*/
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static inline int
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__down_read_trylock (struct rw_semaphore *sem)
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{
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long tmp;
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while ((tmp = sem->count) >= 0) {
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if (tmp == cmpxchg_acq(&sem->count, tmp, tmp+1)) {
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return 1;
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}
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}
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return 0;
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}
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/*
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* trylock for writing -- returns 1 if successful, 0 if contention
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*/
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static inline int
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__down_write_trylock (struct rw_semaphore *sem)
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{
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long tmp = cmpxchg_acq(&sem->count, RWSEM_UNLOCKED_VALUE,
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RWSEM_ACTIVE_WRITE_BIAS);
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return tmp == RWSEM_UNLOCKED_VALUE;
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}
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/*
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* downgrade write lock to read lock
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*/
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static inline void
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__downgrade_write (struct rw_semaphore *sem)
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{
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long old, new;
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do {
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old = sem->count;
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new = old - RWSEM_WAITING_BIAS;
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} while (cmpxchg_rel(&sem->count, old, new) != old);
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if (old < 0)
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rwsem_downgrade_wake(sem);
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}
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/*
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* Implement atomic add functionality. These used to be "inline" functions, but GCC v3.1
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* doesn't quite optimize this stuff right and ends up with bad calls to fetchandadd.
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*/
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#define rwsem_atomic_add(delta, sem) atomic64_add(delta, (atomic64_t *)(&(sem)->count))
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#define rwsem_atomic_update(delta, sem) atomic64_add_return(delta, (atomic64_t *)(&(sem)->count))
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#endif /* _ASM_IA64_RWSEM_H */
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