588 строки
15 KiB
C
588 строки
15 KiB
C
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
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*
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* Copyright 2016-2018 HabanaLabs, Ltd.
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* All Rights Reserved.
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*
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*/
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#ifndef HABANALABS_H_
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#define HABANALABS_H_
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#include <linux/types.h>
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#include <linux/ioctl.h>
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/*
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* Defines that are asic-specific but constitutes as ABI between kernel driver
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* and userspace
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*/
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#define GOYA_KMD_SRAM_RESERVED_SIZE_FROM_START 0x8000 /* 32KB */
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/*
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* Queue Numbering
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*
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* The external queues (PCI DMA channels) MUST be before the internal queues
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* and each group (PCI DMA channels and internal) must be contiguous inside
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* itself but there can be a gap between the two groups (although not
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* recommended)
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*/
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enum goya_queue_id {
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GOYA_QUEUE_ID_DMA_0 = 0,
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GOYA_QUEUE_ID_DMA_1,
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GOYA_QUEUE_ID_DMA_2,
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GOYA_QUEUE_ID_DMA_3,
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GOYA_QUEUE_ID_DMA_4,
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GOYA_QUEUE_ID_CPU_PQ,
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GOYA_QUEUE_ID_MME, /* Internal queues start here */
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GOYA_QUEUE_ID_TPC0,
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GOYA_QUEUE_ID_TPC1,
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GOYA_QUEUE_ID_TPC2,
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GOYA_QUEUE_ID_TPC3,
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GOYA_QUEUE_ID_TPC4,
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GOYA_QUEUE_ID_TPC5,
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GOYA_QUEUE_ID_TPC6,
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GOYA_QUEUE_ID_TPC7,
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GOYA_QUEUE_ID_SIZE
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};
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enum hl_device_status {
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HL_DEVICE_STATUS_OPERATIONAL,
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HL_DEVICE_STATUS_IN_RESET,
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HL_DEVICE_STATUS_MALFUNCTION
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};
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/* Opcode for management ioctl */
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#define HL_INFO_HW_IP_INFO 0
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#define HL_INFO_HW_EVENTS 1
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#define HL_INFO_DRAM_USAGE 2
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#define HL_INFO_HW_IDLE 3
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#define HL_INFO_DEVICE_STATUS 4
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#define HL_INFO_VERSION_MAX_LEN 128
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struct hl_info_hw_ip_info {
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__u64 sram_base_address;
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__u64 dram_base_address;
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__u64 dram_size;
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__u32 sram_size;
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__u32 num_of_events;
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__u32 device_id; /* PCI Device ID */
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__u32 reserved[3];
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__u32 armcp_cpld_version;
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__u32 psoc_pci_pll_nr;
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__u32 psoc_pci_pll_nf;
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__u32 psoc_pci_pll_od;
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__u32 psoc_pci_pll_div_factor;
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__u8 tpc_enabled_mask;
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__u8 dram_enabled;
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__u8 pad[2];
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__u8 armcp_version[HL_INFO_VERSION_MAX_LEN];
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};
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struct hl_info_dram_usage {
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__u64 dram_free_mem;
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__u64 ctx_dram_mem;
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};
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struct hl_info_hw_idle {
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__u32 is_idle;
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__u32 pad;
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};
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struct hl_info_device_status {
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__u32 status;
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__u32 pad;
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};
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struct hl_info_args {
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/* Location of relevant struct in userspace */
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__u64 return_pointer;
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/*
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* The size of the return value. Just like "size" in "snprintf",
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* it limits how many bytes the kernel can write
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*
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* For hw_events array, the size should be
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* hl_info_hw_ip_info.num_of_events * sizeof(__u32)
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*/
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__u32 return_size;
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/* HL_INFO_* */
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__u32 op;
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/* Context ID - Currently not in use */
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__u32 ctx_id;
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__u32 pad;
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};
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/* Opcode to create a new command buffer */
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#define HL_CB_OP_CREATE 0
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/* Opcode to destroy previously created command buffer */
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#define HL_CB_OP_DESTROY 1
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struct hl_cb_in {
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/* Handle of CB or 0 if we want to create one */
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__u64 cb_handle;
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/* HL_CB_OP_* */
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__u32 op;
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/* Size of CB. Maximum size is 2MB. The minimum size that will be
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* allocated, regardless of this parameter's value, is PAGE_SIZE
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*/
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__u32 cb_size;
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/* Context ID - Currently not in use */
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__u32 ctx_id;
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__u32 pad;
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};
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struct hl_cb_out {
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/* Handle of CB */
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__u64 cb_handle;
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};
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union hl_cb_args {
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struct hl_cb_in in;
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struct hl_cb_out out;
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};
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/*
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* This structure size must always be fixed to 64-bytes for backward
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* compatibility
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*/
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struct hl_cs_chunk {
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/*
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* For external queue, this represents a Handle of CB on the Host
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* For internal queue, this represents an SRAM or DRAM address of the
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* internal CB
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*/
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__u64 cb_handle;
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/* Index of queue to put the CB on */
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__u32 queue_index;
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/*
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* Size of command buffer with valid packets
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* Can be smaller then actual CB size
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*/
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__u32 cb_size;
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/* HL_CS_CHUNK_FLAGS_* */
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__u32 cs_chunk_flags;
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/* Align structure to 64 bytes */
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__u32 pad[11];
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};
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#define HL_CS_FLAGS_FORCE_RESTORE 0x1
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#define HL_CS_STATUS_SUCCESS 0
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struct hl_cs_in {
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/* this holds address of array of hl_cs_chunk for restore phase */
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__u64 chunks_restore;
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/* this holds address of array of hl_cs_chunk for execution phase */
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__u64 chunks_execute;
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/* this holds address of array of hl_cs_chunk for store phase -
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* Currently not in use
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*/
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__u64 chunks_store;
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/* Number of chunks in restore phase array */
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__u32 num_chunks_restore;
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/* Number of chunks in execution array */
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__u32 num_chunks_execute;
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/* Number of chunks in restore phase array - Currently not in use */
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__u32 num_chunks_store;
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/* HL_CS_FLAGS_* */
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__u32 cs_flags;
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/* Context ID - Currently not in use */
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__u32 ctx_id;
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};
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struct hl_cs_out {
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/*
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* seq holds the sequence number of the CS to pass to wait ioctl. All
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* values are valid except for 0 and ULLONG_MAX
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*/
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__u64 seq;
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/* HL_CS_STATUS_* */
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__u32 status;
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__u32 pad;
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};
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union hl_cs_args {
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struct hl_cs_in in;
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struct hl_cs_out out;
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};
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struct hl_wait_cs_in {
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/* Command submission sequence number */
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__u64 seq;
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/* Absolute timeout to wait in microseconds */
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__u64 timeout_us;
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/* Context ID - Currently not in use */
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__u32 ctx_id;
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__u32 pad;
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};
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#define HL_WAIT_CS_STATUS_COMPLETED 0
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#define HL_WAIT_CS_STATUS_BUSY 1
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#define HL_WAIT_CS_STATUS_TIMEDOUT 2
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#define HL_WAIT_CS_STATUS_ABORTED 3
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#define HL_WAIT_CS_STATUS_INTERRUPTED 4
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struct hl_wait_cs_out {
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/* HL_WAIT_CS_STATUS_* */
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__u32 status;
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__u32 pad;
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};
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union hl_wait_cs_args {
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struct hl_wait_cs_in in;
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struct hl_wait_cs_out out;
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};
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/* Opcode to alloc device memory */
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#define HL_MEM_OP_ALLOC 0
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/* Opcode to free previously allocated device memory */
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#define HL_MEM_OP_FREE 1
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/* Opcode to map host memory */
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#define HL_MEM_OP_MAP 2
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/* Opcode to unmap previously mapped host memory */
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#define HL_MEM_OP_UNMAP 3
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/* Memory flags */
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#define HL_MEM_CONTIGUOUS 0x1
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#define HL_MEM_SHARED 0x2
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#define HL_MEM_USERPTR 0x4
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struct hl_mem_in {
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union {
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/* HL_MEM_OP_ALLOC- allocate device memory */
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struct {
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/* Size to alloc */
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__u64 mem_size;
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} alloc;
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/* HL_MEM_OP_FREE - free device memory */
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struct {
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/* Handle returned from HL_MEM_OP_ALLOC */
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__u64 handle;
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} free;
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/* HL_MEM_OP_MAP - map device memory */
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struct {
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/*
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* Requested virtual address of mapped memory.
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* KMD will try to map the requested region to this
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* hint address, as long as the address is valid and
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* not already mapped. The user should check the
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* returned address of the IOCTL to make sure he got
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* the hint address. Passing 0 here means that KMD
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* will choose the address itself.
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*/
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__u64 hint_addr;
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/* Handle returned from HL_MEM_OP_ALLOC */
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__u64 handle;
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} map_device;
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/* HL_MEM_OP_MAP - map host memory */
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struct {
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/* Address of allocated host memory */
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__u64 host_virt_addr;
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/*
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* Requested virtual address of mapped memory.
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* KMD will try to map the requested region to this
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* hint address, as long as the address is valid and
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* not already mapped. The user should check the
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* returned address of the IOCTL to make sure he got
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* the hint address. Passing 0 here means that KMD
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* will choose the address itself.
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*/
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__u64 hint_addr;
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/* Size of allocated host memory */
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__u64 mem_size;
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} map_host;
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/* HL_MEM_OP_UNMAP - unmap host memory */
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struct {
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/* Virtual address returned from HL_MEM_OP_MAP */
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__u64 device_virt_addr;
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} unmap;
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};
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/* HL_MEM_OP_* */
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__u32 op;
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/* HL_MEM_* flags */
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__u32 flags;
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/* Context ID - Currently not in use */
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__u32 ctx_id;
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__u32 pad;
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};
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struct hl_mem_out {
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union {
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/*
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* Used for HL_MEM_OP_MAP as the virtual address that was
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* assigned in the device VA space.
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* A value of 0 means the requested operation failed.
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*/
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__u64 device_virt_addr;
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/*
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* Used for HL_MEM_OP_ALLOC. This is the assigned
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* handle for the allocated memory
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*/
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__u64 handle;
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};
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};
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union hl_mem_args {
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struct hl_mem_in in;
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struct hl_mem_out out;
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};
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#define HL_DEBUG_MAX_AUX_VALUES 10
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struct hl_debug_params_etr {
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/* Address in memory to allocate buffer */
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__u64 buffer_address;
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/* Size of buffer to allocate */
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__u64 buffer_size;
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/* Sink operation mode: SW fifo, HW fifo, Circular buffer */
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__u32 sink_mode;
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__u32 pad;
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};
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struct hl_debug_params_etf {
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/* Address in memory to allocate buffer */
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__u64 buffer_address;
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/* Size of buffer to allocate */
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__u64 buffer_size;
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/* Sink operation mode: SW fifo, HW fifo, Circular buffer */
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__u32 sink_mode;
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__u32 pad;
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};
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struct hl_debug_params_stm {
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/* Two bit masks for HW event and Stimulus Port */
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__u64 he_mask;
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__u64 sp_mask;
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/* Trace source ID */
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__u32 id;
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/* Frequency for the timestamp register */
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__u32 frequency;
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};
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struct hl_debug_params_bmon {
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/* Two address ranges that the user can request to filter */
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__u64 start_addr0;
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__u64 addr_mask0;
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__u64 start_addr1;
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__u64 addr_mask1;
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/* Capture window configuration */
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__u32 bw_win;
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__u32 win_capture;
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/* Trace source ID */
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__u32 id;
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__u32 pad;
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};
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struct hl_debug_params_spmu {
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/* Event types selection */
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__u64 event_types[HL_DEBUG_MAX_AUX_VALUES];
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/* Number of event types selection */
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__u32 event_types_num;
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__u32 pad;
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};
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/* Opcode for ETR component */
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#define HL_DEBUG_OP_ETR 0
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/* Opcode for ETF component */
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#define HL_DEBUG_OP_ETF 1
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/* Opcode for STM component */
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#define HL_DEBUG_OP_STM 2
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/* Opcode for FUNNEL component */
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#define HL_DEBUG_OP_FUNNEL 3
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/* Opcode for BMON component */
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#define HL_DEBUG_OP_BMON 4
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/* Opcode for SPMU component */
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#define HL_DEBUG_OP_SPMU 5
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/* Opcode for timestamp */
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#define HL_DEBUG_OP_TIMESTAMP 6
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struct hl_debug_args {
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/*
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* Pointer to user input structure.
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* This field is relevant to specific opcodes.
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*/
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__u64 input_ptr;
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/* Pointer to user output structure */
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__u64 output_ptr;
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/* Size of user input structure */
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__u32 input_size;
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/* Size of user output structure */
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__u32 output_size;
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/* HL_DEBUG_OP_* */
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__u32 op;
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/*
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* Register index in the component, taken from the debug_regs_index enum
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* in the various ASIC header files
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*/
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__u32 reg_idx;
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/* Enable/disable */
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__u32 enable;
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/* Context ID - Currently not in use */
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__u32 ctx_id;
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};
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/*
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* Various information operations such as:
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* - H/W IP information
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* - Current dram usage
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*
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* The user calls this IOCTL with an opcode that describes the required
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* information. The user should supply a pointer to a user-allocated memory
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* chunk, which will be filled by the driver with the requested information.
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*
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* The user supplies the maximum amount of size to copy into the user's memory,
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* in order to prevent data corruption in case of differences between the
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* definitions of structures in kernel and userspace, e.g. in case of old
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* userspace and new kernel driver
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*/
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#define HL_IOCTL_INFO \
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_IOWR('H', 0x01, struct hl_info_args)
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/*
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* Command Buffer
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* - Request a Command Buffer
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* - Destroy a Command Buffer
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*
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* The command buffers are memory blocks that reside in DMA-able address
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* space and are physically contiguous so they can be accessed by the device
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* directly. They are allocated using the coherent DMA API.
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*
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* When creating a new CB, the IOCTL returns a handle of it, and the user-space
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* process needs to use that handle to mmap the buffer so it can access them.
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*
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*/
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#define HL_IOCTL_CB \
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_IOWR('H', 0x02, union hl_cb_args)
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/*
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* Command Submission
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*
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* To submit work to the device, the user need to call this IOCTL with a set
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* of JOBS. That set of JOBS constitutes a CS object.
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* Each JOB will be enqueued on a specific queue, according to the user's input.
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* There can be more then one JOB per queue.
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*
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* The CS IOCTL will receive three sets of JOBS. One set is for "restore" phase,
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* a second set is for "execution" phase and a third set is for "store" phase.
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* The JOBS on the "restore" phase are enqueued only after context-switch
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* (or if its the first CS for this context). The user can also order the
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* driver to run the "restore" phase explicitly
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*
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* There are two types of queues - external and internal. External queues
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* are DMA queues which transfer data from/to the Host. All other queues are
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* internal. The driver will get completion notifications from the device only
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* on JOBS which are enqueued in the external queues.
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*
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* For jobs on external queues, the user needs to create command buffers
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* through the CB ioctl and give the CB's handle to the CS ioctl. For jobs on
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* internal queues, the user needs to prepare a "command buffer" with packets
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* on either the SRAM or DRAM, and give the device address of that buffer to
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* the CS ioctl.
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*
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* This IOCTL is asynchronous in regard to the actual execution of the CS. This
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* means it returns immediately after ALL the JOBS were enqueued on their
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* relevant queues. Therefore, the user mustn't assume the CS has been completed
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* or has even started to execute.
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*
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* Upon successful enqueue, the IOCTL returns a sequence number which the user
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* can use with the "Wait for CS" IOCTL to check whether the handle's CS
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* external JOBS have been completed. Note that if the CS has internal JOBS
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* which can execute AFTER the external JOBS have finished, the driver might
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* report that the CS has finished executing BEFORE the internal JOBS have
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* actually finish executing.
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*
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* Even though the sequence number increments per CS, the user can NOT
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* automatically assume that if CS with sequence number N finished, then CS
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* with sequence number N-1 also finished. The user can make this assumption if
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* and only if CS N and CS N-1 are exactly the same (same CBs for the same
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* queues).
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*/
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#define HL_IOCTL_CS \
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_IOWR('H', 0x03, union hl_cs_args)
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/*
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* Wait for Command Submission
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*
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* The user can call this IOCTL with a handle it received from the CS IOCTL
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* to wait until the handle's CS has finished executing. The user will wait
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* inside the kernel until the CS has finished or until the user-requeusted
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* timeout has expired.
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*
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* The return value of the IOCTL is a standard Linux error code. The possible
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* values are:
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*
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* EINTR - Kernel waiting has been interrupted, e.g. due to OS signal
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* that the user process received
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* ETIMEDOUT - The CS has caused a timeout on the device
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* EIO - The CS was aborted (usually because the device was reset)
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* ENODEV - The device wants to do hard-reset (so user need to close FD)
|
|
*
|
|
* The driver also returns a custom define inside the IOCTL which can be:
|
|
*
|
|
* HL_WAIT_CS_STATUS_COMPLETED - The CS has been completed successfully (0)
|
|
* HL_WAIT_CS_STATUS_BUSY - The CS is still executing (0)
|
|
* HL_WAIT_CS_STATUS_TIMEDOUT - The CS has caused a timeout on the device
|
|
* (ETIMEDOUT)
|
|
* HL_WAIT_CS_STATUS_ABORTED - The CS was aborted, usually because the
|
|
* device was reset (EIO)
|
|
* HL_WAIT_CS_STATUS_INTERRUPTED - Waiting for the CS was interrupted (EINTR)
|
|
*
|
|
*/
|
|
|
|
#define HL_IOCTL_WAIT_CS \
|
|
_IOWR('H', 0x04, union hl_wait_cs_args)
|
|
|
|
/*
|
|
* Memory
|
|
* - Map host memory to device MMU
|
|
* - Unmap host memory from device MMU
|
|
*
|
|
* This IOCTL allows the user to map host memory to the device MMU
|
|
*
|
|
* For host memory, the IOCTL doesn't allocate memory. The user is supposed
|
|
* to allocate the memory in user-space (malloc/new). The driver pins the
|
|
* physical pages (up to the allowed limit by the OS), assigns a virtual
|
|
* address in the device VA space and initializes the device MMU.
|
|
*
|
|
* There is an option for the user to specify the requested virtual address.
|
|
*
|
|
*/
|
|
#define HL_IOCTL_MEMORY \
|
|
_IOWR('H', 0x05, union hl_mem_args)
|
|
|
|
/*
|
|
* Debug
|
|
* - Enable/disable the ETR/ETF/FUNNEL/STM/BMON/SPMU debug traces
|
|
*
|
|
* This IOCTL allows the user to get debug traces from the chip.
|
|
*
|
|
* The user needs to provide the register index and essential data such as
|
|
* buffer address and size.
|
|
*
|
|
*/
|
|
#define HL_IOCTL_DEBUG \
|
|
_IOWR('H', 0x06, struct hl_debug_args)
|
|
|
|
#define HL_COMMAND_START 0x01
|
|
#define HL_COMMAND_END 0x07
|
|
|
|
#endif /* HABANALABS_H_ */
|