336 строки
9.2 KiB
C
336 строки
9.2 KiB
C
/*
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* Copyright (C) 2012 Intel Corporation
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; version 2
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* of the License.
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*/
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#if (defined(__i386__) || defined(__x86_64__)) && !defined(__arch_um__)
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#include <linux/raid/pq.h>
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#include "x86.h"
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static int raid6_has_ssse3(void)
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{
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return boot_cpu_has(X86_FEATURE_XMM) &&
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boot_cpu_has(X86_FEATURE_XMM2) &&
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boot_cpu_has(X86_FEATURE_SSSE3);
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}
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void raid6_2data_recov_ssse3(int disks, size_t bytes, int faila, int failb,
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void **ptrs)
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{
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u8 *p, *q, *dp, *dq;
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const u8 *pbmul; /* P multiplier table for B data */
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const u8 *qmul; /* Q multiplier table (for both) */
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static const u8 __aligned(16) x0f[16] = {
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0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f,
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0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f};
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p = (u8 *)ptrs[disks-2];
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q = (u8 *)ptrs[disks-1];
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/* Compute syndrome with zero for the missing data pages
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Use the dead data pages as temporary storage for
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delta p and delta q */
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dp = (u8 *)ptrs[faila];
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ptrs[faila] = (void *)raid6_empty_zero_page;
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ptrs[disks-2] = dp;
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dq = (u8 *)ptrs[failb];
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ptrs[failb] = (void *)raid6_empty_zero_page;
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ptrs[disks-1] = dq;
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raid6_call.gen_syndrome(disks, bytes, ptrs);
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/* Restore pointer table */
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ptrs[faila] = dp;
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ptrs[failb] = dq;
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ptrs[disks-2] = p;
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ptrs[disks-1] = q;
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/* Now, pick the proper data tables */
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pbmul = raid6_vgfmul[raid6_gfexi[failb-faila]];
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qmul = raid6_vgfmul[raid6_gfinv[raid6_gfexp[faila] ^
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raid6_gfexp[failb]]];
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kernel_fpu_begin();
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asm volatile("movdqa %0,%%xmm7" : : "m" (x0f[0]));
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#ifdef CONFIG_X86_64
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asm volatile("movdqa %0,%%xmm6" : : "m" (qmul[0]));
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asm volatile("movdqa %0,%%xmm14" : : "m" (pbmul[0]));
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asm volatile("movdqa %0,%%xmm15" : : "m" (pbmul[16]));
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#endif
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/* Now do it... */
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while (bytes) {
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#ifdef CONFIG_X86_64
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/* xmm6, xmm14, xmm15 */
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asm volatile("movdqa %0,%%xmm1" : : "m" (q[0]));
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asm volatile("movdqa %0,%%xmm9" : : "m" (q[16]));
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asm volatile("movdqa %0,%%xmm0" : : "m" (p[0]));
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asm volatile("movdqa %0,%%xmm8" : : "m" (p[16]));
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asm volatile("pxor %0,%%xmm1" : : "m" (dq[0]));
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asm volatile("pxor %0,%%xmm9" : : "m" (dq[16]));
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asm volatile("pxor %0,%%xmm0" : : "m" (dp[0]));
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asm volatile("pxor %0,%%xmm8" : : "m" (dp[16]));
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/* xmm0/8 = px */
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asm volatile("movdqa %xmm6,%xmm4");
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asm volatile("movdqa %0,%%xmm5" : : "m" (qmul[16]));
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asm volatile("movdqa %xmm6,%xmm12");
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asm volatile("movdqa %xmm5,%xmm13");
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asm volatile("movdqa %xmm1,%xmm3");
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asm volatile("movdqa %xmm9,%xmm11");
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asm volatile("movdqa %xmm0,%xmm2"); /* xmm2/10 = px */
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asm volatile("movdqa %xmm8,%xmm10");
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asm volatile("psraw $4,%xmm1");
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asm volatile("psraw $4,%xmm9");
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asm volatile("pand %xmm7,%xmm3");
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asm volatile("pand %xmm7,%xmm11");
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asm volatile("pand %xmm7,%xmm1");
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asm volatile("pand %xmm7,%xmm9");
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asm volatile("pshufb %xmm3,%xmm4");
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asm volatile("pshufb %xmm11,%xmm12");
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asm volatile("pshufb %xmm1,%xmm5");
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asm volatile("pshufb %xmm9,%xmm13");
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asm volatile("pxor %xmm4,%xmm5");
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asm volatile("pxor %xmm12,%xmm13");
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/* xmm5/13 = qx */
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asm volatile("movdqa %xmm14,%xmm4");
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asm volatile("movdqa %xmm15,%xmm1");
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asm volatile("movdqa %xmm14,%xmm12");
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asm volatile("movdqa %xmm15,%xmm9");
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asm volatile("movdqa %xmm2,%xmm3");
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asm volatile("movdqa %xmm10,%xmm11");
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asm volatile("psraw $4,%xmm2");
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asm volatile("psraw $4,%xmm10");
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asm volatile("pand %xmm7,%xmm3");
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asm volatile("pand %xmm7,%xmm11");
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asm volatile("pand %xmm7,%xmm2");
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asm volatile("pand %xmm7,%xmm10");
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asm volatile("pshufb %xmm3,%xmm4");
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asm volatile("pshufb %xmm11,%xmm12");
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asm volatile("pshufb %xmm2,%xmm1");
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asm volatile("pshufb %xmm10,%xmm9");
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asm volatile("pxor %xmm4,%xmm1");
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asm volatile("pxor %xmm12,%xmm9");
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/* xmm1/9 = pbmul[px] */
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asm volatile("pxor %xmm5,%xmm1");
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asm volatile("pxor %xmm13,%xmm9");
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/* xmm1/9 = db = DQ */
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asm volatile("movdqa %%xmm1,%0" : "=m" (dq[0]));
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asm volatile("movdqa %%xmm9,%0" : "=m" (dq[16]));
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asm volatile("pxor %xmm1,%xmm0");
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asm volatile("pxor %xmm9,%xmm8");
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asm volatile("movdqa %%xmm0,%0" : "=m" (dp[0]));
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asm volatile("movdqa %%xmm8,%0" : "=m" (dp[16]));
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bytes -= 32;
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p += 32;
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q += 32;
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dp += 32;
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dq += 32;
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#else
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asm volatile("movdqa %0,%%xmm1" : : "m" (*q));
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asm volatile("movdqa %0,%%xmm0" : : "m" (*p));
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asm volatile("pxor %0,%%xmm1" : : "m" (*dq));
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asm volatile("pxor %0,%%xmm0" : : "m" (*dp));
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/* 1 = dq ^ q
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* 0 = dp ^ p
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*/
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asm volatile("movdqa %0,%%xmm4" : : "m" (qmul[0]));
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asm volatile("movdqa %0,%%xmm5" : : "m" (qmul[16]));
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asm volatile("movdqa %xmm1,%xmm3");
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asm volatile("psraw $4,%xmm1");
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asm volatile("pand %xmm7,%xmm3");
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asm volatile("pand %xmm7,%xmm1");
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asm volatile("pshufb %xmm3,%xmm4");
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asm volatile("pshufb %xmm1,%xmm5");
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asm volatile("pxor %xmm4,%xmm5");
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asm volatile("movdqa %xmm0,%xmm2"); /* xmm2 = px */
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/* xmm5 = qx */
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asm volatile("movdqa %0,%%xmm4" : : "m" (pbmul[0]));
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asm volatile("movdqa %0,%%xmm1" : : "m" (pbmul[16]));
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asm volatile("movdqa %xmm2,%xmm3");
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asm volatile("psraw $4,%xmm2");
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asm volatile("pand %xmm7,%xmm3");
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asm volatile("pand %xmm7,%xmm2");
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asm volatile("pshufb %xmm3,%xmm4");
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asm volatile("pshufb %xmm2,%xmm1");
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asm volatile("pxor %xmm4,%xmm1");
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/* xmm1 = pbmul[px] */
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asm volatile("pxor %xmm5,%xmm1");
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/* xmm1 = db = DQ */
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asm volatile("movdqa %%xmm1,%0" : "=m" (*dq));
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asm volatile("pxor %xmm1,%xmm0");
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asm volatile("movdqa %%xmm0,%0" : "=m" (*dp));
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bytes -= 16;
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p += 16;
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q += 16;
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dp += 16;
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dq += 16;
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#endif
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}
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kernel_fpu_end();
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}
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void raid6_datap_recov_ssse3(int disks, size_t bytes, int faila, void **ptrs)
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{
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u8 *p, *q, *dq;
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const u8 *qmul; /* Q multiplier table */
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static const u8 __aligned(16) x0f[16] = {
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0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f,
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0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f};
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p = (u8 *)ptrs[disks-2];
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q = (u8 *)ptrs[disks-1];
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/* Compute syndrome with zero for the missing data page
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Use the dead data page as temporary storage for delta q */
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dq = (u8 *)ptrs[faila];
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ptrs[faila] = (void *)raid6_empty_zero_page;
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ptrs[disks-1] = dq;
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raid6_call.gen_syndrome(disks, bytes, ptrs);
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/* Restore pointer table */
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ptrs[faila] = dq;
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ptrs[disks-1] = q;
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/* Now, pick the proper data tables */
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qmul = raid6_vgfmul[raid6_gfinv[raid6_gfexp[faila]]];
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kernel_fpu_begin();
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asm volatile("movdqa %0, %%xmm7" : : "m" (x0f[0]));
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while (bytes) {
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#ifdef CONFIG_X86_64
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asm volatile("movdqa %0, %%xmm3" : : "m" (dq[0]));
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asm volatile("movdqa %0, %%xmm4" : : "m" (dq[16]));
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asm volatile("pxor %0, %%xmm3" : : "m" (q[0]));
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asm volatile("movdqa %0, %%xmm0" : : "m" (qmul[0]));
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/* xmm3 = q[0] ^ dq[0] */
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asm volatile("pxor %0, %%xmm4" : : "m" (q[16]));
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asm volatile("movdqa %0, %%xmm1" : : "m" (qmul[16]));
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/* xmm4 = q[16] ^ dq[16] */
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asm volatile("movdqa %xmm3, %xmm6");
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asm volatile("movdqa %xmm4, %xmm8");
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/* xmm4 = xmm8 = q[16] ^ dq[16] */
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asm volatile("psraw $4, %xmm3");
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asm volatile("pand %xmm7, %xmm6");
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asm volatile("pand %xmm7, %xmm3");
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asm volatile("pshufb %xmm6, %xmm0");
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asm volatile("pshufb %xmm3, %xmm1");
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asm volatile("movdqa %0, %%xmm10" : : "m" (qmul[0]));
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asm volatile("pxor %xmm0, %xmm1");
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asm volatile("movdqa %0, %%xmm11" : : "m" (qmul[16]));
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/* xmm1 = qmul[q[0] ^ dq[0]] */
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asm volatile("psraw $4, %xmm4");
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asm volatile("pand %xmm7, %xmm8");
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asm volatile("pand %xmm7, %xmm4");
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asm volatile("pshufb %xmm8, %xmm10");
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asm volatile("pshufb %xmm4, %xmm11");
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asm volatile("movdqa %0, %%xmm2" : : "m" (p[0]));
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asm volatile("pxor %xmm10, %xmm11");
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asm volatile("movdqa %0, %%xmm12" : : "m" (p[16]));
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/* xmm11 = qmul[q[16] ^ dq[16]] */
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asm volatile("pxor %xmm1, %xmm2");
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/* xmm2 = p[0] ^ qmul[q[0] ^ dq[0]] */
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asm volatile("pxor %xmm11, %xmm12");
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/* xmm12 = p[16] ^ qmul[q[16] ^ dq[16]] */
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asm volatile("movdqa %%xmm1, %0" : "=m" (dq[0]));
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asm volatile("movdqa %%xmm11, %0" : "=m" (dq[16]));
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asm volatile("movdqa %%xmm2, %0" : "=m" (p[0]));
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asm volatile("movdqa %%xmm12, %0" : "=m" (p[16]));
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bytes -= 32;
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p += 32;
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q += 32;
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dq += 32;
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#else
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asm volatile("movdqa %0, %%xmm3" : : "m" (dq[0]));
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asm volatile("movdqa %0, %%xmm0" : : "m" (qmul[0]));
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asm volatile("pxor %0, %%xmm3" : : "m" (q[0]));
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asm volatile("movdqa %0, %%xmm1" : : "m" (qmul[16]));
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/* xmm3 = *q ^ *dq */
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asm volatile("movdqa %xmm3, %xmm6");
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asm volatile("movdqa %0, %%xmm2" : : "m" (p[0]));
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asm volatile("psraw $4, %xmm3");
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asm volatile("pand %xmm7, %xmm6");
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asm volatile("pand %xmm7, %xmm3");
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asm volatile("pshufb %xmm6, %xmm0");
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asm volatile("pshufb %xmm3, %xmm1");
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asm volatile("pxor %xmm0, %xmm1");
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/* xmm1 = qmul[*q ^ *dq */
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asm volatile("pxor %xmm1, %xmm2");
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/* xmm2 = *p ^ qmul[*q ^ *dq] */
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asm volatile("movdqa %%xmm1, %0" : "=m" (dq[0]));
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asm volatile("movdqa %%xmm2, %0" : "=m" (p[0]));
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bytes -= 16;
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p += 16;
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q += 16;
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dq += 16;
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#endif
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}
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kernel_fpu_end();
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}
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const struct raid6_recov_calls raid6_recov_ssse3 = {
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.data2 = raid6_2data_recov_ssse3,
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.datap = raid6_datap_recov_ssse3,
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.valid = raid6_has_ssse3,
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#ifdef CONFIG_X86_64
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.name = "ssse3x2",
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#else
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.name = "ssse3x1",
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#endif
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.priority = 1,
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};
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#endif
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