188 строки
6.6 KiB
Plaintext
188 строки
6.6 KiB
Plaintext
KVM-specific MSRs.
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Glauber Costa <glommer@redhat.com>, Red Hat Inc, 2010
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=====================================================
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KVM makes use of some custom MSRs to service some requests.
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Custom MSRs have a range reserved for them, that goes from
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0x4b564d00 to 0x4b564dff. There are MSRs outside this area,
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but they are deprecated and their use is discouraged.
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Custom MSR list
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--------
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The current supported Custom MSR list is:
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MSR_KVM_WALL_CLOCK_NEW: 0x4b564d00
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data: 4-byte alignment physical address of a memory area which must be
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in guest RAM. This memory is expected to hold a copy of the following
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structure:
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struct pvclock_wall_clock {
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u32 version;
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u32 sec;
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u32 nsec;
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} __attribute__((__packed__));
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whose data will be filled in by the hypervisor. The hypervisor is only
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guaranteed to update this data at the moment of MSR write.
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Users that want to reliably query this information more than once have
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to write more than once to this MSR. Fields have the following meanings:
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version: guest has to check version before and after grabbing
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time information and check that they are both equal and even.
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An odd version indicates an in-progress update.
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sec: number of seconds for wallclock.
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nsec: number of nanoseconds for wallclock.
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Note that although MSRs are per-CPU entities, the effect of this
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particular MSR is global.
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Availability of this MSR must be checked via bit 3 in 0x4000001 cpuid
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leaf prior to usage.
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MSR_KVM_SYSTEM_TIME_NEW: 0x4b564d01
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data: 4-byte aligned physical address of a memory area which must be in
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guest RAM, plus an enable bit in bit 0. This memory is expected to hold
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a copy of the following structure:
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struct pvclock_vcpu_time_info {
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u32 version;
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u32 pad0;
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u64 tsc_timestamp;
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u64 system_time;
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u32 tsc_to_system_mul;
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s8 tsc_shift;
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u8 flags;
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u8 pad[2];
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} __attribute__((__packed__)); /* 32 bytes */
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whose data will be filled in by the hypervisor periodically. Only one
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write, or registration, is needed for each VCPU. The interval between
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updates of this structure is arbitrary and implementation-dependent.
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The hypervisor may update this structure at any time it sees fit until
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anything with bit0 == 0 is written to it.
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Fields have the following meanings:
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version: guest has to check version before and after grabbing
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time information and check that they are both equal and even.
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An odd version indicates an in-progress update.
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tsc_timestamp: the tsc value at the current VCPU at the time
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of the update of this structure. Guests can subtract this value
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from current tsc to derive a notion of elapsed time since the
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structure update.
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system_time: a host notion of monotonic time, including sleep
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time at the time this structure was last updated. Unit is
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nanoseconds.
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tsc_to_system_mul: a function of the tsc frequency. One has
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to multiply any tsc-related quantity by this value to get
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a value in nanoseconds, besides dividing by 2^tsc_shift
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tsc_shift: cycle to nanosecond divider, as a power of two, to
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allow for shift rights. One has to shift right any tsc-related
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quantity by this value to get a value in nanoseconds, besides
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multiplying by tsc_to_system_mul.
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With this information, guests can derive per-CPU time by
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doing:
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time = (current_tsc - tsc_timestamp)
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time = (time * tsc_to_system_mul) >> tsc_shift
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time = time + system_time
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flags: bits in this field indicate extended capabilities
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coordinated between the guest and the hypervisor. Availability
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of specific flags has to be checked in 0x40000001 cpuid leaf.
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Current flags are:
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flag bit | cpuid bit | meaning
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-------------------------------------------------------------
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| | time measures taken across
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0 | 24 | multiple cpus are guaranteed to
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| | be monotonic
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-------------------------------------------------------------
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Availability of this MSR must be checked via bit 3 in 0x4000001 cpuid
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leaf prior to usage.
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MSR_KVM_WALL_CLOCK: 0x11
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data and functioning: same as MSR_KVM_WALL_CLOCK_NEW. Use that instead.
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This MSR falls outside the reserved KVM range and may be removed in the
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future. Its usage is deprecated.
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Availability of this MSR must be checked via bit 0 in 0x4000001 cpuid
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leaf prior to usage.
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MSR_KVM_SYSTEM_TIME: 0x12
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data and functioning: same as MSR_KVM_SYSTEM_TIME_NEW. Use that instead.
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This MSR falls outside the reserved KVM range and may be removed in the
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future. Its usage is deprecated.
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Availability of this MSR must be checked via bit 0 in 0x4000001 cpuid
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leaf prior to usage.
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The suggested algorithm for detecting kvmclock presence is then:
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if (!kvm_para_available()) /* refer to cpuid.txt */
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return NON_PRESENT;
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flags = cpuid_eax(0x40000001);
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if (flags & 3) {
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msr_kvm_system_time = MSR_KVM_SYSTEM_TIME_NEW;
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msr_kvm_wall_clock = MSR_KVM_WALL_CLOCK_NEW;
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return PRESENT;
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} else if (flags & 0) {
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msr_kvm_system_time = MSR_KVM_SYSTEM_TIME;
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msr_kvm_wall_clock = MSR_KVM_WALL_CLOCK;
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return PRESENT;
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} else
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return NON_PRESENT;
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MSR_KVM_ASYNC_PF_EN: 0x4b564d02
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data: Bits 63-6 hold 64-byte aligned physical address of a
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64 byte memory area which must be in guest RAM and must be
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zeroed. Bits 5-2 are reserved and should be zero. Bit 0 is 1
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when asynchronous page faults are enabled on the vcpu 0 when
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disabled. Bit 2 is 1 if asynchronous page faults can be injected
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when vcpu is in cpl == 0.
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First 4 byte of 64 byte memory location will be written to by
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the hypervisor at the time of asynchronous page fault (APF)
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injection to indicate type of asynchronous page fault. Value
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of 1 means that the page referred to by the page fault is not
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present. Value 2 means that the page is now available. Disabling
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interrupt inhibits APFs. Guest must not enable interrupt
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before the reason is read, or it may be overwritten by another
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APF. Since APF uses the same exception vector as regular page
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fault guest must reset the reason to 0 before it does
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something that can generate normal page fault. If during page
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fault APF reason is 0 it means that this is regular page
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fault.
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During delivery of type 1 APF cr2 contains a token that will
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be used to notify a guest when missing page becomes
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available. When page becomes available type 2 APF is sent with
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cr2 set to the token associated with the page. There is special
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kind of token 0xffffffff which tells vcpu that it should wake
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up all processes waiting for APFs and no individual type 2 APFs
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will be sent.
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If APF is disabled while there are outstanding APFs, they will
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not be delivered.
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Currently type 2 APF will be always delivered on the same vcpu as
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type 1 was, but guest should not rely on that.
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