167 строки
4.7 KiB
C
167 строки
4.7 KiB
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2014-2018 Broadcom
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* Copyright © 2019 Collabora ltd.
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*/
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#ifndef _PANFROST_DRM_H_
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#define _PANFROST_DRM_H_
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#include "drm.h"
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#if defined(__cplusplus)
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extern "C" {
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#endif
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#define DRM_PANFROST_SUBMIT 0x00
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#define DRM_PANFROST_WAIT_BO 0x01
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#define DRM_PANFROST_CREATE_BO 0x02
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#define DRM_PANFROST_MMAP_BO 0x03
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#define DRM_PANFROST_GET_PARAM 0x04
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#define DRM_PANFROST_GET_BO_OFFSET 0x05
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#define DRM_PANFROST_PERFCNT_ENABLE 0x06
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#define DRM_PANFROST_PERFCNT_DUMP 0x07
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#define DRM_IOCTL_PANFROST_SUBMIT DRM_IOW(DRM_COMMAND_BASE + DRM_PANFROST_SUBMIT, struct drm_panfrost_submit)
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#define DRM_IOCTL_PANFROST_WAIT_BO DRM_IOW(DRM_COMMAND_BASE + DRM_PANFROST_WAIT_BO, struct drm_panfrost_wait_bo)
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#define DRM_IOCTL_PANFROST_CREATE_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_PANFROST_CREATE_BO, struct drm_panfrost_create_bo)
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#define DRM_IOCTL_PANFROST_MMAP_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_PANFROST_MMAP_BO, struct drm_panfrost_mmap_bo)
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#define DRM_IOCTL_PANFROST_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_PANFROST_GET_PARAM, struct drm_panfrost_get_param)
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#define DRM_IOCTL_PANFROST_GET_BO_OFFSET DRM_IOWR(DRM_COMMAND_BASE + DRM_PANFROST_GET_BO_OFFSET, struct drm_panfrost_get_bo_offset)
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/*
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* Unstable ioctl(s): only exposed when the unsafe unstable_ioctls module
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* param is set to true.
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* All these ioctl(s) are subject to deprecation, so please don't rely on
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* them for anything but debugging purpose.
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*/
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#define DRM_IOCTL_PANFROST_PERFCNT_ENABLE DRM_IOW(DRM_COMMAND_BASE + DRM_PANFROST_PERFCNT_ENABLE, struct drm_panfrost_perfcnt_enable)
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#define DRM_IOCTL_PANFROST_PERFCNT_DUMP DRM_IOW(DRM_COMMAND_BASE + DRM_PANFROST_PERFCNT_DUMP, struct drm_panfrost_perfcnt_dump)
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#define PANFROST_JD_REQ_FS (1 << 0)
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/**
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* struct drm_panfrost_submit - ioctl argument for submitting commands to the 3D
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* engine.
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*
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* This asks the kernel to have the GPU execute a render command list.
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*/
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struct drm_panfrost_submit {
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/** Address to GPU mapping of job descriptor */
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__u64 jc;
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/** An optional array of sync objects to wait on before starting this job. */
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__u64 in_syncs;
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/** Number of sync objects to wait on before starting this job. */
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__u32 in_sync_count;
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/** An optional sync object to place the completion fence in. */
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__u32 out_sync;
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/** Pointer to a u32 array of the BOs that are referenced by the job. */
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__u64 bo_handles;
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/** Number of BO handles passed in (size is that times 4). */
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__u32 bo_handle_count;
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/** A combination of PANFROST_JD_REQ_* */
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__u32 requirements;
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};
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/**
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* struct drm_panfrost_wait_bo - ioctl argument for waiting for
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* completion of the last DRM_PANFROST_SUBMIT on a BO.
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*
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* This is useful for cases where multiple processes might be
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* rendering to a BO and you want to wait for all rendering to be
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* completed.
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*/
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struct drm_panfrost_wait_bo {
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__u32 handle;
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__u32 pad;
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__s64 timeout_ns; /* absolute */
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};
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/**
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* struct drm_panfrost_create_bo - ioctl argument for creating Panfrost BOs.
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*
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* There are currently no values for the flags argument, but it may be
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* used in a future extension.
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*/
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struct drm_panfrost_create_bo {
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__u32 size;
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__u32 flags;
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/** Returned GEM handle for the BO. */
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__u32 handle;
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/* Pad, must be zero-filled. */
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__u32 pad;
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/**
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* Returned offset for the BO in the GPU address space. This offset
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* is private to the DRM fd and is valid for the lifetime of the GEM
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* handle.
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*
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* This offset value will always be nonzero, since various HW
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* units treat 0 specially.
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*/
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__u64 offset;
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};
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/**
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* struct drm_panfrost_mmap_bo - ioctl argument for mapping Panfrost BOs.
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*
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* This doesn't actually perform an mmap. Instead, it returns the
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* offset you need to use in an mmap on the DRM device node. This
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* means that tools like valgrind end up knowing about the mapped
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* memory.
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*
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* There are currently no values for the flags argument, but it may be
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* used in a future extension.
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*/
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struct drm_panfrost_mmap_bo {
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/** Handle for the object being mapped. */
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__u32 handle;
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__u32 flags;
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/** offset into the drm node to use for subsequent mmap call. */
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__u64 offset;
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};
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enum drm_panfrost_param {
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DRM_PANFROST_PARAM_GPU_PROD_ID,
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};
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struct drm_panfrost_get_param {
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__u32 param;
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__u32 pad;
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__u64 value;
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};
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/**
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* Returns the offset for the BO in the GPU address space for this DRM fd.
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* This is the same value returned by drm_panfrost_create_bo, if that was called
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* from this DRM fd.
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*/
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struct drm_panfrost_get_bo_offset {
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__u32 handle;
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__u32 pad;
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__u64 offset;
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};
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struct drm_panfrost_perfcnt_enable {
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__u32 enable;
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/*
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* On bifrost we have 2 sets of counters, this parameter defines the
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* one to track.
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*/
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__u32 counterset;
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};
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struct drm_panfrost_perfcnt_dump {
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__u64 buf_ptr;
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};
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#if defined(__cplusplus)
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}
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#endif
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#endif /* _PANFROST_DRM_H_ */
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