565 строки
14 KiB
C
565 строки
14 KiB
C
/*
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* Common pmac/prep/chrp pci routines. -- Cort
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*/
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <linux/delay.h>
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#include <linux/string.h>
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#include <linux/init.h>
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#include <linux/capability.h>
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#include <linux/sched.h>
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#include <linux/errno.h>
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#include <linux/bootmem.h>
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#include <linux/irq.h>
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#include <linux/list.h>
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#include <linux/of.h>
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#include <asm/processor.h>
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#include <asm/io.h>
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#include <asm/prom.h>
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#include <asm/sections.h>
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#include <asm/pci-bridge.h>
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#include <asm/ppc-pci.h>
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#include <asm/byteorder.h>
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#include <asm/uaccess.h>
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#include <asm/machdep.h>
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#undef DEBUG
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unsigned long isa_io_base = 0;
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unsigned long pci_dram_offset = 0;
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int pcibios_assign_bus_offset = 1;
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void pcibios_make_OF_bus_map(void);
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static void fixup_broken_pcnet32(struct pci_dev* dev);
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static void fixup_cpc710_pci64(struct pci_dev* dev);
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#ifdef CONFIG_PPC_OF
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static u8* pci_to_OF_bus_map;
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#endif
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/* By default, we don't re-assign bus numbers. We do this only on
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* some pmacs
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*/
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static int pci_assign_all_buses;
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static int pci_bus_count;
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/* This will remain NULL for now, until isa-bridge.c is made common
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* to both 32-bit and 64-bit.
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*/
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struct pci_dev *isa_bridge_pcidev;
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EXPORT_SYMBOL_GPL(isa_bridge_pcidev);
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static void
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fixup_hide_host_resource_fsl(struct pci_dev *dev)
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{
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int i, class = dev->class >> 8;
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if ((class == PCI_CLASS_PROCESSOR_POWERPC ||
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class == PCI_CLASS_BRIDGE_OTHER) &&
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(dev->hdr_type == PCI_HEADER_TYPE_NORMAL) &&
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(dev->bus->parent == NULL)) {
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for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
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dev->resource[i].start = 0;
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dev->resource[i].end = 0;
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dev->resource[i].flags = 0;
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}
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}
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}
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MOTOROLA, PCI_ANY_ID, fixup_hide_host_resource_fsl);
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_FREESCALE, PCI_ANY_ID, fixup_hide_host_resource_fsl);
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static void
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fixup_broken_pcnet32(struct pci_dev* dev)
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{
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if ((dev->class>>8 == PCI_CLASS_NETWORK_ETHERNET)) {
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dev->vendor = PCI_VENDOR_ID_AMD;
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pci_write_config_word(dev, PCI_VENDOR_ID, PCI_VENDOR_ID_AMD);
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}
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}
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TRIDENT, PCI_ANY_ID, fixup_broken_pcnet32);
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static void
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fixup_cpc710_pci64(struct pci_dev* dev)
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{
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/* Hide the PCI64 BARs from the kernel as their content doesn't
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* fit well in the resource management
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*/
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dev->resource[0].start = dev->resource[0].end = 0;
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dev->resource[0].flags = 0;
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dev->resource[1].start = dev->resource[1].end = 0;
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dev->resource[1].flags = 0;
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}
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CPC710_PCI64, fixup_cpc710_pci64);
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#ifdef CONFIG_PPC_OF
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/*
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* Functions below are used on OpenFirmware machines.
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*/
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static void
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make_one_node_map(struct device_node* node, u8 pci_bus)
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{
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const int *bus_range;
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int len;
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if (pci_bus >= pci_bus_count)
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return;
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bus_range = of_get_property(node, "bus-range", &len);
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if (bus_range == NULL || len < 2 * sizeof(int)) {
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printk(KERN_WARNING "Can't get bus-range for %s, "
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"assuming it starts at 0\n", node->full_name);
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pci_to_OF_bus_map[pci_bus] = 0;
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} else
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pci_to_OF_bus_map[pci_bus] = bus_range[0];
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for_each_child_of_node(node, node) {
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struct pci_dev* dev;
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const unsigned int *class_code, *reg;
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class_code = of_get_property(node, "class-code", NULL);
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if (!class_code || ((*class_code >> 8) != PCI_CLASS_BRIDGE_PCI &&
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(*class_code >> 8) != PCI_CLASS_BRIDGE_CARDBUS))
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continue;
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reg = of_get_property(node, "reg", NULL);
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if (!reg)
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continue;
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dev = pci_get_bus_and_slot(pci_bus, ((reg[0] >> 8) & 0xff));
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if (!dev || !dev->subordinate) {
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pci_dev_put(dev);
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continue;
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}
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make_one_node_map(node, dev->subordinate->number);
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pci_dev_put(dev);
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}
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}
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void
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pcibios_make_OF_bus_map(void)
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{
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int i;
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struct pci_controller *hose, *tmp;
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struct property *map_prop;
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struct device_node *dn;
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pci_to_OF_bus_map = kmalloc(pci_bus_count, GFP_KERNEL);
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if (!pci_to_OF_bus_map) {
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printk(KERN_ERR "Can't allocate OF bus map !\n");
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return;
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}
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/* We fill the bus map with invalid values, that helps
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* debugging.
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*/
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for (i=0; i<pci_bus_count; i++)
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pci_to_OF_bus_map[i] = 0xff;
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/* For each hose, we begin searching bridges */
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list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
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struct device_node* node = hose->dn;
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if (!node)
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continue;
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make_one_node_map(node, hose->first_busno);
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}
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dn = of_find_node_by_path("/");
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map_prop = of_find_property(dn, "pci-OF-bus-map", NULL);
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if (map_prop) {
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BUG_ON(pci_bus_count > map_prop->length);
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memcpy(map_prop->value, pci_to_OF_bus_map, pci_bus_count);
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}
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of_node_put(dn);
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#ifdef DEBUG
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printk("PCI->OF bus map:\n");
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for (i=0; i<pci_bus_count; i++) {
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if (pci_to_OF_bus_map[i] == 0xff)
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continue;
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printk("%d -> %d\n", i, pci_to_OF_bus_map[i]);
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}
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#endif
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}
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typedef int (*pci_OF_scan_iterator)(struct device_node* node, void* data);
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static struct device_node*
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scan_OF_pci_childs(struct device_node *parent, pci_OF_scan_iterator filter, void* data)
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{
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struct device_node *node;
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struct device_node* sub_node;
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for_each_child_of_node(parent, node) {
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const unsigned int *class_code;
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if (filter(node, data)) {
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of_node_put(node);
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return node;
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}
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/* For PCI<->PCI bridges or CardBus bridges, we go down
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* Note: some OFs create a parent node "multifunc-device" as
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* a fake root for all functions of a multi-function device,
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* we go down them as well.
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*/
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class_code = of_get_property(node, "class-code", NULL);
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if ((!class_code || ((*class_code >> 8) != PCI_CLASS_BRIDGE_PCI &&
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(*class_code >> 8) != PCI_CLASS_BRIDGE_CARDBUS)) &&
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strcmp(node->name, "multifunc-device"))
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continue;
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sub_node = scan_OF_pci_childs(node, filter, data);
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if (sub_node) {
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of_node_put(node);
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return sub_node;
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}
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}
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return NULL;
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}
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static struct device_node *scan_OF_for_pci_dev(struct device_node *parent,
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unsigned int devfn)
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{
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struct device_node *np;
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const u32 *reg;
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unsigned int psize;
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for_each_child_of_node(parent, np) {
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reg = of_get_property(np, "reg", &psize);
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if (reg == NULL || psize < 4)
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continue;
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if (((reg[0] >> 8) & 0xff) == devfn)
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return np;
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}
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return NULL;
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}
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static struct device_node *scan_OF_for_pci_bus(struct pci_bus *bus)
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{
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struct device_node *parent, *np;
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/* Are we a root bus ? */
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if (bus->self == NULL || bus->parent == NULL) {
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struct pci_controller *hose = pci_bus_to_host(bus);
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if (hose == NULL)
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return NULL;
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return of_node_get(hose->dn);
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}
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/* not a root bus, we need to get our parent */
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parent = scan_OF_for_pci_bus(bus->parent);
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if (parent == NULL)
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return NULL;
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/* now iterate for children for a match */
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np = scan_OF_for_pci_dev(parent, bus->self->devfn);
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of_node_put(parent);
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return np;
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}
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/*
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* Scans the OF tree for a device node matching a PCI device
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*/
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struct device_node *
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pci_busdev_to_OF_node(struct pci_bus *bus, int devfn)
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{
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struct device_node *parent, *np;
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pr_debug("pci_busdev_to_OF_node(%d,0x%x)\n", bus->number, devfn);
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parent = scan_OF_for_pci_bus(bus);
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if (parent == NULL)
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return NULL;
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pr_debug(" parent is %s\n", parent ? parent->full_name : "<NULL>");
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np = scan_OF_for_pci_dev(parent, devfn);
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of_node_put(parent);
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pr_debug(" result is %s\n", np ? np->full_name : "<NULL>");
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/* XXX most callers don't release the returned node
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* mostly because ppc64 doesn't increase the refcount,
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* we need to fix that.
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*/
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return np;
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}
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EXPORT_SYMBOL(pci_busdev_to_OF_node);
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struct device_node*
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pci_device_to_OF_node(struct pci_dev *dev)
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{
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return pci_busdev_to_OF_node(dev->bus, dev->devfn);
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}
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EXPORT_SYMBOL(pci_device_to_OF_node);
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static int
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find_OF_pci_device_filter(struct device_node* node, void* data)
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{
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return ((void *)node == data);
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}
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/*
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* Returns the PCI device matching a given OF node
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*/
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int
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pci_device_from_OF_node(struct device_node* node, u8* bus, u8* devfn)
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{
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const unsigned int *reg;
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struct pci_controller* hose;
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struct pci_dev* dev = NULL;
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/* Make sure it's really a PCI device */
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hose = pci_find_hose_for_OF_device(node);
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if (!hose || !hose->dn)
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return -ENODEV;
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if (!scan_OF_pci_childs(hose->dn,
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find_OF_pci_device_filter, (void *)node))
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return -ENODEV;
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reg = of_get_property(node, "reg", NULL);
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if (!reg)
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return -ENODEV;
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*bus = (reg[0] >> 16) & 0xff;
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*devfn = ((reg[0] >> 8) & 0xff);
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/* Ok, here we need some tweak. If we have already renumbered
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* all busses, we can't rely on the OF bus number any more.
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* the pci_to_OF_bus_map is not enough as several PCI busses
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* may match the same OF bus number.
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*/
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if (!pci_to_OF_bus_map)
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return 0;
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for_each_pci_dev(dev)
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if (pci_to_OF_bus_map[dev->bus->number] == *bus &&
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dev->devfn == *devfn) {
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*bus = dev->bus->number;
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pci_dev_put(dev);
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return 0;
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}
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return -ENODEV;
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}
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EXPORT_SYMBOL(pci_device_from_OF_node);
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/* We create the "pci-OF-bus-map" property now so it appears in the
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* /proc device tree
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*/
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void __init
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pci_create_OF_bus_map(void)
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{
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struct property* of_prop;
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struct device_node *dn;
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of_prop = (struct property*) alloc_bootmem(sizeof(struct property) + 256);
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if (!of_prop)
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return;
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dn = of_find_node_by_path("/");
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if (dn) {
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memset(of_prop, -1, sizeof(struct property) + 256);
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of_prop->name = "pci-OF-bus-map";
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of_prop->length = 256;
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of_prop->value = &of_prop[1];
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prom_add_property(dn, of_prop);
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of_node_put(dn);
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}
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}
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#else /* CONFIG_PPC_OF */
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void pcibios_make_OF_bus_map(void)
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{
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}
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#endif /* CONFIG_PPC_OF */
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static void __devinit pcibios_scan_phb(struct pci_controller *hose)
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{
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struct pci_bus *bus;
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struct device_node *node = hose->dn;
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unsigned long io_offset;
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struct resource *res = &hose->io_resource;
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pr_debug("PCI: Scanning PHB %s\n",
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node ? node->full_name : "<NO NAME>");
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/* Create an empty bus for the toplevel */
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bus = pci_create_bus(hose->parent, hose->first_busno, hose->ops, hose);
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if (bus == NULL) {
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printk(KERN_ERR "Failed to create bus for PCI domain %04x\n",
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hose->global_number);
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return;
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}
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bus->secondary = hose->first_busno;
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hose->bus = bus;
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/* Fixup IO space offset */
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io_offset = (unsigned long)hose->io_base_virt - isa_io_base;
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res->start = (res->start + io_offset) & 0xffffffffu;
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res->end = (res->end + io_offset) & 0xffffffffu;
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/* Wire up PHB bus resources */
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pcibios_setup_phb_resources(hose);
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/* Scan children */
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hose->last_busno = bus->subordinate = pci_scan_child_bus(bus);
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}
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static int __init pcibios_init(void)
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{
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struct pci_controller *hose, *tmp;
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int next_busno = 0;
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printk(KERN_INFO "PCI: Probing PCI hardware\n");
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if (ppc_pci_flags & PPC_PCI_REASSIGN_ALL_BUS)
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pci_assign_all_buses = 1;
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/* Scan all of the recorded PCI controllers. */
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list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
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if (pci_assign_all_buses)
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hose->first_busno = next_busno;
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hose->last_busno = 0xff;
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pcibios_scan_phb(hose);
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pci_bus_add_devices(hose->bus);
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if (pci_assign_all_buses || next_busno <= hose->last_busno)
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next_busno = hose->last_busno + pcibios_assign_bus_offset;
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}
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pci_bus_count = next_busno;
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/* OpenFirmware based machines need a map of OF bus
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* numbers vs. kernel bus numbers since we may have to
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* remap them.
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*/
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if (pci_assign_all_buses)
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pcibios_make_OF_bus_map();
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/* Call common code to handle resource allocation */
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pcibios_resource_survey();
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/* Call machine dependent post-init code */
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if (ppc_md.pcibios_after_init)
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ppc_md.pcibios_after_init();
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return 0;
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}
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subsys_initcall(pcibios_init);
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/* the next one is stolen from the alpha port... */
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void __init
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pcibios_update_irq(struct pci_dev *dev, int irq)
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{
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pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
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/* XXX FIXME - update OF device tree node interrupt property */
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}
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static struct pci_controller*
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pci_bus_to_hose(int bus)
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{
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struct pci_controller *hose, *tmp;
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list_for_each_entry_safe(hose, tmp, &hose_list, list_node)
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if (bus >= hose->first_busno && bus <= hose->last_busno)
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return hose;
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return NULL;
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}
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/* Provide information on locations of various I/O regions in physical
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* memory. Do this on a per-card basis so that we choose the right
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* root bridge.
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* Note that the returned IO or memory base is a physical address
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*/
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long sys_pciconfig_iobase(long which, unsigned long bus, unsigned long devfn)
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{
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struct pci_controller* hose;
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long result = -EOPNOTSUPP;
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hose = pci_bus_to_hose(bus);
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if (!hose)
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return -ENODEV;
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switch (which) {
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case IOBASE_BRIDGE_NUMBER:
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return (long)hose->first_busno;
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case IOBASE_MEMORY:
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return (long)hose->pci_mem_offset;
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case IOBASE_IO:
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return (long)hose->io_base_phys;
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case IOBASE_ISA_IO:
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return (long)isa_io_base;
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case IOBASE_ISA_MEM:
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return (long)isa_mem_base;
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}
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return result;
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}
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/*
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* Null PCI config access functions, for the case when we can't
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* find a hose.
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*/
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#define NULL_PCI_OP(rw, size, type) \
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static int \
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null_##rw##_config_##size(struct pci_dev *dev, int offset, type val) \
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{ \
|
|
return PCIBIOS_DEVICE_NOT_FOUND; \
|
|
}
|
|
|
|
static int
|
|
null_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
|
|
int len, u32 *val)
|
|
{
|
|
return PCIBIOS_DEVICE_NOT_FOUND;
|
|
}
|
|
|
|
static int
|
|
null_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
|
|
int len, u32 val)
|
|
{
|
|
return PCIBIOS_DEVICE_NOT_FOUND;
|
|
}
|
|
|
|
static struct pci_ops null_pci_ops =
|
|
{
|
|
.read = null_read_config,
|
|
.write = null_write_config,
|
|
};
|
|
|
|
/*
|
|
* These functions are used early on before PCI scanning is done
|
|
* and all of the pci_dev and pci_bus structures have been created.
|
|
*/
|
|
static struct pci_bus *
|
|
fake_pci_bus(struct pci_controller *hose, int busnr)
|
|
{
|
|
static struct pci_bus bus;
|
|
|
|
if (hose == 0) {
|
|
hose = pci_bus_to_hose(busnr);
|
|
if (hose == 0)
|
|
printk(KERN_ERR "Can't find hose for PCI bus %d!\n", busnr);
|
|
}
|
|
bus.number = busnr;
|
|
bus.sysdata = hose;
|
|
bus.ops = hose? hose->ops: &null_pci_ops;
|
|
return &bus;
|
|
}
|
|
|
|
#define EARLY_PCI_OP(rw, size, type) \
|
|
int early_##rw##_config_##size(struct pci_controller *hose, int bus, \
|
|
int devfn, int offset, type value) \
|
|
{ \
|
|
return pci_bus_##rw##_config_##size(fake_pci_bus(hose, bus), \
|
|
devfn, offset, value); \
|
|
}
|
|
|
|
EARLY_PCI_OP(read, byte, u8 *)
|
|
EARLY_PCI_OP(read, word, u16 *)
|
|
EARLY_PCI_OP(read, dword, u32 *)
|
|
EARLY_PCI_OP(write, byte, u8)
|
|
EARLY_PCI_OP(write, word, u16)
|
|
EARLY_PCI_OP(write, dword, u32)
|
|
|
|
extern int pci_bus_find_capability (struct pci_bus *bus, unsigned int devfn, int cap);
|
|
int early_find_capability(struct pci_controller *hose, int bus, int devfn,
|
|
int cap)
|
|
{
|
|
return pci_bus_find_capability(fake_pci_bus(hose, bus), devfn, cap);
|
|
}
|