287 строки
6.2 KiB
C
287 строки
6.2 KiB
C
/*
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* Copyright (c) 2010-2014, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/clk.h>
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#include <linux/interrupt.h>
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#include <linux/module.h>
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#include <linux/mod_devicetable.h>
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#include <linux/platform_device.h>
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#include <linux/spinlock.h>
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#include <linux/types.h>
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#include <crypto/algapi.h>
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#include <crypto/internal/hash.h>
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#include <crypto/sha.h>
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#include "core.h"
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#include "cipher.h"
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#include "sha.h"
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#define QCE_MAJOR_VERSION5 0x05
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#define QCE_QUEUE_LENGTH 1
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static const struct qce_algo_ops *qce_ops[] = {
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&ablkcipher_ops,
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&ahash_ops,
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};
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static void qce_unregister_algs(struct qce_device *qce)
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{
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const struct qce_algo_ops *ops;
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int i;
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for (i = 0; i < ARRAY_SIZE(qce_ops); i++) {
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ops = qce_ops[i];
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ops->unregister_algs(qce);
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}
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}
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static int qce_register_algs(struct qce_device *qce)
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{
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const struct qce_algo_ops *ops;
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int i, ret = -ENODEV;
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for (i = 0; i < ARRAY_SIZE(qce_ops); i++) {
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ops = qce_ops[i];
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ret = ops->register_algs(qce);
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if (ret)
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break;
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}
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return ret;
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}
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static int qce_handle_request(struct crypto_async_request *async_req)
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{
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int ret = -EINVAL, i;
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const struct qce_algo_ops *ops;
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u32 type = crypto_tfm_alg_type(async_req->tfm);
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for (i = 0; i < ARRAY_SIZE(qce_ops); i++) {
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ops = qce_ops[i];
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if (type != ops->type)
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continue;
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ret = ops->async_req_handle(async_req);
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break;
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}
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return ret;
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}
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static int qce_handle_queue(struct qce_device *qce,
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struct crypto_async_request *req)
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{
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struct crypto_async_request *async_req, *backlog;
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unsigned long flags;
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int ret = 0, err;
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spin_lock_irqsave(&qce->lock, flags);
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if (req)
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ret = crypto_enqueue_request(&qce->queue, req);
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/* busy, do not dequeue request */
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if (qce->req) {
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spin_unlock_irqrestore(&qce->lock, flags);
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return ret;
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}
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backlog = crypto_get_backlog(&qce->queue);
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async_req = crypto_dequeue_request(&qce->queue);
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if (async_req)
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qce->req = async_req;
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spin_unlock_irqrestore(&qce->lock, flags);
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if (!async_req)
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return ret;
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if (backlog) {
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spin_lock_bh(&qce->lock);
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backlog->complete(backlog, -EINPROGRESS);
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spin_unlock_bh(&qce->lock);
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}
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err = qce_handle_request(async_req);
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if (err) {
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qce->result = err;
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tasklet_schedule(&qce->done_tasklet);
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}
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return ret;
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}
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static void qce_tasklet_req_done(unsigned long data)
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{
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struct qce_device *qce = (struct qce_device *)data;
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struct crypto_async_request *req;
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unsigned long flags;
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spin_lock_irqsave(&qce->lock, flags);
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req = qce->req;
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qce->req = NULL;
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spin_unlock_irqrestore(&qce->lock, flags);
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if (req)
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req->complete(req, qce->result);
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qce_handle_queue(qce, NULL);
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}
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static int qce_async_request_enqueue(struct qce_device *qce,
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struct crypto_async_request *req)
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{
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return qce_handle_queue(qce, req);
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}
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static void qce_async_request_done(struct qce_device *qce, int ret)
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{
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qce->result = ret;
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tasklet_schedule(&qce->done_tasklet);
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}
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static int qce_check_version(struct qce_device *qce)
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{
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u32 major, minor, step;
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qce_get_version(qce, &major, &minor, &step);
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/*
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* the driver does not support v5 with minor 0 because it has special
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* alignment requirements.
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*/
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if (major != QCE_MAJOR_VERSION5 || minor == 0)
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return -ENODEV;
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qce->burst_size = QCE_BAM_BURST_SIZE;
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qce->pipe_pair_id = 1;
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dev_dbg(qce->dev, "Crypto device found, version %d.%d.%d\n",
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major, minor, step);
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return 0;
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}
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static int qce_crypto_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct qce_device *qce;
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struct resource *res;
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int ret;
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qce = devm_kzalloc(dev, sizeof(*qce), GFP_KERNEL);
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if (!qce)
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return -ENOMEM;
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qce->dev = dev;
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platform_set_drvdata(pdev, qce);
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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qce->base = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(qce->base))
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return PTR_ERR(qce->base);
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ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
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if (ret < 0)
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return ret;
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qce->core = devm_clk_get(qce->dev, "core");
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if (IS_ERR(qce->core))
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return PTR_ERR(qce->core);
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qce->iface = devm_clk_get(qce->dev, "iface");
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if (IS_ERR(qce->iface))
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return PTR_ERR(qce->iface);
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qce->bus = devm_clk_get(qce->dev, "bus");
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if (IS_ERR(qce->bus))
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return PTR_ERR(qce->bus);
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ret = clk_prepare_enable(qce->core);
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if (ret)
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return ret;
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ret = clk_prepare_enable(qce->iface);
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if (ret)
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goto err_clks_core;
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ret = clk_prepare_enable(qce->bus);
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if (ret)
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goto err_clks_iface;
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ret = qce_dma_request(qce->dev, &qce->dma);
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if (ret)
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goto err_clks;
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ret = qce_check_version(qce);
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if (ret)
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goto err_clks;
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spin_lock_init(&qce->lock);
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tasklet_init(&qce->done_tasklet, qce_tasklet_req_done,
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(unsigned long)qce);
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crypto_init_queue(&qce->queue, QCE_QUEUE_LENGTH);
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qce->async_req_enqueue = qce_async_request_enqueue;
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qce->async_req_done = qce_async_request_done;
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ret = qce_register_algs(qce);
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if (ret)
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goto err_dma;
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return 0;
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err_dma:
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qce_dma_release(&qce->dma);
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err_clks:
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clk_disable_unprepare(qce->bus);
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err_clks_iface:
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clk_disable_unprepare(qce->iface);
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err_clks_core:
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clk_disable_unprepare(qce->core);
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return ret;
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}
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static int qce_crypto_remove(struct platform_device *pdev)
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{
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struct qce_device *qce = platform_get_drvdata(pdev);
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tasklet_kill(&qce->done_tasklet);
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qce_unregister_algs(qce);
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qce_dma_release(&qce->dma);
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clk_disable_unprepare(qce->bus);
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clk_disable_unprepare(qce->iface);
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clk_disable_unprepare(qce->core);
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return 0;
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}
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static const struct of_device_id qce_crypto_of_match[] = {
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{ .compatible = "qcom,crypto-v5.1", },
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{}
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};
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MODULE_DEVICE_TABLE(of, qce_crypto_of_match);
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static struct platform_driver qce_crypto_driver = {
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.probe = qce_crypto_probe,
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.remove = qce_crypto_remove,
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.driver = {
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.name = KBUILD_MODNAME,
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.of_match_table = qce_crypto_of_match,
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},
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};
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module_platform_driver(qce_crypto_driver);
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MODULE_LICENSE("GPL v2");
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MODULE_DESCRIPTION("Qualcomm crypto engine driver");
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MODULE_ALIAS("platform:" KBUILD_MODNAME);
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MODULE_AUTHOR("The Linux Foundation");
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