Atish Patra 8f5cb44b1b RISC-V: KVM: Support sstc extension ... Sstc extension allows the guest to program the vstimecmp CSR directly instead of making an SBI call to the hypervisor to program the next event. The timer interrupt is also directly injected to the guest by the hardware in this case. To maintain backward compatibility, the hypervisors also update the vstimecmp in an SBI set_time call if the hardware supports it. Thus, the older kernels in guest also take advantage of the sstc extension. Reviewed-by: Anup Patel <anup@brainfault.org> Signed-off-by: Atish Patra <atishp@rivosinc.com> Acked-by: Anup Patel <anup@brainfault.org> Link: https://lore.kernel.org/all/CAAhSdy2mb6wyqy0NAn9BcTWKMYEc0Z4zU3s3j7oNqBz6eDQ9sg@mail.gmail.com/ Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>		2022-08-12 07:43:57 -07:00
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Kconfig	riscv: do not select non-existing config ANON_INODES	2021-10-22 05:53:37 -04:00
Makefile	RISC-V: KVM: Factor-out instruction emulation into separate sources	2022-07-29 17:14:40 +05:30
main.c	RISC-V: KVM: Add Sv57x4 mode support for G-stage	2022-05-20 09:09:04 +05:30
mmu.c	Merge remote-tracking branch 'kvm/next' into kvm-next-5.20	2022-08-01 03:21:00 -04:00
tlb.c	RISC-V: KVM: Cleanup stale TLB entries when host CPU changes	2022-05-20 09:09:18 +05:30
vcpu.c	RISC-V: KVM: Support sstc extension	2022-08-12 07:43:57 -07:00
vcpu_exit.c	RISC-V: KVM: Factor-out instruction emulation into separate sources	2022-07-29 17:14:40 +05:30
vcpu_fp.c	RISC-V: KVM: Improve ISA extension by using a bitmap	2022-07-29 17:14:11 +05:30
vcpu_insn.c	RISC-V: KVM: Add extensible CSR emulation framework	2022-07-29 17:14:53 +05:30
vcpu_sbi.c	KVM: fix bad user ABI for KVM_EXIT_SYSTEM_EVENT	2022-04-29 12:38:22 -04:00
vcpu_sbi_base.c	RISC-V: KVM: Fix SBI implementation version	2022-02-02 18:58:06 +05:30
vcpu_sbi_hsm.c	RISC-V: KVM: Implement SBI HSM suspend call	2022-03-11 19:02:39 +05:30
vcpu_sbi_replace.c	RISC-V: KVM: Add remote HFENCE functions based on VCPU requests	2022-05-20 09:09:15 +05:30
vcpu_sbi_v01.c	RISC-V: KVM: Add remote HFENCE functions based on VCPU requests	2022-05-20 09:09:15 +05:30
vcpu_switch.S	RISC-V: KVM: Refine __kvm_riscv_switch_to() implementation	2022-03-11 19:02:22 +05:30
vcpu_timer.c	RISC-V: KVM: Support sstc extension	2022-08-12 07:43:57 -07:00
vm.c	RISC-V: KVM: Make kvm_riscv_guest_timer_init a void function	2022-07-29 17:14:26 +05:30
vmid.c	RISC-V: KVM: fix typos in comments	2022-06-09 09:18:15 +05:30