WSL2-Linux-Kernel/arch/arm/mm
Valentine Barshak 85b093bcc5 ARM: 6535/1: V6 MPCore v6_dma_inv_range and v6_dma_flush_range RWFO fix
Cache ownership must be acquired by reading/writing data from the
cache line to make cache operation have the desired effect on the
SMP MPCore CPU. However, the ownership is never acquired in the
v6_dma_inv_range function when cleaning the first line and
flushing the last one, in case the address is not aligned
to D_CACHE_LINE_SIZE boundary.
Fix this by reading/writing data if needed, before performing
cache operations.
While at it, fix v6_dma_flush_range to prevent RWFO outside
the buffer.

Cc: stable@kernel.org
Signed-off-by: Valentine Barshak <vbarshak@mvista.com>
Signed-off-by: George G. Davis <gdavis@mvista.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-14 22:23:34 +00:00
..
Kconfig ARM: Improve the L2 cache performance when PL310 is used 2010-10-26 11:39:54 +05:30
Makefile ARM: Remove DISCONTIGMEM support 2010-07-16 10:57:35 +01:00
abort-ev4.S
abort-ev4t.S
abort-ev5t.S
abort-ev5tj.S
abort-ev6.S Add core support for ARMv6/v7 big-endian 2009-05-30 14:00:18 +01:00
abort-ev7.S arm: mm: qsd8x50: Fix incorrect permission faults 2010-05-03 11:15:05 -07:00
abort-lv4t.S
abort-macro.S
abort-nommu.S
alignment.c ARM: 6401/1: plug a race in the alignment trap handler 2010-09-23 15:17:04 +01:00
cache-fa.S ARM: 6466/1: implement flush_icache_all for the rest of the CPUs 2010-10-28 13:54:28 +01:00
cache-feroceon-l2.c [ARM] Kirkwood: small L2 code cleanup 2009-03-28 22:39:30 -04:00
cache-l2x0.c ARM: l2x0: Optimise the range based operations 2010-10-26 11:40:05 +05:30
cache-tauros2.c ARM: Add Tauros2 L2 cache controller support 2009-11-27 15:43:21 -05:00
cache-v3.S ARM: 6466/1: implement flush_icache_all for the rest of the CPUs 2010-10-28 13:54:28 +01:00
cache-v4.S ARM: 6466/1: implement flush_icache_all for the rest of the CPUs 2010-10-28 13:54:28 +01:00
cache-v4wb.S ARM: 6466/1: implement flush_icache_all for the rest of the CPUs 2010-10-28 13:54:28 +01:00
cache-v4wt.S ARM: 6466/1: implement flush_icache_all for the rest of the CPUs 2010-10-28 13:54:28 +01:00
cache-v6.S ARM: 6535/1: V6 MPCore v6_dma_inv_range and v6_dma_flush_range RWFO fix 2010-12-14 22:23:34 +00:00
cache-v7.S ARM: 6528/1: Use CTR for the I-cache line size on ARMv7 2010-12-12 23:25:58 +00:00
cache-xsc3l2.c [ARM] pxa: do not enable L2 after MMU is enabled 2010-01-01 15:50:34 +08:00
context.c ARM: 5905/1: ARM: Global ASID allocation on SMP 2010-02-15 21:39:51 +00:00
copypage-fa.c ARM: Gemini: fix compiler error in copypage-fa.c 2010-04-27 12:45:10 +02:00
copypage-feroceon.c ARM: 6164/1: Add kto and kfrom to input operands list. 2010-06-08 19:42:18 +01:00
copypage-v3.c ARM: Pass VMA to copy_user_highpage() implementations 2009-10-05 15:17:45 +01:00
copypage-v4mc.c ARM: 6379/1: Assume new page cache pages have dirty D-cache 2010-09-19 12:17:43 +01:00
copypage-v4wb.c ARM: 6164/1: Add kto and kfrom to input operands list. 2010-06-08 19:42:18 +01:00
copypage-v4wt.c ARM: 6164/1: Add kto and kfrom to input operands list. 2010-06-08 19:42:18 +01:00
copypage-v6.c ARM: 6379/1: Assume new page cache pages have dirty D-cache 2010-09-19 12:17:43 +01:00
copypage-xsc3.c ARM: 6164/1: Add kto and kfrom to input operands list. 2010-06-08 19:42:18 +01:00
copypage-xscale.c ARM: 6379/1: Assume new page cache pages have dirty D-cache 2010-09-19 12:17:43 +01:00
dma-mapping.c ARM: Fix DMA coherent allocator alignment 2010-11-07 16:10:15 +00:00
extable.c
fault-armv.c ARM: 6464/2: fix spinlock recursion in adjust_pte() 2010-10-28 13:53:47 +01:00
fault.c ARM: 6355/1: hw-breakpoint: add mechanism for hooking into prefetch aborts 2010-09-08 10:04:59 +01:00
fault.h
flush.c ARM: 6386/1: flush_ptrace_access: invalidate correct I-cache alias 2010-10-04 20:57:10 +01:00
highmem.c mm: fix race in kunmap_atomic() 2010-10-27 18:03:05 -07:00
init.c ARM: memblock: move meminfo into find_limits directly 2010-10-28 13:54:44 +01:00
iomap.c
ioremap.c ARM: avoid annoying <4>'s in printk output 2010-11-23 22:27:55 +00:00
mm.h ARM: Convert platform reservations to use LMB rather than bootmem 2010-07-27 08:48:23 +01:00
mmap.c ARM: implement CONFIG_STRICT_DEVMEM by disabling access to RAM via /dev/mem 2010-10-01 22:31:34 -04:00
mmu.c ARM: memblock: setup lowmem mappings using memblock 2010-10-28 13:54:45 +01:00
nommu.c ARM: Convert platform reservations to use LMB rather than bootmem 2010-07-27 08:48:23 +01:00
pabort-legacy.S ARM: 5727/1: Pass IFSR register to do_PrefetchAbort() 2009-10-02 22:34:32 +01:00
pabort-v6.S ARM: 5727/1: Pass IFSR register to do_PrefetchAbort() 2009-10-02 22:34:32 +01:00
pabort-v7.S ARM: 5727/1: Pass IFSR register to do_PrefetchAbort() 2009-10-02 22:34:32 +01:00
pgd.c mm: remove pte_*map_nested() 2010-10-26 16:52:08 -07:00
proc-arm6_7.S ARM: hotplug cpu: Keep processor information, startup code & __lookup_processor_type 2010-10-08 10:07:32 +01:00
proc-arm7tdmi.S ARM: hotplug cpu: Keep processor information, startup code & __lookup_processor_type 2010-10-08 10:07:32 +01:00
proc-arm9tdmi.S ARM: hotplug cpu: Keep processor information, startup code & __lookup_processor_type 2010-10-08 10:07:32 +01:00
proc-arm720.S ARM: hotplug cpu: Keep processor information, startup code & __lookup_processor_type 2010-10-08 10:07:32 +01:00
proc-arm740.S ARM: hotplug cpu: Keep processor information, startup code & __lookup_processor_type 2010-10-08 10:07:32 +01:00
proc-arm920.S ARM: 6466/1: implement flush_icache_all for the rest of the CPUs 2010-10-28 13:54:28 +01:00
proc-arm922.S ARM: 6466/1: implement flush_icache_all for the rest of the CPUs 2010-10-28 13:54:28 +01:00
proc-arm925.S ARM: 6466/1: implement flush_icache_all for the rest of the CPUs 2010-10-28 13:54:28 +01:00
proc-arm926.S ARM: 6466/1: implement flush_icache_all for the rest of the CPUs 2010-10-28 13:54:28 +01:00
proc-arm940.S ARM: 6466/1: implement flush_icache_all for the rest of the CPUs 2010-10-28 13:54:28 +01:00
proc-arm946.S ARM: 6466/1: implement flush_icache_all for the rest of the CPUs 2010-10-28 13:54:28 +01:00
proc-arm1020.S ARM: 6466/1: implement flush_icache_all for the rest of the CPUs 2010-10-28 13:54:28 +01:00
proc-arm1020e.S ARM: 6466/1: implement flush_icache_all for the rest of the CPUs 2010-10-28 13:54:28 +01:00
proc-arm1022.S ARM: 6466/1: implement flush_icache_all for the rest of the CPUs 2010-10-28 13:54:28 +01:00
proc-arm1026.S ARM: 6466/1: implement flush_icache_all for the rest of the CPUs 2010-10-28 13:54:28 +01:00
proc-fa526.S ARM: hotplug cpu: Keep processor information, startup code & __lookup_processor_type 2010-10-08 10:07:32 +01:00
proc-feroceon.S ARM: 6466/1: implement flush_icache_all for the rest of the CPUs 2010-10-28 13:54:28 +01:00
proc-macros.S ARM: 6528/1: Use CTR for the I-cache line size on ARMv7 2010-12-12 23:25:58 +00:00
proc-mohawk.S ARM: hotplug cpu: Keep processor information, startup code & __lookup_processor_type 2010-10-08 10:07:32 +01:00
proc-sa110.S ARM: hotplug cpu: Keep processor information, startup code & __lookup_processor_type 2010-10-08 10:07:32 +01:00
proc-sa1100.S ARM: hotplug cpu: Keep processor information, startup code & __lookup_processor_type 2010-10-08 10:07:32 +01:00
proc-syms.c ARM: add size argument to __cpuc_flush_dcache_page 2009-12-14 14:53:22 +00:00
proc-v6.S Merge branch 'hotplug' into devel 2010-10-18 22:34:47 +01:00
proc-v7.S ARM: 6501/1: Thumb-2: Correct data alignment for CONFIG_THUMB2_KERNEL in mm/proc-v7.S 2010-11-30 13:44:25 +00:00
proc-xsc3.S ARM: 6466/1: implement flush_icache_all for the rest of the CPUs 2010-10-28 13:54:28 +01:00
proc-xscale.S ARM: 6466/1: implement flush_icache_all for the rest of the CPUs 2010-10-28 13:54:28 +01:00
tlb-fa.S ARM: Add support for FA526 v2 2009-03-25 13:10:01 +02:00
tlb-v3.S
tlb-v4.S
tlb-v4wb.S
tlb-v4wbi.S
tlb-v6.S arm: Use __INIT macro instead of .text.init. 2009-04-27 19:51:58 -07:00
tlb-v7.S ARM: Allow SMP kernels to boot on UP systems 2010-10-04 20:23:36 +01:00
vmregion.c ARM: DMA coherent allocator: align remapped addresses 2010-07-27 10:43:48 +01:00
vmregion.h ARM: DMA coherent allocator: align remapped addresses 2010-07-27 10:43:48 +01:00