164 строки
4.1 KiB
C
164 строки
4.1 KiB
C
/*
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* Copyright (C) 2009 Thomas Gleixner <tglx@linutronix.de>
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*
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* For licencing details see kernel-base/COPYING
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*/
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#include <linux/init.h>
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#include <linux/ioport.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <asm/bios_ebda.h>
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#include <asm/paravirt.h>
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#include <asm/pci_x86.h>
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#include <asm/pci.h>
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#include <asm/mpspec.h>
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#include <asm/setup.h>
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#include <asm/apic.h>
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#include <asm/e820.h>
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#include <asm/time.h>
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#include <asm/irq.h>
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#include <asm/io_apic.h>
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#include <asm/hpet.h>
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#include <asm/pat.h>
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#include <asm/tsc.h>
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#include <asm/iommu.h>
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#include <asm/mach_traps.h>
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void x86_init_noop(void) { }
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void __init x86_init_uint_noop(unsigned int unused) { }
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int __init iommu_init_noop(void) { return 0; }
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void iommu_shutdown_noop(void) { }
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/*
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* The platform setup functions are preset with the default functions
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* for standard PC hardware.
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*/
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struct x86_init_ops x86_init __initdata = {
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.resources = {
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.probe_roms = probe_roms,
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.reserve_resources = reserve_standard_io_resources,
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.memory_setup = default_machine_specific_memory_setup,
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},
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.mpparse = {
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.mpc_record = x86_init_uint_noop,
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.setup_ioapic_ids = x86_init_noop,
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.mpc_apic_id = default_mpc_apic_id,
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.smp_read_mpc_oem = default_smp_read_mpc_oem,
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.mpc_oem_bus_info = default_mpc_oem_bus_info,
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.find_smp_config = default_find_smp_config,
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.get_smp_config = default_get_smp_config,
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},
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.irqs = {
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.pre_vector_init = init_ISA_irqs,
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.intr_init = native_init_IRQ,
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.trap_init = x86_init_noop,
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},
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.oem = {
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.arch_setup = x86_init_noop,
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.banner = default_banner,
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},
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.paging = {
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.pagetable_init = native_pagetable_init,
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},
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.timers = {
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.setup_percpu_clockev = setup_boot_APIC_clock,
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.tsc_pre_init = x86_init_noop,
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.timer_init = hpet_time_init,
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.wallclock_init = x86_init_noop,
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},
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.iommu = {
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.iommu_init = iommu_init_noop,
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},
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.pci = {
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.init = x86_default_pci_init,
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.init_irq = x86_default_pci_init_irq,
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.fixup_irqs = x86_default_pci_fixup_irqs,
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},
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};
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struct x86_cpuinit_ops x86_cpuinit = {
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.early_percpu_clock_init = x86_init_noop,
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.setup_percpu_clockev = setup_secondary_APIC_clock,
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};
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static void default_nmi_init(void) { };
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static int default_i8042_detect(void) { return 1; };
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struct x86_platform_ops x86_platform = {
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.calibrate_tsc = native_calibrate_tsc,
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.get_wallclock = mach_get_cmos_time,
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.set_wallclock = mach_set_rtc_mmss,
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.iommu_shutdown = iommu_shutdown_noop,
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.is_untracked_pat_range = is_ISA_range,
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.nmi_init = default_nmi_init,
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.get_nmi_reason = default_get_nmi_reason,
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.i8042_detect = default_i8042_detect,
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.save_sched_clock_state = tsc_save_sched_clock_state,
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.restore_sched_clock_state = tsc_restore_sched_clock_state,
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};
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EXPORT_SYMBOL_GPL(x86_platform);
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#if defined(CONFIG_PCI_MSI)
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struct x86_msi_ops x86_msi = {
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.setup_msi_irqs = native_setup_msi_irqs,
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.compose_msi_msg = native_compose_msi_msg,
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.teardown_msi_irq = native_teardown_msi_irq,
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.teardown_msi_irqs = default_teardown_msi_irqs,
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.restore_msi_irqs = default_restore_msi_irqs,
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.setup_hpet_msi = default_setup_hpet_msi,
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.msi_mask_irq = default_msi_mask_irq,
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.msix_mask_irq = default_msix_mask_irq,
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};
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/* MSI arch specific hooks */
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int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
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{
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return x86_msi.setup_msi_irqs(dev, nvec, type);
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}
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void arch_teardown_msi_irqs(struct pci_dev *dev)
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{
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x86_msi.teardown_msi_irqs(dev);
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}
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void arch_teardown_msi_irq(unsigned int irq)
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{
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x86_msi.teardown_msi_irq(irq);
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}
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void arch_restore_msi_irqs(struct pci_dev *dev, int irq)
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{
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x86_msi.restore_msi_irqs(dev, irq);
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}
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u32 arch_msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
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{
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return x86_msi.msi_mask_irq(desc, mask, flag);
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}
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u32 arch_msix_mask_irq(struct msi_desc *desc, u32 flag)
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{
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return x86_msi.msix_mask_irq(desc, flag);
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}
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#endif
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struct x86_io_apic_ops x86_io_apic_ops = {
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.init = native_io_apic_init_mappings,
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.read = native_io_apic_read,
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.write = native_io_apic_write,
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.modify = native_io_apic_modify,
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.disable = native_disable_io_apic,
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.print_entries = native_io_apic_print_entries,
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.set_affinity = native_ioapic_set_affinity,
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.setup_entry = native_setup_ioapic_entry,
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.eoi_ioapic_pin = native_eoi_ioapic_pin,
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};
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