260 строки
6.3 KiB
C
260 строки
6.3 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2011 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
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*/
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#include <linux/module.h>
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#include <linux/clk-provider.h>
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#include <linux/slab.h>
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#include <linux/err.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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/*
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* DOC: basic fixed multiplier and divider clock that cannot gate
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*
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* Traits of this clock:
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* prepare - clk_prepare only ensures that parents are prepared
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* enable - clk_enable only ensures that parents are enabled
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* rate - rate is fixed. clk->rate = parent->rate / div * mult
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* parent - fixed parent. No clk_set_parent support
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*/
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static unsigned long clk_factor_recalc_rate(struct clk_hw *hw,
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unsigned long parent_rate)
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{
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struct clk_fixed_factor *fix = to_clk_fixed_factor(hw);
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unsigned long long int rate;
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rate = (unsigned long long int)parent_rate * fix->mult;
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do_div(rate, fix->div);
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return (unsigned long)rate;
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}
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static long clk_factor_round_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long *prate)
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{
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struct clk_fixed_factor *fix = to_clk_fixed_factor(hw);
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if (clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT) {
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unsigned long best_parent;
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best_parent = (rate / fix->mult) * fix->div;
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*prate = clk_hw_round_rate(clk_hw_get_parent(hw), best_parent);
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}
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return (*prate / fix->div) * fix->mult;
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}
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static int clk_factor_set_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long parent_rate)
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{
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/*
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* We must report success but we can do so unconditionally because
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* clk_factor_round_rate returns values that ensure this call is a
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* nop.
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*/
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return 0;
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}
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const struct clk_ops clk_fixed_factor_ops = {
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.round_rate = clk_factor_round_rate,
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.set_rate = clk_factor_set_rate,
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.recalc_rate = clk_factor_recalc_rate,
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};
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EXPORT_SYMBOL_GPL(clk_fixed_factor_ops);
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static struct clk_hw *
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__clk_hw_register_fixed_factor(struct device *dev, struct device_node *np,
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const char *name, const char *parent_name, int index,
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unsigned long flags, unsigned int mult, unsigned int div)
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{
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struct clk_fixed_factor *fix;
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struct clk_init_data init = { };
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struct clk_parent_data pdata = { .index = index };
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struct clk_hw *hw;
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int ret;
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fix = kmalloc(sizeof(*fix), GFP_KERNEL);
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if (!fix)
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return ERR_PTR(-ENOMEM);
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/* struct clk_fixed_factor assignments */
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fix->mult = mult;
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fix->div = div;
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fix->hw.init = &init;
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init.name = name;
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init.ops = &clk_fixed_factor_ops;
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init.flags = flags;
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if (parent_name)
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init.parent_names = &parent_name;
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else
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init.parent_data = &pdata;
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init.num_parents = 1;
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hw = &fix->hw;
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if (dev)
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ret = clk_hw_register(dev, hw);
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else
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ret = of_clk_hw_register(np, hw);
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if (ret) {
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kfree(fix);
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hw = ERR_PTR(ret);
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}
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return hw;
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}
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struct clk_hw *clk_hw_register_fixed_factor(struct device *dev,
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const char *name, const char *parent_name, unsigned long flags,
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unsigned int mult, unsigned int div)
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{
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return __clk_hw_register_fixed_factor(dev, NULL, name, parent_name, -1,
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flags, mult, div);
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}
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EXPORT_SYMBOL_GPL(clk_hw_register_fixed_factor);
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struct clk *clk_register_fixed_factor(struct device *dev, const char *name,
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const char *parent_name, unsigned long flags,
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unsigned int mult, unsigned int div)
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{
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struct clk_hw *hw;
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hw = clk_hw_register_fixed_factor(dev, name, parent_name, flags, mult,
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div);
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if (IS_ERR(hw))
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return ERR_CAST(hw);
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return hw->clk;
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}
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EXPORT_SYMBOL_GPL(clk_register_fixed_factor);
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void clk_unregister_fixed_factor(struct clk *clk)
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{
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struct clk_hw *hw;
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hw = __clk_get_hw(clk);
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if (!hw)
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return;
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clk_unregister(clk);
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kfree(to_clk_fixed_factor(hw));
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}
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EXPORT_SYMBOL_GPL(clk_unregister_fixed_factor);
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void clk_hw_unregister_fixed_factor(struct clk_hw *hw)
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{
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struct clk_fixed_factor *fix;
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fix = to_clk_fixed_factor(hw);
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clk_hw_unregister(hw);
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kfree(fix);
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}
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EXPORT_SYMBOL_GPL(clk_hw_unregister_fixed_factor);
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#ifdef CONFIG_OF
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static const struct of_device_id set_rate_parent_matches[] = {
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{ .compatible = "allwinner,sun4i-a10-pll3-2x-clk" },
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{ /* Sentinel */ },
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};
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static struct clk_hw *_of_fixed_factor_clk_setup(struct device_node *node)
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{
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struct clk_hw *hw;
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const char *clk_name = node->name;
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unsigned long flags = 0;
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u32 div, mult;
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int ret;
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if (of_property_read_u32(node, "clock-div", &div)) {
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pr_err("%s Fixed factor clock <%pOFn> must have a clock-div property\n",
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__func__, node);
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return ERR_PTR(-EIO);
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}
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if (of_property_read_u32(node, "clock-mult", &mult)) {
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pr_err("%s Fixed factor clock <%pOFn> must have a clock-mult property\n",
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__func__, node);
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return ERR_PTR(-EIO);
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}
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of_property_read_string(node, "clock-output-names", &clk_name);
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if (of_match_node(set_rate_parent_matches, node))
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flags |= CLK_SET_RATE_PARENT;
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hw = __clk_hw_register_fixed_factor(NULL, node, clk_name, NULL, 0,
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flags, mult, div);
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if (IS_ERR(hw)) {
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/*
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* Clear OF_POPULATED flag so that clock registration can be
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* attempted again from probe function.
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*/
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of_node_clear_flag(node, OF_POPULATED);
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return ERR_CAST(hw);
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}
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ret = of_clk_add_hw_provider(node, of_clk_hw_simple_get, hw);
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if (ret) {
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clk_hw_unregister_fixed_factor(hw);
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return ERR_PTR(ret);
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}
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return hw;
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}
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/**
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* of_fixed_factor_clk_setup() - Setup function for simple fixed factor clock
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*/
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void __init of_fixed_factor_clk_setup(struct device_node *node)
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{
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_of_fixed_factor_clk_setup(node);
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}
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CLK_OF_DECLARE(fixed_factor_clk, "fixed-factor-clock",
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of_fixed_factor_clk_setup);
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static int of_fixed_factor_clk_remove(struct platform_device *pdev)
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{
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struct clk_hw *clk = platform_get_drvdata(pdev);
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of_clk_del_provider(pdev->dev.of_node);
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clk_hw_unregister_fixed_factor(clk);
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return 0;
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}
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static int of_fixed_factor_clk_probe(struct platform_device *pdev)
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{
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struct clk_hw *clk;
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/*
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* This function is not executed when of_fixed_factor_clk_setup
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* succeeded.
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*/
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clk = _of_fixed_factor_clk_setup(pdev->dev.of_node);
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if (IS_ERR(clk))
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return PTR_ERR(clk);
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platform_set_drvdata(pdev, clk);
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return 0;
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}
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static const struct of_device_id of_fixed_factor_clk_ids[] = {
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{ .compatible = "fixed-factor-clock" },
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{ }
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};
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MODULE_DEVICE_TABLE(of, of_fixed_factor_clk_ids);
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static struct platform_driver of_fixed_factor_clk_driver = {
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.driver = {
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.name = "of_fixed_factor_clk",
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.of_match_table = of_fixed_factor_clk_ids,
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},
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.probe = of_fixed_factor_clk_probe,
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.remove = of_fixed_factor_clk_remove,
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};
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builtin_platform_driver(of_fixed_factor_clk_driver);
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#endif
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