337 строки
7.8 KiB
C
337 строки
7.8 KiB
C
// SPDX-License-Identifier: GPL-2.0
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#include <linux/acpi.h>
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#include <linux/bitfield.h>
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#include <linux/bitops.h>
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#include <linux/device.h>
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#include <linux/gpio/driver.h>
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#include <linux/io.h>
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#include <linux/ioport.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/pm.h>
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#include <linux/resource.h>
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#include <linux/spinlock.h>
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#include <linux/types.h>
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/*
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* There are 3 YU GPIO blocks:
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* gpio[0]: HOST_GPIO0->HOST_GPIO31
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* gpio[1]: HOST_GPIO32->HOST_GPIO63
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* gpio[2]: HOST_GPIO64->HOST_GPIO69
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*/
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#define MLXBF2_GPIO_MAX_PINS_PER_BLOCK 32
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/*
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* arm_gpio_lock register:
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* bit[31] lock status: active if set
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* bit[15:0] set lock
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* The lock is enabled only if 0xd42f is written to this field
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*/
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#define YU_ARM_GPIO_LOCK_ADDR 0x2801088
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#define YU_ARM_GPIO_LOCK_SIZE 0x8
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#define YU_LOCK_ACTIVE_BIT(val) (val >> 31)
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#define YU_ARM_GPIO_LOCK_ACQUIRE 0xd42f
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#define YU_ARM_GPIO_LOCK_RELEASE 0x0
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/*
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* gpio[x] block registers and their offset
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*/
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#define YU_GPIO_DATAIN 0x04
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#define YU_GPIO_MODE1 0x08
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#define YU_GPIO_MODE0 0x0c
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#define YU_GPIO_DATASET 0x14
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#define YU_GPIO_DATACLEAR 0x18
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#define YU_GPIO_MODE1_CLEAR 0x50
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#define YU_GPIO_MODE0_SET 0x54
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#define YU_GPIO_MODE0_CLEAR 0x58
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#ifdef CONFIG_PM
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struct mlxbf2_gpio_context_save_regs {
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u32 gpio_mode0;
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u32 gpio_mode1;
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};
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#endif
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/* BlueField-2 gpio block context structure. */
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struct mlxbf2_gpio_context {
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struct gpio_chip gc;
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/* YU GPIO blocks address */
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void __iomem *gpio_io;
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#ifdef CONFIG_PM
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struct mlxbf2_gpio_context_save_regs *csave_regs;
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#endif
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};
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/* BlueField-2 gpio shared structure. */
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struct mlxbf2_gpio_param {
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void __iomem *io;
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struct resource *res;
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struct mutex *lock;
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};
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static struct resource yu_arm_gpio_lock_res = {
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.start = YU_ARM_GPIO_LOCK_ADDR,
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.end = YU_ARM_GPIO_LOCK_ADDR + YU_ARM_GPIO_LOCK_SIZE - 1,
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.name = "YU_ARM_GPIO_LOCK",
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};
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static DEFINE_MUTEX(yu_arm_gpio_lock_mutex);
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static struct mlxbf2_gpio_param yu_arm_gpio_lock_param = {
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.res = &yu_arm_gpio_lock_res,
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.lock = &yu_arm_gpio_lock_mutex,
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};
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/* Request memory region and map yu_arm_gpio_lock resource */
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static int mlxbf2_gpio_get_lock_res(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct resource *res;
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resource_size_t size;
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int ret = 0;
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mutex_lock(yu_arm_gpio_lock_param.lock);
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/* Check if the memory map already exists */
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if (yu_arm_gpio_lock_param.io)
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goto exit;
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res = yu_arm_gpio_lock_param.res;
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size = resource_size(res);
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if (!devm_request_mem_region(dev, res->start, size, res->name)) {
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ret = -EFAULT;
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goto exit;
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}
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yu_arm_gpio_lock_param.io = devm_ioremap(dev, res->start, size);
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if (!yu_arm_gpio_lock_param.io)
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ret = -ENOMEM;
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exit:
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mutex_unlock(yu_arm_gpio_lock_param.lock);
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return ret;
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}
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/*
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* Acquire the YU arm_gpio_lock to be able to change the direction
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* mode. If the lock_active bit is already set, return an error.
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*/
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static int mlxbf2_gpio_lock_acquire(struct mlxbf2_gpio_context *gs)
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{
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u32 arm_gpio_lock_val;
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mutex_lock(yu_arm_gpio_lock_param.lock);
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spin_lock(&gs->gc.bgpio_lock);
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arm_gpio_lock_val = readl(yu_arm_gpio_lock_param.io);
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/*
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* When lock active bit[31] is set, ModeX is write enabled
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*/
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if (YU_LOCK_ACTIVE_BIT(arm_gpio_lock_val)) {
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spin_unlock(&gs->gc.bgpio_lock);
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mutex_unlock(yu_arm_gpio_lock_param.lock);
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return -EINVAL;
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}
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writel(YU_ARM_GPIO_LOCK_ACQUIRE, yu_arm_gpio_lock_param.io);
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return 0;
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}
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/*
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* Release the YU arm_gpio_lock after changing the direction mode.
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*/
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static void mlxbf2_gpio_lock_release(struct mlxbf2_gpio_context *gs)
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__releases(&gs->gc.bgpio_lock)
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__releases(yu_arm_gpio_lock_param.lock)
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{
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writel(YU_ARM_GPIO_LOCK_RELEASE, yu_arm_gpio_lock_param.io);
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spin_unlock(&gs->gc.bgpio_lock);
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mutex_unlock(yu_arm_gpio_lock_param.lock);
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}
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/*
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* mode0 and mode1 are both locked by the gpio_lock field.
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*
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* Together, mode0 and mode1 define the gpio Mode dependeing also
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* on Reg_DataOut.
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*
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* {mode1,mode0}:{Reg_DataOut=0,Reg_DataOut=1}->{DataOut=0,DataOut=1}
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*
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* {0,0}:Reg_DataOut{0,1}->{Z,Z} Input PAD
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* {0,1}:Reg_DataOut{0,1}->{0,1} Full drive Output PAD
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* {1,0}:Reg_DataOut{0,1}->{0,Z} 0-set PAD to low, 1-float
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* {1,1}:Reg_DataOut{0,1}->{Z,1} 0-float, 1-set PAD to high
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*/
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/*
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* Set input direction:
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* {mode1,mode0} = {0,0}
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*/
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static int mlxbf2_gpio_direction_input(struct gpio_chip *chip,
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unsigned int offset)
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{
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struct mlxbf2_gpio_context *gs = gpiochip_get_data(chip);
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int ret;
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/*
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* Although the arm_gpio_lock was set in the probe function, check again
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* if it is still enabled to be able to write to the ModeX registers.
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*/
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ret = mlxbf2_gpio_lock_acquire(gs);
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if (ret < 0)
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return ret;
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writel(BIT(offset), gs->gpio_io + YU_GPIO_MODE0_CLEAR);
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writel(BIT(offset), gs->gpio_io + YU_GPIO_MODE1_CLEAR);
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mlxbf2_gpio_lock_release(gs);
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return ret;
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}
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/*
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* Set output direction:
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* {mode1,mode0} = {0,1}
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*/
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static int mlxbf2_gpio_direction_output(struct gpio_chip *chip,
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unsigned int offset,
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int value)
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{
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struct mlxbf2_gpio_context *gs = gpiochip_get_data(chip);
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int ret = 0;
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/*
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* Although the arm_gpio_lock was set in the probe function,
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* check again it is still enabled to be able to write to the
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* ModeX registers.
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*/
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ret = mlxbf2_gpio_lock_acquire(gs);
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if (ret < 0)
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return ret;
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writel(BIT(offset), gs->gpio_io + YU_GPIO_MODE1_CLEAR);
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writel(BIT(offset), gs->gpio_io + YU_GPIO_MODE0_SET);
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mlxbf2_gpio_lock_release(gs);
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return ret;
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}
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/* BlueField-2 GPIO driver initialization routine. */
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static int
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mlxbf2_gpio_probe(struct platform_device *pdev)
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{
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struct mlxbf2_gpio_context *gs;
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struct device *dev = &pdev->dev;
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struct gpio_chip *gc;
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struct resource *res;
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unsigned int npins;
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int ret;
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gs = devm_kzalloc(dev, sizeof(*gs), GFP_KERNEL);
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if (!gs)
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return -ENOMEM;
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/* YU GPIO block address */
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res)
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return -ENODEV;
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gs->gpio_io = devm_ioremap(dev, res->start, resource_size(res));
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if (!gs->gpio_io)
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return -ENOMEM;
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ret = mlxbf2_gpio_get_lock_res(pdev);
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if (ret) {
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dev_err(dev, "Failed to get yu_arm_gpio_lock resource\n");
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return ret;
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}
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if (device_property_read_u32(dev, "npins", &npins))
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npins = MLXBF2_GPIO_MAX_PINS_PER_BLOCK;
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gc = &gs->gc;
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ret = bgpio_init(gc, dev, 4,
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gs->gpio_io + YU_GPIO_DATAIN,
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gs->gpio_io + YU_GPIO_DATASET,
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gs->gpio_io + YU_GPIO_DATACLEAR,
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NULL,
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NULL,
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0);
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gc->direction_input = mlxbf2_gpio_direction_input;
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gc->direction_output = mlxbf2_gpio_direction_output;
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gc->ngpio = npins;
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gc->owner = THIS_MODULE;
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platform_set_drvdata(pdev, gs);
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ret = devm_gpiochip_add_data(dev, &gs->gc, gs);
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if (ret) {
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dev_err(dev, "Failed adding memory mapped gpiochip\n");
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return ret;
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}
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return 0;
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}
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#ifdef CONFIG_PM
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static int mlxbf2_gpio_suspend(struct platform_device *pdev,
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pm_message_t state)
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{
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struct mlxbf2_gpio_context *gs = platform_get_drvdata(pdev);
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gs->csave_regs->gpio_mode0 = readl(gs->gpio_io +
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YU_GPIO_MODE0);
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gs->csave_regs->gpio_mode1 = readl(gs->gpio_io +
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YU_GPIO_MODE1);
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return 0;
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}
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static int mlxbf2_gpio_resume(struct platform_device *pdev)
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{
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struct mlxbf2_gpio_context *gs = platform_get_drvdata(pdev);
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writel(gs->csave_regs->gpio_mode0, gs->gpio_io +
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YU_GPIO_MODE0);
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writel(gs->csave_regs->gpio_mode1, gs->gpio_io +
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YU_GPIO_MODE1);
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return 0;
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}
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#endif
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static const struct acpi_device_id __maybe_unused mlxbf2_gpio_acpi_match[] = {
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{ "MLNXBF22", 0 },
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{},
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};
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MODULE_DEVICE_TABLE(acpi, mlxbf2_gpio_acpi_match);
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static struct platform_driver mlxbf2_gpio_driver = {
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.driver = {
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.name = "mlxbf2_gpio",
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.acpi_match_table = ACPI_PTR(mlxbf2_gpio_acpi_match),
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},
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.probe = mlxbf2_gpio_probe,
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#ifdef CONFIG_PM
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.suspend = mlxbf2_gpio_suspend,
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.resume = mlxbf2_gpio_resume,
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#endif
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};
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module_platform_driver(mlxbf2_gpio_driver);
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MODULE_DESCRIPTION("Mellanox BlueField-2 GPIO Driver");
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MODULE_AUTHOR("Mellanox Technologies");
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MODULE_LICENSE("GPL v2");
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