39 строки
1.2 KiB
Plaintext
39 строки
1.2 KiB
Plaintext
* Samsung Exynos4415 Clock Controller
|
|
|
|
The Exynos4415 clock controller generates and supplies clock to various
|
|
consumer devices within the Exynos4415 SoC.
|
|
|
|
Required properties:
|
|
|
|
- compatible: should be one of the following:
|
|
- "samsung,exynos4415-cmu" - for the main system clocks controller
|
|
(CMU_LEFTBUS, CMU_RIGHTBUS, CMU_TOP, CMU_CPU clock domains).
|
|
- "samsung,exynos4415-cmu-dmc" - for the Exynos4415 SoC DRAM Memory
|
|
Controller (DMC) domain clock controller.
|
|
|
|
- reg: physical base address of the controller and length of memory mapped
|
|
region.
|
|
|
|
- #clock-cells: should be 1.
|
|
|
|
Each clock is assigned an identifier and client nodes can use this identifier
|
|
to specify the clock which they consume.
|
|
|
|
All available clocks are defined as preprocessor macros in
|
|
dt-bindings/clock/exynos4415.h header and can be used in device
|
|
tree sources.
|
|
|
|
Example 1: An example of a clock controller node is listed below.
|
|
|
|
cmu: clock-controller@10030000 {
|
|
compatible = "samsung,exynos4415-cmu";
|
|
reg = <0x10030000 0x18000>;
|
|
#clock-cells = <1>;
|
|
};
|
|
|
|
cmu-dmc: clock-controller@105C0000 {
|
|
compatible = "samsung,exynos4415-cmu-dmc";
|
|
reg = <0x105C0000 0x3000>;
|
|
#clock-cells = <1>;
|
|
};
|