596 строки
16 KiB
C
596 строки
16 KiB
C
/*
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* AMD Memory Encryption Support
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*
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* Copyright (C) 2016 Advanced Micro Devices, Inc.
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*
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* Author: Tom Lendacky <thomas.lendacky@amd.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#define DISABLE_BRANCH_PROFILING
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#include <linux/linkage.h>
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#include <linux/init.h>
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#include <linux/mm.h>
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#include <linux/dma-mapping.h>
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#include <linux/swiotlb.h>
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#include <linux/mem_encrypt.h>
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#include <asm/tlbflush.h>
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#include <asm/fixmap.h>
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#include <asm/setup.h>
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#include <asm/bootparam.h>
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#include <asm/set_memory.h>
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#include <asm/cacheflush.h>
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#include <asm/sections.h>
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#include <asm/processor-flags.h>
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#include <asm/msr.h>
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#include <asm/cmdline.h>
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static char sme_cmdline_arg[] __initdata = "mem_encrypt";
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static char sme_cmdline_on[] __initdata = "on";
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static char sme_cmdline_off[] __initdata = "off";
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/*
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* Since SME related variables are set early in the boot process they must
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* reside in the .data section so as not to be zeroed out when the .bss
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* section is later cleared.
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*/
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u64 sme_me_mask __section(.data) = 0;
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EXPORT_SYMBOL(sme_me_mask);
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/* Buffer used for early in-place encryption by BSP, no locking needed */
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static char sme_early_buffer[PAGE_SIZE] __aligned(PAGE_SIZE);
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/*
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* This routine does not change the underlying encryption setting of the
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* page(s) that map this memory. It assumes that eventually the memory is
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* meant to be accessed as either encrypted or decrypted but the contents
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* are currently not in the desired state.
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*
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* This routine follows the steps outlined in the AMD64 Architecture
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* Programmer's Manual Volume 2, Section 7.10.8 Encrypt-in-Place.
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*/
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static void __init __sme_early_enc_dec(resource_size_t paddr,
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unsigned long size, bool enc)
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{
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void *src, *dst;
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size_t len;
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if (!sme_me_mask)
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return;
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local_flush_tlb();
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wbinvd();
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/*
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* There are limited number of early mapping slots, so map (at most)
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* one page at time.
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*/
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while (size) {
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len = min_t(size_t, sizeof(sme_early_buffer), size);
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/*
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* Create mappings for the current and desired format of
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* the memory. Use a write-protected mapping for the source.
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*/
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src = enc ? early_memremap_decrypted_wp(paddr, len) :
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early_memremap_encrypted_wp(paddr, len);
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dst = enc ? early_memremap_encrypted(paddr, len) :
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early_memremap_decrypted(paddr, len);
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/*
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* If a mapping can't be obtained to perform the operation,
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* then eventual access of that area in the desired mode
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* will cause a crash.
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*/
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BUG_ON(!src || !dst);
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/*
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* Use a temporary buffer, of cache-line multiple size, to
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* avoid data corruption as documented in the APM.
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*/
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memcpy(sme_early_buffer, src, len);
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memcpy(dst, sme_early_buffer, len);
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early_memunmap(dst, len);
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early_memunmap(src, len);
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paddr += len;
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size -= len;
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}
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}
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void __init sme_early_encrypt(resource_size_t paddr, unsigned long size)
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{
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__sme_early_enc_dec(paddr, size, true);
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}
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void __init sme_early_decrypt(resource_size_t paddr, unsigned long size)
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{
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__sme_early_enc_dec(paddr, size, false);
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}
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static void __init __sme_early_map_unmap_mem(void *vaddr, unsigned long size,
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bool map)
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{
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unsigned long paddr = (unsigned long)vaddr - __PAGE_OFFSET;
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pmdval_t pmd_flags, pmd;
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/* Use early_pmd_flags but remove the encryption mask */
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pmd_flags = __sme_clr(early_pmd_flags);
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do {
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pmd = map ? (paddr & PMD_MASK) + pmd_flags : 0;
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__early_make_pgtable((unsigned long)vaddr, pmd);
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vaddr += PMD_SIZE;
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paddr += PMD_SIZE;
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size = (size <= PMD_SIZE) ? 0 : size - PMD_SIZE;
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} while (size);
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__native_flush_tlb();
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}
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void __init sme_unmap_bootdata(char *real_mode_data)
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{
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struct boot_params *boot_data;
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unsigned long cmdline_paddr;
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if (!sme_active())
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return;
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/* Get the command line address before unmapping the real_mode_data */
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boot_data = (struct boot_params *)real_mode_data;
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cmdline_paddr = boot_data->hdr.cmd_line_ptr | ((u64)boot_data->ext_cmd_line_ptr << 32);
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__sme_early_map_unmap_mem(real_mode_data, sizeof(boot_params), false);
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if (!cmdline_paddr)
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return;
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__sme_early_map_unmap_mem(__va(cmdline_paddr), COMMAND_LINE_SIZE, false);
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}
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void __init sme_map_bootdata(char *real_mode_data)
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{
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struct boot_params *boot_data;
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unsigned long cmdline_paddr;
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if (!sme_active())
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return;
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__sme_early_map_unmap_mem(real_mode_data, sizeof(boot_params), true);
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/* Get the command line address after mapping the real_mode_data */
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boot_data = (struct boot_params *)real_mode_data;
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cmdline_paddr = boot_data->hdr.cmd_line_ptr | ((u64)boot_data->ext_cmd_line_ptr << 32);
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if (!cmdline_paddr)
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return;
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__sme_early_map_unmap_mem(__va(cmdline_paddr), COMMAND_LINE_SIZE, true);
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}
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void __init sme_early_init(void)
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{
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unsigned int i;
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if (!sme_me_mask)
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return;
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early_pmd_flags = __sme_set(early_pmd_flags);
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__supported_pte_mask = __sme_set(__supported_pte_mask);
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/* Update the protection map with memory encryption mask */
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for (i = 0; i < ARRAY_SIZE(protection_map); i++)
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protection_map[i] = pgprot_encrypted(protection_map[i]);
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}
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/* Architecture __weak replacement functions */
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void __init mem_encrypt_init(void)
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{
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if (!sme_me_mask)
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return;
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/* Call into SWIOTLB to update the SWIOTLB DMA buffers */
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swiotlb_update_mem_attributes();
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pr_info("AMD Secure Memory Encryption (SME) active\n");
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}
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void swiotlb_set_mem_attributes(void *vaddr, unsigned long size)
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{
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WARN(PAGE_ALIGN(size) != size,
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"size is not page-aligned (%#lx)\n", size);
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/* Make the SWIOTLB buffer area decrypted */
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set_memory_decrypted((unsigned long)vaddr, size >> PAGE_SHIFT);
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}
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static void __init sme_clear_pgd(pgd_t *pgd_base, unsigned long start,
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unsigned long end)
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{
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unsigned long pgd_start, pgd_end, pgd_size;
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pgd_t *pgd_p;
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pgd_start = start & PGDIR_MASK;
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pgd_end = end & PGDIR_MASK;
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pgd_size = (((pgd_end - pgd_start) / PGDIR_SIZE) + 1);
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pgd_size *= sizeof(pgd_t);
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pgd_p = pgd_base + pgd_index(start);
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memset(pgd_p, 0, pgd_size);
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}
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#define PGD_FLAGS _KERNPG_TABLE_NOENC
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#define P4D_FLAGS _KERNPG_TABLE_NOENC
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#define PUD_FLAGS _KERNPG_TABLE_NOENC
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#define PMD_FLAGS (__PAGE_KERNEL_LARGE_EXEC & ~_PAGE_GLOBAL)
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static void __init *sme_populate_pgd(pgd_t *pgd_base, void *pgtable_area,
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unsigned long vaddr, pmdval_t pmd_val)
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{
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pgd_t *pgd_p;
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p4d_t *p4d_p;
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pud_t *pud_p;
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pmd_t *pmd_p;
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pgd_p = pgd_base + pgd_index(vaddr);
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if (native_pgd_val(*pgd_p)) {
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if (IS_ENABLED(CONFIG_X86_5LEVEL))
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p4d_p = (p4d_t *)(native_pgd_val(*pgd_p) & ~PTE_FLAGS_MASK);
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else
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pud_p = (pud_t *)(native_pgd_val(*pgd_p) & ~PTE_FLAGS_MASK);
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} else {
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pgd_t pgd;
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if (IS_ENABLED(CONFIG_X86_5LEVEL)) {
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p4d_p = pgtable_area;
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memset(p4d_p, 0, sizeof(*p4d_p) * PTRS_PER_P4D);
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pgtable_area += sizeof(*p4d_p) * PTRS_PER_P4D;
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pgd = native_make_pgd((pgdval_t)p4d_p + PGD_FLAGS);
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} else {
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pud_p = pgtable_area;
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memset(pud_p, 0, sizeof(*pud_p) * PTRS_PER_PUD);
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pgtable_area += sizeof(*pud_p) * PTRS_PER_PUD;
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pgd = native_make_pgd((pgdval_t)pud_p + PGD_FLAGS);
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}
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native_set_pgd(pgd_p, pgd);
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}
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if (IS_ENABLED(CONFIG_X86_5LEVEL)) {
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p4d_p += p4d_index(vaddr);
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if (native_p4d_val(*p4d_p)) {
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pud_p = (pud_t *)(native_p4d_val(*p4d_p) & ~PTE_FLAGS_MASK);
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} else {
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p4d_t p4d;
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pud_p = pgtable_area;
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memset(pud_p, 0, sizeof(*pud_p) * PTRS_PER_PUD);
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pgtable_area += sizeof(*pud_p) * PTRS_PER_PUD;
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p4d = native_make_p4d((pudval_t)pud_p + P4D_FLAGS);
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native_set_p4d(p4d_p, p4d);
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}
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}
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pud_p += pud_index(vaddr);
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if (native_pud_val(*pud_p)) {
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if (native_pud_val(*pud_p) & _PAGE_PSE)
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goto out;
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pmd_p = (pmd_t *)(native_pud_val(*pud_p) & ~PTE_FLAGS_MASK);
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} else {
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pud_t pud;
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pmd_p = pgtable_area;
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memset(pmd_p, 0, sizeof(*pmd_p) * PTRS_PER_PMD);
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pgtable_area += sizeof(*pmd_p) * PTRS_PER_PMD;
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pud = native_make_pud((pmdval_t)pmd_p + PUD_FLAGS);
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native_set_pud(pud_p, pud);
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}
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pmd_p += pmd_index(vaddr);
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if (!native_pmd_val(*pmd_p) || !(native_pmd_val(*pmd_p) & _PAGE_PSE))
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native_set_pmd(pmd_p, native_make_pmd(pmd_val));
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out:
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return pgtable_area;
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}
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static unsigned long __init sme_pgtable_calc(unsigned long len)
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{
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unsigned long p4d_size, pud_size, pmd_size;
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unsigned long total;
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/*
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* Perform a relatively simplistic calculation of the pagetable
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* entries that are needed. That mappings will be covered by 2MB
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* PMD entries so we can conservatively calculate the required
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* number of P4D, PUD and PMD structures needed to perform the
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* mappings. Incrementing the count for each covers the case where
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* the addresses cross entries.
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*/
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if (IS_ENABLED(CONFIG_X86_5LEVEL)) {
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p4d_size = (ALIGN(len, PGDIR_SIZE) / PGDIR_SIZE) + 1;
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p4d_size *= sizeof(p4d_t) * PTRS_PER_P4D;
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pud_size = (ALIGN(len, P4D_SIZE) / P4D_SIZE) + 1;
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pud_size *= sizeof(pud_t) * PTRS_PER_PUD;
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} else {
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p4d_size = 0;
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pud_size = (ALIGN(len, PGDIR_SIZE) / PGDIR_SIZE) + 1;
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pud_size *= sizeof(pud_t) * PTRS_PER_PUD;
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}
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pmd_size = (ALIGN(len, PUD_SIZE) / PUD_SIZE) + 1;
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pmd_size *= sizeof(pmd_t) * PTRS_PER_PMD;
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total = p4d_size + pud_size + pmd_size;
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/*
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* Now calculate the added pagetable structures needed to populate
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* the new pagetables.
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*/
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if (IS_ENABLED(CONFIG_X86_5LEVEL)) {
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p4d_size = ALIGN(total, PGDIR_SIZE) / PGDIR_SIZE;
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p4d_size *= sizeof(p4d_t) * PTRS_PER_P4D;
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pud_size = ALIGN(total, P4D_SIZE) / P4D_SIZE;
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pud_size *= sizeof(pud_t) * PTRS_PER_PUD;
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} else {
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p4d_size = 0;
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pud_size = ALIGN(total, PGDIR_SIZE) / PGDIR_SIZE;
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pud_size *= sizeof(pud_t) * PTRS_PER_PUD;
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}
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pmd_size = ALIGN(total, PUD_SIZE) / PUD_SIZE;
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pmd_size *= sizeof(pmd_t) * PTRS_PER_PMD;
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total += p4d_size + pud_size + pmd_size;
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return total;
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}
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void __init sme_encrypt_kernel(void)
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{
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unsigned long workarea_start, workarea_end, workarea_len;
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unsigned long execute_start, execute_end, execute_len;
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unsigned long kernel_start, kernel_end, kernel_len;
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unsigned long pgtable_area_len;
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unsigned long paddr, pmd_flags;
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unsigned long decrypted_base;
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void *pgtable_area;
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pgd_t *pgd;
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if (!sme_active())
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return;
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/*
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* Prepare for encrypting the kernel by building new pagetables with
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* the necessary attributes needed to encrypt the kernel in place.
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*
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* One range of virtual addresses will map the memory occupied
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* by the kernel as encrypted.
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*
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* Another range of virtual addresses will map the memory occupied
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* by the kernel as decrypted and write-protected.
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*
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* The use of write-protect attribute will prevent any of the
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* memory from being cached.
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*/
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/* Physical addresses gives us the identity mapped virtual addresses */
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kernel_start = __pa_symbol(_text);
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kernel_end = ALIGN(__pa_symbol(_end), PMD_PAGE_SIZE);
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kernel_len = kernel_end - kernel_start;
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/* Set the encryption workarea to be immediately after the kernel */
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workarea_start = kernel_end;
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/*
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* Calculate required number of workarea bytes needed:
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* executable encryption area size:
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* stack page (PAGE_SIZE)
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* encryption routine page (PAGE_SIZE)
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* intermediate copy buffer (PMD_PAGE_SIZE)
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* pagetable structures for the encryption of the kernel
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* pagetable structures for workarea (in case not currently mapped)
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*/
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execute_start = workarea_start;
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execute_end = execute_start + (PAGE_SIZE * 2) + PMD_PAGE_SIZE;
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execute_len = execute_end - execute_start;
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/*
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* One PGD for both encrypted and decrypted mappings and a set of
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* PUDs and PMDs for each of the encrypted and decrypted mappings.
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*/
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pgtable_area_len = sizeof(pgd_t) * PTRS_PER_PGD;
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pgtable_area_len += sme_pgtable_calc(execute_end - kernel_start) * 2;
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/* PUDs and PMDs needed in the current pagetables for the workarea */
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pgtable_area_len += sme_pgtable_calc(execute_len + pgtable_area_len);
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/*
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* The total workarea includes the executable encryption area and
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* the pagetable area.
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*/
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workarea_len = execute_len + pgtable_area_len;
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workarea_end = workarea_start + workarea_len;
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/*
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* Set the address to the start of where newly created pagetable
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* structures (PGDs, PUDs and PMDs) will be allocated. New pagetable
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* structures are created when the workarea is added to the current
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* pagetables and when the new encrypted and decrypted kernel
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* mappings are populated.
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*/
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pgtable_area = (void *)execute_end;
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/*
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* Make sure the current pagetable structure has entries for
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* addressing the workarea.
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*/
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pgd = (pgd_t *)native_read_cr3_pa();
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paddr = workarea_start;
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while (paddr < workarea_end) {
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pgtable_area = sme_populate_pgd(pgd, pgtable_area,
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paddr,
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paddr + PMD_FLAGS);
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paddr += PMD_PAGE_SIZE;
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}
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/* Flush the TLB - no globals so cr3 is enough */
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native_write_cr3(__native_read_cr3());
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/*
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* A new pagetable structure is being built to allow for the kernel
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* to be encrypted. It starts with an empty PGD that will then be
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* populated with new PUDs and PMDs as the encrypted and decrypted
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* kernel mappings are created.
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*/
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pgd = pgtable_area;
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memset(pgd, 0, sizeof(*pgd) * PTRS_PER_PGD);
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pgtable_area += sizeof(*pgd) * PTRS_PER_PGD;
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/* Add encrypted kernel (identity) mappings */
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pmd_flags = PMD_FLAGS | _PAGE_ENC;
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paddr = kernel_start;
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while (paddr < kernel_end) {
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pgtable_area = sme_populate_pgd(pgd, pgtable_area,
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paddr,
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paddr + pmd_flags);
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paddr += PMD_PAGE_SIZE;
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}
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/*
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* A different PGD index/entry must be used to get different
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* pagetable entries for the decrypted mapping. Choose the next
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* PGD index and convert it to a virtual address to be used as
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* the base of the mapping.
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*/
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decrypted_base = (pgd_index(workarea_end) + 1) & (PTRS_PER_PGD - 1);
|
|
decrypted_base <<= PGDIR_SHIFT;
|
|
|
|
/* Add decrypted, write-protected kernel (non-identity) mappings */
|
|
pmd_flags = (PMD_FLAGS & ~_PAGE_CACHE_MASK) | (_PAGE_PAT | _PAGE_PWT);
|
|
paddr = kernel_start;
|
|
while (paddr < kernel_end) {
|
|
pgtable_area = sme_populate_pgd(pgd, pgtable_area,
|
|
paddr + decrypted_base,
|
|
paddr + pmd_flags);
|
|
|
|
paddr += PMD_PAGE_SIZE;
|
|
}
|
|
|
|
/* Add decrypted workarea mappings to both kernel mappings */
|
|
paddr = workarea_start;
|
|
while (paddr < workarea_end) {
|
|
pgtable_area = sme_populate_pgd(pgd, pgtable_area,
|
|
paddr,
|
|
paddr + PMD_FLAGS);
|
|
|
|
pgtable_area = sme_populate_pgd(pgd, pgtable_area,
|
|
paddr + decrypted_base,
|
|
paddr + PMD_FLAGS);
|
|
|
|
paddr += PMD_PAGE_SIZE;
|
|
}
|
|
|
|
/* Perform the encryption */
|
|
sme_encrypt_execute(kernel_start, kernel_start + decrypted_base,
|
|
kernel_len, workarea_start, (unsigned long)pgd);
|
|
|
|
/*
|
|
* At this point we are running encrypted. Remove the mappings for
|
|
* the decrypted areas - all that is needed for this is to remove
|
|
* the PGD entry/entries.
|
|
*/
|
|
sme_clear_pgd(pgd, kernel_start + decrypted_base,
|
|
kernel_end + decrypted_base);
|
|
|
|
sme_clear_pgd(pgd, workarea_start + decrypted_base,
|
|
workarea_end + decrypted_base);
|
|
|
|
/* Flush the TLB - no globals so cr3 is enough */
|
|
native_write_cr3(__native_read_cr3());
|
|
}
|
|
|
|
void __init __nostackprotector sme_enable(struct boot_params *bp)
|
|
{
|
|
const char *cmdline_ptr, *cmdline_arg, *cmdline_on, *cmdline_off;
|
|
unsigned int eax, ebx, ecx, edx;
|
|
bool active_by_default;
|
|
unsigned long me_mask;
|
|
char buffer[16];
|
|
u64 msr;
|
|
|
|
/* Check for the SME support leaf */
|
|
eax = 0x80000000;
|
|
ecx = 0;
|
|
native_cpuid(&eax, &ebx, &ecx, &edx);
|
|
if (eax < 0x8000001f)
|
|
return;
|
|
|
|
/*
|
|
* Check for the SME feature:
|
|
* CPUID Fn8000_001F[EAX] - Bit 0
|
|
* Secure Memory Encryption support
|
|
* CPUID Fn8000_001F[EBX] - Bits 5:0
|
|
* Pagetable bit position used to indicate encryption
|
|
*/
|
|
eax = 0x8000001f;
|
|
ecx = 0;
|
|
native_cpuid(&eax, &ebx, &ecx, &edx);
|
|
if (!(eax & 1))
|
|
return;
|
|
|
|
me_mask = 1UL << (ebx & 0x3f);
|
|
|
|
/* Check if SME is enabled */
|
|
msr = __rdmsr(MSR_K8_SYSCFG);
|
|
if (!(msr & MSR_K8_SYSCFG_MEM_ENCRYPT))
|
|
return;
|
|
|
|
/*
|
|
* Fixups have not been applied to phys_base yet and we're running
|
|
* identity mapped, so we must obtain the address to the SME command
|
|
* line argument data using rip-relative addressing.
|
|
*/
|
|
asm ("lea sme_cmdline_arg(%%rip), %0"
|
|
: "=r" (cmdline_arg)
|
|
: "p" (sme_cmdline_arg));
|
|
asm ("lea sme_cmdline_on(%%rip), %0"
|
|
: "=r" (cmdline_on)
|
|
: "p" (sme_cmdline_on));
|
|
asm ("lea sme_cmdline_off(%%rip), %0"
|
|
: "=r" (cmdline_off)
|
|
: "p" (sme_cmdline_off));
|
|
|
|
if (IS_ENABLED(CONFIG_AMD_MEM_ENCRYPT_ACTIVE_BY_DEFAULT))
|
|
active_by_default = true;
|
|
else
|
|
active_by_default = false;
|
|
|
|
cmdline_ptr = (const char *)((u64)bp->hdr.cmd_line_ptr |
|
|
((u64)bp->ext_cmd_line_ptr << 32));
|
|
|
|
cmdline_find_option(cmdline_ptr, cmdline_arg, buffer, sizeof(buffer));
|
|
|
|
if (!strncmp(buffer, cmdline_on, sizeof(buffer)))
|
|
sme_me_mask = me_mask;
|
|
else if (!strncmp(buffer, cmdline_off, sizeof(buffer)))
|
|
sme_me_mask = 0;
|
|
else
|
|
sme_me_mask = active_by_default ? me_mask : 0;
|
|
}
|