666 строки
13 KiB
C
666 строки
13 KiB
C
/*
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* This file is part of the Chelsio T4 Ethernet driver for Linux.
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*
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* Copyright (c) 2003-2010 Chelsio Communications, Inc. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#ifndef __T4_MSG_H
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#define __T4_MSG_H
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#include <linux/types.h>
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enum {
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CPL_PASS_OPEN_REQ = 0x1,
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CPL_PASS_ACCEPT_RPL = 0x2,
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CPL_ACT_OPEN_REQ = 0x3,
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CPL_SET_TCB_FIELD = 0x5,
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CPL_GET_TCB = 0x6,
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CPL_CLOSE_CON_REQ = 0x8,
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CPL_CLOSE_LISTSRV_REQ = 0x9,
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CPL_ABORT_REQ = 0xA,
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CPL_ABORT_RPL = 0xB,
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CPL_RX_DATA_ACK = 0xD,
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CPL_TX_PKT = 0xE,
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CPL_L2T_WRITE_REQ = 0x12,
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CPL_TID_RELEASE = 0x1A,
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CPL_CLOSE_LISTSRV_RPL = 0x20,
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CPL_L2T_WRITE_RPL = 0x23,
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CPL_PASS_OPEN_RPL = 0x24,
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CPL_ACT_OPEN_RPL = 0x25,
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CPL_PEER_CLOSE = 0x26,
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CPL_ABORT_REQ_RSS = 0x2B,
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CPL_ABORT_RPL_RSS = 0x2D,
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CPL_CLOSE_CON_RPL = 0x32,
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CPL_ISCSI_HDR = 0x33,
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CPL_RDMA_CQE = 0x35,
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CPL_RDMA_CQE_READ_RSP = 0x36,
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CPL_RDMA_CQE_ERR = 0x37,
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CPL_RX_DATA = 0x39,
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CPL_SET_TCB_RPL = 0x3A,
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CPL_RX_PKT = 0x3B,
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CPL_RX_DDP_COMPLETE = 0x3F,
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CPL_ACT_ESTABLISH = 0x40,
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CPL_PASS_ESTABLISH = 0x41,
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CPL_RX_DATA_DDP = 0x42,
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CPL_PASS_ACCEPT_REQ = 0x44,
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CPL_RDMA_READ_REQ = 0x60,
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CPL_PASS_OPEN_REQ6 = 0x81,
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CPL_ACT_OPEN_REQ6 = 0x83,
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CPL_RDMA_TERMINATE = 0xA2,
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CPL_RDMA_WRITE = 0xA4,
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CPL_SGE_EGR_UPDATE = 0xA5,
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CPL_TRACE_PKT = 0xB0,
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CPL_FW4_MSG = 0xC0,
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CPL_FW4_PLD = 0xC1,
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CPL_FW4_ACK = 0xC3,
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CPL_FW6_MSG = 0xE0,
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CPL_FW6_PLD = 0xE1,
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CPL_TX_PKT_LSO = 0xED,
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CPL_TX_PKT_XT = 0xEE,
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NUM_CPL_CMDS
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};
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enum CPL_error {
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CPL_ERR_NONE = 0,
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CPL_ERR_TCAM_FULL = 3,
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CPL_ERR_BAD_LENGTH = 15,
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CPL_ERR_BAD_ROUTE = 18,
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CPL_ERR_CONN_RESET = 20,
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CPL_ERR_CONN_EXIST_SYNRECV = 21,
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CPL_ERR_CONN_EXIST = 22,
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CPL_ERR_ARP_MISS = 23,
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CPL_ERR_BAD_SYN = 24,
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CPL_ERR_CONN_TIMEDOUT = 30,
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CPL_ERR_XMIT_TIMEDOUT = 31,
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CPL_ERR_PERSIST_TIMEDOUT = 32,
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CPL_ERR_FINWAIT2_TIMEDOUT = 33,
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CPL_ERR_KEEPALIVE_TIMEDOUT = 34,
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CPL_ERR_RTX_NEG_ADVICE = 35,
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CPL_ERR_PERSIST_NEG_ADVICE = 36,
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CPL_ERR_ABORT_FAILED = 42,
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CPL_ERR_IWARP_FLM = 50,
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};
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enum {
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ULP_MODE_NONE = 0,
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ULP_MODE_ISCSI = 2,
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ULP_MODE_RDMA = 4,
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ULP_MODE_FCOE = 6,
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};
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enum {
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ULP_CRC_HEADER = 1 << 0,
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ULP_CRC_DATA = 1 << 1
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};
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enum {
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CPL_ABORT_SEND_RST = 0,
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CPL_ABORT_NO_RST,
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};
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enum { /* TX_PKT_XT checksum types */
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TX_CSUM_TCP = 0,
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TX_CSUM_UDP = 1,
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TX_CSUM_CRC16 = 4,
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TX_CSUM_CRC32 = 5,
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TX_CSUM_CRC32C = 6,
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TX_CSUM_FCOE = 7,
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TX_CSUM_TCPIP = 8,
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TX_CSUM_UDPIP = 9,
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TX_CSUM_TCPIP6 = 10,
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TX_CSUM_UDPIP6 = 11,
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TX_CSUM_IP = 12,
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};
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union opcode_tid {
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__be32 opcode_tid;
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u8 opcode;
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};
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#define CPL_OPCODE(x) ((x) << 24)
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#define MK_OPCODE_TID(opcode, tid) (CPL_OPCODE(opcode) | (tid))
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#define OPCODE_TID(cmd) ((cmd)->ot.opcode_tid)
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#define GET_TID(cmd) (ntohl(OPCODE_TID(cmd)) & 0xFFFFFF)
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/* partitioning of TID fields that also carry a queue id */
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#define GET_TID_TID(x) ((x) & 0x3fff)
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#define GET_TID_QID(x) (((x) >> 14) & 0x3ff)
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#define TID_QID(x) ((x) << 14)
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struct rss_header {
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u8 opcode;
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#if defined(__LITTLE_ENDIAN_BITFIELD)
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u8 channel:2;
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u8 filter_hit:1;
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u8 filter_tid:1;
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u8 hash_type:2;
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u8 ipv6:1;
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u8 send2fw:1;
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#else
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u8 send2fw:1;
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u8 ipv6:1;
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u8 hash_type:2;
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u8 filter_tid:1;
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u8 filter_hit:1;
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u8 channel:2;
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#endif
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__be16 qid;
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__be32 hash_val;
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};
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struct work_request_hdr {
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__be32 wr_hi;
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__be32 wr_mid;
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__be64 wr_lo;
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};
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#define WR_HDR struct work_request_hdr wr
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struct cpl_pass_open_req {
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WR_HDR;
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union opcode_tid ot;
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__be16 local_port;
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__be16 peer_port;
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__be32 local_ip;
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__be32 peer_ip;
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__be64 opt0;
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#define TX_CHAN(x) ((x) << 2)
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#define DELACK(x) ((x) << 5)
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#define ULP_MODE(x) ((x) << 8)
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#define RCV_BUFSIZ(x) ((x) << 12)
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#define DSCP(x) ((x) << 22)
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#define SMAC_SEL(x) ((u64)(x) << 28)
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#define L2T_IDX(x) ((u64)(x) << 36)
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#define NAGLE(x) ((u64)(x) << 49)
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#define WND_SCALE(x) ((u64)(x) << 50)
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#define KEEP_ALIVE(x) ((u64)(x) << 54)
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#define MSS_IDX(x) ((u64)(x) << 60)
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__be64 opt1;
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#define SYN_RSS_ENABLE (1 << 0)
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#define SYN_RSS_QUEUE(x) ((x) << 2)
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#define CONN_POLICY_ASK (1 << 22)
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};
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struct cpl_pass_open_req6 {
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WR_HDR;
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union opcode_tid ot;
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__be16 local_port;
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__be16 peer_port;
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__be64 local_ip_hi;
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__be64 local_ip_lo;
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__be64 peer_ip_hi;
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__be64 peer_ip_lo;
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__be64 opt0;
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__be64 opt1;
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};
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struct cpl_pass_open_rpl {
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union opcode_tid ot;
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u8 rsvd[3];
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u8 status;
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};
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struct cpl_pass_accept_rpl {
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WR_HDR;
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union opcode_tid ot;
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__be32 opt2;
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#define RSS_QUEUE(x) ((x) << 0)
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#define RSS_QUEUE_VALID (1 << 10)
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#define RX_COALESCE_VALID(x) ((x) << 11)
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#define RX_COALESCE(x) ((x) << 12)
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#define TX_QUEUE(x) ((x) << 23)
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#define RX_CHANNEL(x) ((x) << 26)
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#define WND_SCALE_EN(x) ((x) << 28)
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#define TSTAMPS_EN(x) ((x) << 29)
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#define SACK_EN(x) ((x) << 30)
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__be64 opt0;
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};
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struct cpl_act_open_req {
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WR_HDR;
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union opcode_tid ot;
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__be16 local_port;
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__be16 peer_port;
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__be32 local_ip;
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__be32 peer_ip;
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__be64 opt0;
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__be32 params;
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__be32 opt2;
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};
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struct cpl_act_open_req6 {
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WR_HDR;
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union opcode_tid ot;
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__be16 local_port;
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__be16 peer_port;
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__be64 local_ip_hi;
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__be64 local_ip_lo;
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__be64 peer_ip_hi;
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__be64 peer_ip_lo;
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__be64 opt0;
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__be32 params;
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__be32 opt2;
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};
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struct cpl_act_open_rpl {
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union opcode_tid ot;
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__be32 atid_status;
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#define GET_AOPEN_STATUS(x) ((x) & 0xff)
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#define GET_AOPEN_ATID(x) (((x) >> 8) & 0xffffff)
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};
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struct cpl_pass_establish {
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union opcode_tid ot;
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__be32 rsvd;
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__be32 tos_stid;
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#define GET_POPEN_TID(x) ((x) & 0xffffff)
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#define GET_POPEN_TOS(x) (((x) >> 24) & 0xff)
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__be16 mac_idx;
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__be16 tcp_opt;
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#define GET_TCPOPT_WSCALE_OK(x) (((x) >> 5) & 1)
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#define GET_TCPOPT_SACK(x) (((x) >> 6) & 1)
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#define GET_TCPOPT_TSTAMP(x) (((x) >> 7) & 1)
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#define GET_TCPOPT_SND_WSCALE(x) (((x) >> 8) & 0xf)
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#define GET_TCPOPT_MSS(x) (((x) >> 12) & 0xf)
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__be32 snd_isn;
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__be32 rcv_isn;
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};
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struct cpl_act_establish {
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union opcode_tid ot;
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__be32 rsvd;
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__be32 tos_atid;
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__be16 mac_idx;
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__be16 tcp_opt;
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__be32 snd_isn;
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__be32 rcv_isn;
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};
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struct cpl_get_tcb {
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WR_HDR;
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union opcode_tid ot;
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__be16 reply_ctrl;
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#define QUEUENO(x) ((x) << 0)
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#define REPLY_CHAN(x) ((x) << 14)
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#define NO_REPLY(x) ((x) << 15)
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__be16 cookie;
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};
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struct cpl_set_tcb_field {
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WR_HDR;
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union opcode_tid ot;
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__be16 reply_ctrl;
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__be16 word_cookie;
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#define TCB_WORD(x) ((x) << 0)
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#define TCB_COOKIE(x) ((x) << 5)
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__be64 mask;
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__be64 val;
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};
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struct cpl_set_tcb_rpl {
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union opcode_tid ot;
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__be16 rsvd;
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u8 cookie;
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u8 status;
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__be64 oldval;
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};
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struct cpl_close_con_req {
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WR_HDR;
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union opcode_tid ot;
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__be32 rsvd;
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};
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struct cpl_close_con_rpl {
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union opcode_tid ot;
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u8 rsvd[3];
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u8 status;
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__be32 snd_nxt;
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__be32 rcv_nxt;
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};
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struct cpl_close_listsvr_req {
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WR_HDR;
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union opcode_tid ot;
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__be16 reply_ctrl;
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#define LISTSVR_IPV6 (1 << 14)
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__be16 rsvd;
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};
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struct cpl_close_listsvr_rpl {
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union opcode_tid ot;
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u8 rsvd[3];
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u8 status;
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};
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struct cpl_abort_req_rss {
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union opcode_tid ot;
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u8 rsvd[3];
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u8 status;
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};
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struct cpl_abort_req {
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WR_HDR;
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union opcode_tid ot;
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__be32 rsvd0;
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u8 rsvd1;
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u8 cmd;
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u8 rsvd2[6];
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};
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struct cpl_abort_rpl_rss {
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union opcode_tid ot;
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u8 rsvd[3];
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u8 status;
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};
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struct cpl_abort_rpl {
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WR_HDR;
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union opcode_tid ot;
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__be32 rsvd0;
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u8 rsvd1;
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u8 cmd;
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u8 rsvd2[6];
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};
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struct cpl_peer_close {
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union opcode_tid ot;
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__be32 rcv_nxt;
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};
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struct cpl_tid_release {
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WR_HDR;
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union opcode_tid ot;
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__be32 rsvd;
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};
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struct cpl_tx_pkt_core {
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__be32 ctrl0;
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#define TXPKT_VF(x) ((x) << 0)
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#define TXPKT_PF(x) ((x) << 8)
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#define TXPKT_VF_VLD (1 << 11)
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#define TXPKT_OVLAN_IDX(x) ((x) << 12)
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#define TXPKT_INTF(x) ((x) << 16)
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#define TXPKT_INS_OVLAN (1 << 21)
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#define TXPKT_OPCODE(x) ((x) << 24)
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__be16 pack;
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__be16 len;
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__be64 ctrl1;
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#define TXPKT_CSUM_END(x) ((x) << 12)
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#define TXPKT_CSUM_START(x) ((x) << 20)
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#define TXPKT_IPHDR_LEN(x) ((u64)(x) << 20)
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#define TXPKT_CSUM_LOC(x) ((u64)(x) << 30)
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#define TXPKT_ETHHDR_LEN(x) ((u64)(x) << 34)
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#define TXPKT_CSUM_TYPE(x) ((u64)(x) << 40)
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#define TXPKT_VLAN(x) ((u64)(x) << 44)
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#define TXPKT_VLAN_VLD (1ULL << 60)
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#define TXPKT_IPCSUM_DIS (1ULL << 62)
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#define TXPKT_L4CSUM_DIS (1ULL << 63)
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};
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struct cpl_tx_pkt {
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WR_HDR;
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struct cpl_tx_pkt_core c;
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};
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#define cpl_tx_pkt_xt cpl_tx_pkt
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struct cpl_tx_pkt_lso {
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WR_HDR;
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__be32 lso_ctrl;
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#define LSO_TCPHDR_LEN(x) ((x) << 0)
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#define LSO_IPHDR_LEN(x) ((x) << 4)
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#define LSO_ETHHDR_LEN(x) ((x) << 16)
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#define LSO_IPV6(x) ((x) << 20)
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#define LSO_LAST_SLICE (1 << 22)
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#define LSO_FIRST_SLICE (1 << 23)
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#define LSO_OPCODE(x) ((x) << 24)
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__be16 ipid_ofst;
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__be16 mss;
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__be32 seqno_offset;
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__be32 len;
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/* encapsulated CPL (TX_PKT, TX_PKT_XT or TX_DATA) follows here */
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};
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struct cpl_iscsi_hdr {
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union opcode_tid ot;
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__be16 pdu_len_ddp;
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#define ISCSI_PDU_LEN(x) ((x) & 0x7FFF)
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#define ISCSI_DDP (1 << 15)
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__be16 len;
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__be32 seq;
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__be16 urg;
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u8 rsvd;
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u8 status;
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};
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struct cpl_rx_data {
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union opcode_tid ot;
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__be16 rsvd;
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__be16 len;
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__be32 seq;
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__be16 urg;
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#if defined(__LITTLE_ENDIAN_BITFIELD)
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u8 dack_mode:2;
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u8 psh:1;
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u8 heartbeat:1;
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u8 ddp_off:1;
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u8 :3;
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#else
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u8 :3;
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u8 ddp_off:1;
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u8 heartbeat:1;
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u8 psh:1;
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u8 dack_mode:2;
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#endif
|
|
u8 status;
|
|
};
|
|
|
|
struct cpl_rx_data_ack {
|
|
WR_HDR;
|
|
union opcode_tid ot;
|
|
__be32 credit_dack;
|
|
#define RX_CREDITS(x) ((x) << 0)
|
|
#define RX_FORCE_ACK(x) ((x) << 28)
|
|
};
|
|
|
|
struct cpl_rx_pkt {
|
|
struct rss_header rsshdr;
|
|
u8 opcode;
|
|
#if defined(__LITTLE_ENDIAN_BITFIELD)
|
|
u8 iff:4;
|
|
u8 csum_calc:1;
|
|
u8 ipmi_pkt:1;
|
|
u8 vlan_ex:1;
|
|
u8 ip_frag:1;
|
|
#else
|
|
u8 ip_frag:1;
|
|
u8 vlan_ex:1;
|
|
u8 ipmi_pkt:1;
|
|
u8 csum_calc:1;
|
|
u8 iff:4;
|
|
#endif
|
|
__be16 csum;
|
|
__be16 vlan;
|
|
__be16 len;
|
|
__be32 l2info;
|
|
#define RXF_UDP (1 << 22)
|
|
#define RXF_TCP (1 << 23)
|
|
__be16 hdr_len;
|
|
__be16 err_vec;
|
|
};
|
|
|
|
struct cpl_trace_pkt {
|
|
u8 opcode;
|
|
u8 intf;
|
|
#if defined(__LITTLE_ENDIAN_BITFIELD)
|
|
u8 runt:4;
|
|
u8 filter_hit:4;
|
|
u8 :6;
|
|
u8 err:1;
|
|
u8 trunc:1;
|
|
#else
|
|
u8 filter_hit:4;
|
|
u8 runt:4;
|
|
u8 trunc:1;
|
|
u8 err:1;
|
|
u8 :6;
|
|
#endif
|
|
__be16 rsvd;
|
|
__be16 len;
|
|
__be64 tstamp;
|
|
};
|
|
|
|
struct cpl_l2t_write_req {
|
|
WR_HDR;
|
|
union opcode_tid ot;
|
|
__be16 params;
|
|
#define L2T_W_INFO(x) ((x) << 2)
|
|
#define L2T_W_PORT(x) ((x) << 8)
|
|
#define L2T_W_NOREPLY(x) ((x) << 15)
|
|
__be16 l2t_idx;
|
|
__be16 vlan;
|
|
u8 dst_mac[6];
|
|
};
|
|
|
|
struct cpl_l2t_write_rpl {
|
|
union opcode_tid ot;
|
|
u8 status;
|
|
u8 rsvd[3];
|
|
};
|
|
|
|
struct cpl_rdma_terminate {
|
|
union opcode_tid ot;
|
|
__be16 rsvd;
|
|
__be16 len;
|
|
};
|
|
|
|
struct cpl_sge_egr_update {
|
|
__be32 opcode_qid;
|
|
#define EGR_QID(x) ((x) & 0x1FFFF)
|
|
__be16 cidx;
|
|
__be16 pidx;
|
|
};
|
|
|
|
struct cpl_fw4_pld {
|
|
u8 opcode;
|
|
u8 rsvd0[3];
|
|
u8 type;
|
|
u8 rsvd1;
|
|
__be16 len;
|
|
__be64 data;
|
|
__be64 rsvd2;
|
|
};
|
|
|
|
struct cpl_fw6_pld {
|
|
u8 opcode;
|
|
u8 rsvd[5];
|
|
__be16 len;
|
|
__be64 data[4];
|
|
};
|
|
|
|
struct cpl_fw4_msg {
|
|
u8 opcode;
|
|
u8 type;
|
|
__be16 rsvd0;
|
|
__be32 rsvd1;
|
|
__be64 data[2];
|
|
};
|
|
|
|
struct cpl_fw4_ack {
|
|
union opcode_tid ot;
|
|
u8 credits;
|
|
u8 rsvd0[2];
|
|
u8 seq_vld;
|
|
__be32 snd_nxt;
|
|
__be32 snd_una;
|
|
__be64 rsvd1;
|
|
};
|
|
|
|
struct cpl_fw6_msg {
|
|
u8 opcode;
|
|
u8 type;
|
|
__be16 rsvd0;
|
|
__be32 rsvd1;
|
|
__be64 data[4];
|
|
};
|
|
|
|
enum {
|
|
ULP_TX_MEM_READ = 2,
|
|
ULP_TX_MEM_WRITE = 3,
|
|
ULP_TX_PKT = 4
|
|
};
|
|
|
|
enum {
|
|
ULP_TX_SC_NOOP = 0x80,
|
|
ULP_TX_SC_IMM = 0x81,
|
|
ULP_TX_SC_DSGL = 0x82,
|
|
ULP_TX_SC_ISGL = 0x83
|
|
};
|
|
|
|
struct ulptx_sge_pair {
|
|
__be32 len[2];
|
|
__be64 addr[2];
|
|
};
|
|
|
|
struct ulptx_sgl {
|
|
__be32 cmd_nsge;
|
|
#define ULPTX_CMD(x) ((x) << 24)
|
|
#define ULPTX_NSGE(x) ((x) << 0)
|
|
__be32 len0;
|
|
__be64 addr0;
|
|
struct ulptx_sge_pair sge[0];
|
|
};
|
|
|
|
struct ulp_mem_io {
|
|
WR_HDR;
|
|
__be32 cmd;
|
|
#define ULP_MEMIO_ORDER(x) ((x) << 23)
|
|
__be32 len16; /* command length */
|
|
__be32 dlen; /* data length in 32-byte units */
|
|
#define ULP_MEMIO_DATA_LEN(x) ((x) << 0)
|
|
__be32 lock_addr;
|
|
#define ULP_MEMIO_ADDR(x) ((x) << 0)
|
|
#define ULP_MEMIO_LOCK(x) ((x) << 31)
|
|
};
|
|
|
|
#endif /* __T4_MSG_H */
|