784 строки
20 KiB
C
784 строки
20 KiB
C
/*
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* ARC On-Chip(fpga) UART Driver
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*
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* Copyright (C) 2010-2012 Synopsys, Inc. (www.synopsys.com)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* vineetg: July 10th 2012
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* -Decoupled the driver from arch/arc
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* +Using platform_get_resource() for irq/membase (thx to bfin_uart.c)
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* +Using early_platform_xxx() for early console (thx to mach-shmobile/xxx)
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*
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* Vineetg: Aug 21st 2010
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* -Is uart_tx_stopped() not done in tty write path as it has already been
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* taken care of, in serial core
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*
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* Vineetg: Aug 18th 2010
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* -New Serial Core based ARC UART driver
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* -Derived largely from blackfin driver albiet with some major tweaks
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*
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* TODO:
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* -check if sysreq works
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*/
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#if defined(CONFIG_SERIAL_ARC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
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#define SUPPORT_SYSRQ
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#endif
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#include <linux/module.h>
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#include <linux/serial.h>
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#include <linux/console.h>
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#include <linux/sysrq.h>
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#include <linux/platform_device.h>
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#include <linux/tty.h>
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#include <linux/tty_flip.h>
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#include <linux/serial_core.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/of_platform.h>
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/*************************************
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* ARC UART Hardware Specs
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************************************/
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#define ARC_UART_TX_FIFO_SIZE 1
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/*
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* UART Register set (this is not a Standards Compliant IP)
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* Also each reg is Word aligned, but only 8 bits wide
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*/
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#define R_ID0 0
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#define R_ID1 4
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#define R_ID2 8
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#define R_ID3 12
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#define R_DATA 16
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#define R_STS 20
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#define R_BAUDL 24
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#define R_BAUDH 28
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/* Bits for UART Status Reg (R/W) */
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#define RXIENB 0x04 /* Receive Interrupt Enable */
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#define TXIENB 0x40 /* Transmit Interrupt Enable */
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#define RXEMPTY 0x20 /* Receive FIFO Empty: No char receivede */
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#define TXEMPTY 0x80 /* Transmit FIFO Empty, thus char can be written into */
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#define RXFULL 0x08 /* Receive FIFO full */
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#define RXFULL1 0x10 /* Receive FIFO has space for 1 char (tot space=4) */
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#define RXFERR 0x01 /* Frame Error: Stop Bit not detected */
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#define RXOERR 0x02 /* OverFlow Err: Char recv but RXFULL still set */
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/* Uart bit fiddling helpers: lowest level */
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#define RBASE(uart, reg) (uart->port.membase + reg)
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#define UART_REG_SET(u, r, v) writeb((v), RBASE(u, r))
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#define UART_REG_GET(u, r) readb(RBASE(u, r))
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#define UART_REG_OR(u, r, v) UART_REG_SET(u, r, UART_REG_GET(u, r) | (v))
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#define UART_REG_CLR(u, r, v) UART_REG_SET(u, r, UART_REG_GET(u, r) & ~(v))
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/* Uart bit fiddling helpers: API level */
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#define UART_SET_DATA(uart, val) UART_REG_SET(uart, R_DATA, val)
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#define UART_GET_DATA(uart) UART_REG_GET(uart, R_DATA)
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#define UART_SET_BAUDH(uart, val) UART_REG_SET(uart, R_BAUDH, val)
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#define UART_SET_BAUDL(uart, val) UART_REG_SET(uart, R_BAUDL, val)
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#define UART_CLR_STATUS(uart, val) UART_REG_CLR(uart, R_STS, val)
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#define UART_GET_STATUS(uart) UART_REG_GET(uart, R_STS)
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#define UART_ALL_IRQ_DISABLE(uart) UART_REG_CLR(uart, R_STS, RXIENB|TXIENB)
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#define UART_RX_IRQ_DISABLE(uart) UART_REG_CLR(uart, R_STS, RXIENB)
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#define UART_TX_IRQ_DISABLE(uart) UART_REG_CLR(uart, R_STS, TXIENB)
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#define UART_ALL_IRQ_ENABLE(uart) UART_REG_OR(uart, R_STS, RXIENB|TXIENB)
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#define UART_RX_IRQ_ENABLE(uart) UART_REG_OR(uart, R_STS, RXIENB)
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#define UART_TX_IRQ_ENABLE(uart) UART_REG_OR(uart, R_STS, TXIENB)
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#define ARC_SERIAL_DEV_NAME "ttyARC"
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struct arc_uart_port {
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struct uart_port port;
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unsigned long baud;
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int is_emulated; /* H/w vs. Instruction Set Simulator */
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};
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#define to_arc_port(uport) container_of(uport, struct arc_uart_port, port)
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static struct arc_uart_port arc_uart_ports[CONFIG_SERIAL_ARC_NR_PORTS];
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#ifdef CONFIG_SERIAL_ARC_CONSOLE
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static struct console arc_console;
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#endif
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#define DRIVER_NAME "arc-uart"
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static struct uart_driver arc_uart_driver = {
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.owner = THIS_MODULE,
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.driver_name = DRIVER_NAME,
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.dev_name = ARC_SERIAL_DEV_NAME,
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.major = 0,
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.minor = 0,
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.nr = CONFIG_SERIAL_ARC_NR_PORTS,
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#ifdef CONFIG_SERIAL_ARC_CONSOLE
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.cons = &arc_console,
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#endif
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};
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static void arc_serial_stop_rx(struct uart_port *port)
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{
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struct arc_uart_port *uart = to_arc_port(port);
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UART_RX_IRQ_DISABLE(uart);
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}
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static void arc_serial_stop_tx(struct uart_port *port)
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{
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struct arc_uart_port *uart = to_arc_port(port);
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while (!(UART_GET_STATUS(uart) & TXEMPTY))
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cpu_relax();
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UART_TX_IRQ_DISABLE(uart);
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}
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/*
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* Return TIOCSER_TEMT when transmitter is not busy.
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*/
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static unsigned int arc_serial_tx_empty(struct uart_port *port)
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{
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struct arc_uart_port *uart = to_arc_port(port);
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unsigned int stat;
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stat = UART_GET_STATUS(uart);
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if (stat & TXEMPTY)
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return TIOCSER_TEMT;
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return 0;
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}
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/*
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* Driver internal routine, used by both tty(serial core) as well as tx-isr
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* -Called under spinlock in either cases
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* -also tty->stopped has already been checked
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* = by uart_start( ) before calling us
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* = tx_ist checks that too before calling
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*/
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static void arc_serial_tx_chars(struct arc_uart_port *uart)
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{
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struct circ_buf *xmit = &uart->port.state->xmit;
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int sent = 0;
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unsigned char ch;
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if (unlikely(uart->port.x_char)) {
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UART_SET_DATA(uart, uart->port.x_char);
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uart->port.icount.tx++;
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uart->port.x_char = 0;
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sent = 1;
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} else if (xmit->tail != xmit->head) { /* TODO: uart_circ_empty */
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ch = xmit->buf[xmit->tail];
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xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
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uart->port.icount.tx++;
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while (!(UART_GET_STATUS(uart) & TXEMPTY))
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cpu_relax();
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UART_SET_DATA(uart, ch);
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sent = 1;
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}
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/*
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* If num chars in xmit buffer are too few, ask tty layer for more.
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* By Hard ISR to schedule processing in software interrupt part
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*/
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if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
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uart_write_wakeup(&uart->port);
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if (sent)
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UART_TX_IRQ_ENABLE(uart);
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}
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/*
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* port is locked and interrupts are disabled
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* uart_start( ) calls us under the port spinlock irqsave
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*/
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static void arc_serial_start_tx(struct uart_port *port)
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{
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struct arc_uart_port *uart = to_arc_port(port);
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arc_serial_tx_chars(uart);
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}
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static void arc_serial_rx_chars(struct arc_uart_port *uart, unsigned int status)
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{
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unsigned int ch, flg = 0;
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/*
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* UART has 4 deep RX-FIFO. Driver's recongnition of this fact
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* is very subtle. Here's how ...
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* Upon getting a RX-Intr, such that RX-EMPTY=0, meaning data available,
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* driver reads the DATA Reg and keeps doing that in a loop, until
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* RX-EMPTY=1. Multiple chars being avail, with a single Interrupt,
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* before RX-EMPTY=0, implies some sort of buffering going on in the
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* controller, which is indeed the Rx-FIFO.
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*/
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do {
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/*
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* This could be an Rx Intr for err (no data),
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* so check err and clear that Intr first
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*/
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if (unlikely(status & (RXOERR | RXFERR))) {
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if (status & RXOERR) {
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uart->port.icount.overrun++;
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flg = TTY_OVERRUN;
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UART_CLR_STATUS(uart, RXOERR);
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}
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if (status & RXFERR) {
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uart->port.icount.frame++;
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flg = TTY_FRAME;
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UART_CLR_STATUS(uart, RXFERR);
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}
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} else
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flg = TTY_NORMAL;
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if (status & RXEMPTY)
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continue;
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ch = UART_GET_DATA(uart);
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uart->port.icount.rx++;
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if (!(uart_handle_sysrq_char(&uart->port, ch)))
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uart_insert_char(&uart->port, status, RXOERR, ch, flg);
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spin_unlock(&uart->port.lock);
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tty_flip_buffer_push(&uart->port.state->port);
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spin_lock(&uart->port.lock);
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} while (!((status = UART_GET_STATUS(uart)) & RXEMPTY));
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}
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/*
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* A note on the Interrupt handling state machine of this driver
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*
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* kernel printk writes funnel thru the console driver framework and in order
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* to keep things simple as well as efficient, it writes to UART in polled
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* mode, in one shot, and exits.
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*
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* OTOH, Userland output (via tty layer), uses interrupt based writes as there
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* can be undeterministic delay between char writes.
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*
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* Thus Rx-interrupts are always enabled, while tx-interrupts are by default
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* disabled.
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*
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* When tty has some data to send out, serial core calls driver's start_tx
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* which
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* -checks-if-tty-buffer-has-char-to-send
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* -writes-data-to-uart
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* -enable-tx-intr
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*
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* Once data bits are pushed out, controller raises the Tx-room-avail-Interrupt.
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* The first thing Tx ISR does is disable further Tx interrupts (as this could
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* be the last char to send, before settling down into the quiet polled mode).
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* It then calls the exact routine used by tty layer write to send out any
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* more char in tty buffer. In case of sending, it re-enables Tx-intr. In case
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* of no data, it remains disabled.
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* This is how the transmit state machine is dynamically switched on/off
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*/
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static irqreturn_t arc_serial_isr(int irq, void *dev_id)
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{
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struct arc_uart_port *uart = dev_id;
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unsigned int status;
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status = UART_GET_STATUS(uart);
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/*
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* Single IRQ for both Rx (data available) Tx (room available) Interrupt
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* notifications from the UART Controller.
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* To demultiplex between the two, we check the relevant bits
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*/
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if (status & RXIENB) {
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/* already in ISR, no need of xx_irqsave */
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spin_lock(&uart->port.lock);
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arc_serial_rx_chars(uart, status);
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spin_unlock(&uart->port.lock);
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}
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if ((status & TXIENB) && (status & TXEMPTY)) {
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/* Unconditionally disable further Tx-Interrupts.
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* will be enabled by tx_chars() if needed.
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*/
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UART_TX_IRQ_DISABLE(uart);
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spin_lock(&uart->port.lock);
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if (!uart_tx_stopped(&uart->port))
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arc_serial_tx_chars(uart);
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spin_unlock(&uart->port.lock);
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}
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return IRQ_HANDLED;
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}
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static unsigned int arc_serial_get_mctrl(struct uart_port *port)
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{
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/*
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* Pretend we have a Modem status reg and following bits are
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* always set, to satify the serial core state machine
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* (DSR) Data Set Ready
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* (CTS) Clear To Send
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* (CAR) Carrier Detect
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*/
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return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
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}
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static void arc_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
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{
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/* MCR not present */
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}
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/* Enable Modem Status Interrupts */
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static void arc_serial_enable_ms(struct uart_port *port)
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{
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/* MSR not present */
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}
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static void arc_serial_break_ctl(struct uart_port *port, int break_state)
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{
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/* ARC UART doesn't support sending Break signal */
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}
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static int arc_serial_startup(struct uart_port *port)
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{
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struct arc_uart_port *uart = to_arc_port(port);
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/* Before we hook up the ISR, Disable all UART Interrupts */
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UART_ALL_IRQ_DISABLE(uart);
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if (request_irq(uart->port.irq, arc_serial_isr, 0, "arc uart rx-tx",
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uart)) {
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dev_warn(uart->port.dev, "Unable to attach ARC UART intr\n");
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return -EBUSY;
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}
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UART_RX_IRQ_ENABLE(uart); /* Only Rx IRQ enabled to begin with */
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return 0;
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}
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/* This is not really needed */
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static void arc_serial_shutdown(struct uart_port *port)
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{
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struct arc_uart_port *uart = to_arc_port(port);
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free_irq(uart->port.irq, uart);
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}
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static void
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arc_serial_set_termios(struct uart_port *port, struct ktermios *new,
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struct ktermios *old)
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{
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struct arc_uart_port *uart = to_arc_port(port);
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unsigned int baud, uartl, uarth, hw_val;
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unsigned long flags;
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/*
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* Use the generic handler so that any specially encoded baud rates
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* such as SPD_xx flags or "%B0" can be handled
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* Max Baud I suppose will not be more than current 115K * 4
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* Formula for ARC UART is: hw-val = ((CLK/(BAUD*4)) -1)
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* spread over two 8-bit registers
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*/
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baud = uart_get_baud_rate(port, new, old, 0, 460800);
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hw_val = port->uartclk / (uart->baud * 4) - 1;
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uartl = hw_val & 0xFF;
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uarth = (hw_val >> 8) & 0xFF;
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/*
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* UART ISS(Instruction Set simulator) emulation has a subtle bug:
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* A existing value of Baudh = 0 is used as a indication to startup
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* it's internal state machine.
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* Thus if baudh is set to 0, 2 times, it chokes.
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* This happens with BAUD=115200 and the formaula above
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* Until that is fixed, when running on ISS, we will set baudh to !0
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*/
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if (uart->is_emulated)
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uarth = 1;
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spin_lock_irqsave(&port->lock, flags);
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UART_ALL_IRQ_DISABLE(uart);
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UART_SET_BAUDL(uart, uartl);
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UART_SET_BAUDH(uart, uarth);
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UART_RX_IRQ_ENABLE(uart);
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/*
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* UART doesn't support Parity/Hardware Flow Control;
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* Only supports 8N1 character size
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*/
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new->c_cflag &= ~(CMSPAR|CRTSCTS|CSIZE);
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new->c_cflag |= CS8;
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if (old)
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tty_termios_copy_hw(new, old);
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/* Don't rewrite B0 */
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if (tty_termios_baud_rate(new))
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tty_termios_encode_baud_rate(new, baud, baud);
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uart_update_timeout(port, new->c_cflag, baud);
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spin_unlock_irqrestore(&port->lock, flags);
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}
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static const char *arc_serial_type(struct uart_port *port)
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{
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struct arc_uart_port *uart = to_arc_port(port);
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return uart->port.type == PORT_ARC ? DRIVER_NAME : NULL;
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}
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static void arc_serial_release_port(struct uart_port *port)
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{
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}
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static int arc_serial_request_port(struct uart_port *port)
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{
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return 0;
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}
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/*
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* Verify the new serial_struct (for TIOCSSERIAL).
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*/
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static int
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arc_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
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{
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if (port->type != PORT_UNKNOWN && ser->type != PORT_ARC)
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return -EINVAL;
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return 0;
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}
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/*
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* Configure/autoconfigure the port.
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*/
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static void arc_serial_config_port(struct uart_port *port, int flags)
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{
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struct arc_uart_port *uart = to_arc_port(port);
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if (flags & UART_CONFIG_TYPE)
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uart->port.type = PORT_ARC;
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}
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#if defined(CONFIG_CONSOLE_POLL) || defined(CONFIG_SERIAL_ARC_CONSOLE)
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static void arc_serial_poll_putchar(struct uart_port *port, unsigned char chr)
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{
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struct arc_uart_port *uart = to_arc_port(port);
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while (!(UART_GET_STATUS(uart) & TXEMPTY))
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cpu_relax();
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UART_SET_DATA(uart, chr);
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}
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#endif
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#ifdef CONFIG_CONSOLE_POLL
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static int arc_serial_poll_getchar(struct uart_port *port)
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{
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struct arc_uart_port *uart = to_arc_port(port);
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unsigned char chr;
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while (!(UART_GET_STATUS(uart) & RXEMPTY))
|
|
cpu_relax();
|
|
|
|
chr = UART_GET_DATA(uart);
|
|
return chr;
|
|
}
|
|
#endif
|
|
|
|
static struct uart_ops arc_serial_pops = {
|
|
.tx_empty = arc_serial_tx_empty,
|
|
.set_mctrl = arc_serial_set_mctrl,
|
|
.get_mctrl = arc_serial_get_mctrl,
|
|
.stop_tx = arc_serial_stop_tx,
|
|
.start_tx = arc_serial_start_tx,
|
|
.stop_rx = arc_serial_stop_rx,
|
|
.enable_ms = arc_serial_enable_ms,
|
|
.break_ctl = arc_serial_break_ctl,
|
|
.startup = arc_serial_startup,
|
|
.shutdown = arc_serial_shutdown,
|
|
.set_termios = arc_serial_set_termios,
|
|
.type = arc_serial_type,
|
|
.release_port = arc_serial_release_port,
|
|
.request_port = arc_serial_request_port,
|
|
.config_port = arc_serial_config_port,
|
|
.verify_port = arc_serial_verify_port,
|
|
#ifdef CONFIG_CONSOLE_POLL
|
|
.poll_put_char = arc_serial_poll_putchar,
|
|
.poll_get_char = arc_serial_poll_getchar,
|
|
#endif
|
|
};
|
|
|
|
static int
|
|
arc_uart_init_one(struct platform_device *pdev, int dev_id)
|
|
{
|
|
struct resource *res, *res2;
|
|
unsigned long *plat_data;
|
|
struct arc_uart_port *uart = &arc_uart_ports[dev_id];
|
|
|
|
plat_data = (unsigned long *)dev_get_platdata(&pdev->dev);
|
|
if (!plat_data)
|
|
return -ENODEV;
|
|
|
|
uart->is_emulated = !!plat_data[0]; /* workaround ISS bug */
|
|
|
|
if (is_early_platform_device(pdev)) {
|
|
uart->port.uartclk = plat_data[1];
|
|
uart->baud = plat_data[2];
|
|
} else {
|
|
struct device_node *np = pdev->dev.of_node;
|
|
u32 val;
|
|
|
|
if (of_property_read_u32(np, "clock-frequency", &val)) {
|
|
dev_err(&pdev->dev, "clock-frequency property NOTset\n");
|
|
return -EINVAL;
|
|
}
|
|
uart->port.uartclk = val;
|
|
|
|
if (of_property_read_u32(np, "current-speed", &val)) {
|
|
dev_err(&pdev->dev, "current-speed property NOT set\n");
|
|
return -EINVAL;
|
|
}
|
|
uart->baud = val;
|
|
}
|
|
|
|
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
if (!res)
|
|
return -ENODEV;
|
|
|
|
res2 = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
|
|
if (!res2)
|
|
return -ENODEV;
|
|
|
|
uart->port.mapbase = res->start;
|
|
uart->port.membase = ioremap_nocache(res->start, resource_size(res));
|
|
if (!uart->port.membase)
|
|
/* No point of dev_err since UART itself is hosed here */
|
|
return -ENXIO;
|
|
|
|
uart->port.irq = res2->start;
|
|
uart->port.dev = &pdev->dev;
|
|
uart->port.iotype = UPIO_MEM;
|
|
uart->port.flags = UPF_BOOT_AUTOCONF;
|
|
uart->port.line = dev_id;
|
|
uart->port.ops = &arc_serial_pops;
|
|
|
|
uart->port.fifosize = ARC_UART_TX_FIFO_SIZE;
|
|
|
|
/*
|
|
* uart_insert_char( ) uses it in decideding whether to ignore a
|
|
* char or not. Explicitly setting it here, removes the subtelty
|
|
*/
|
|
uart->port.ignore_status_mask = 0;
|
|
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_SERIAL_ARC_CONSOLE
|
|
|
|
static int arc_serial_console_setup(struct console *co, char *options)
|
|
{
|
|
struct uart_port *port;
|
|
int baud = 115200;
|
|
int bits = 8;
|
|
int parity = 'n';
|
|
int flow = 'n';
|
|
|
|
if (co->index < 0 || co->index >= CONFIG_SERIAL_ARC_NR_PORTS)
|
|
return -ENODEV;
|
|
|
|
/*
|
|
* The uart port backing the console (e.g. ttyARC1) might not have been
|
|
* init yet. If so, defer the console setup to after the port.
|
|
*/
|
|
port = &arc_uart_ports[co->index].port;
|
|
if (!port->membase)
|
|
return -ENODEV;
|
|
|
|
if (options)
|
|
uart_parse_options(options, &baud, &parity, &bits, &flow);
|
|
|
|
/*
|
|
* Serial core will call port->ops->set_termios( )
|
|
* which will set the baud reg
|
|
*/
|
|
return uart_set_options(port, co, baud, parity, bits, flow);
|
|
}
|
|
|
|
static void arc_serial_console_putchar(struct uart_port *port, int ch)
|
|
{
|
|
arc_serial_poll_putchar(port, (unsigned char)ch);
|
|
}
|
|
|
|
/*
|
|
* Interrupts are disabled on entering
|
|
*/
|
|
static void arc_serial_console_write(struct console *co, const char *s,
|
|
unsigned int count)
|
|
{
|
|
struct uart_port *port = &arc_uart_ports[co->index].port;
|
|
unsigned long flags;
|
|
|
|
spin_lock_irqsave(&port->lock, flags);
|
|
uart_console_write(port, s, count, arc_serial_console_putchar);
|
|
spin_unlock_irqrestore(&port->lock, flags);
|
|
}
|
|
|
|
static struct console arc_console = {
|
|
.name = ARC_SERIAL_DEV_NAME,
|
|
.write = arc_serial_console_write,
|
|
.device = uart_console_device,
|
|
.setup = arc_serial_console_setup,
|
|
.flags = CON_PRINTBUFFER,
|
|
.index = -1,
|
|
.data = &arc_uart_driver
|
|
};
|
|
|
|
static __init void early_serial_write(struct console *con, const char *s,
|
|
unsigned int n)
|
|
{
|
|
struct uart_port *port = &arc_uart_ports[con->index].port;
|
|
unsigned int i;
|
|
|
|
for (i = 0; i < n; i++, s++) {
|
|
if (*s == '\n')
|
|
arc_serial_poll_putchar(port, '\r');
|
|
arc_serial_poll_putchar(port, *s);
|
|
}
|
|
}
|
|
|
|
static struct console arc_early_serial_console __initdata = {
|
|
.name = "early_ARCuart",
|
|
.write = early_serial_write,
|
|
.flags = CON_PRINTBUFFER | CON_BOOT,
|
|
.index = -1
|
|
};
|
|
|
|
static int __init arc_serial_probe_earlyprintk(struct platform_device *pdev)
|
|
{
|
|
int dev_id = pdev->id < 0 ? 0 : pdev->id;
|
|
int rc;
|
|
|
|
arc_early_serial_console.index = dev_id;
|
|
|
|
rc = arc_uart_init_one(pdev, dev_id);
|
|
if (rc)
|
|
panic("early console init failed\n");
|
|
|
|
arc_serial_console_setup(&arc_early_serial_console, NULL);
|
|
|
|
register_console(&arc_early_serial_console);
|
|
return 0;
|
|
}
|
|
#endif /* CONFIG_SERIAL_ARC_CONSOLE */
|
|
|
|
static int arc_serial_probe(struct platform_device *pdev)
|
|
{
|
|
int rc, dev_id;
|
|
struct device_node *np = pdev->dev.of_node;
|
|
|
|
/* no device tree device */
|
|
if (!np)
|
|
return -ENODEV;
|
|
|
|
dev_id = of_alias_get_id(np, "serial");
|
|
if (dev_id < 0)
|
|
dev_id = 0;
|
|
|
|
rc = arc_uart_init_one(pdev, dev_id);
|
|
if (rc)
|
|
return rc;
|
|
|
|
rc = uart_add_one_port(&arc_uart_driver, &arc_uart_ports[dev_id].port);
|
|
return rc;
|
|
}
|
|
|
|
static int arc_serial_remove(struct platform_device *pdev)
|
|
{
|
|
/* This will never be called */
|
|
return 0;
|
|
}
|
|
|
|
static const struct of_device_id arc_uart_dt_ids[] = {
|
|
{ .compatible = "snps,arc-uart" },
|
|
{ /* Sentinel */ }
|
|
};
|
|
MODULE_DEVICE_TABLE(of, arc_uart_dt_ids);
|
|
|
|
static struct platform_driver arc_platform_driver = {
|
|
.probe = arc_serial_probe,
|
|
.remove = arc_serial_remove,
|
|
.driver = {
|
|
.name = DRIVER_NAME,
|
|
.owner = THIS_MODULE,
|
|
.of_match_table = arc_uart_dt_ids,
|
|
},
|
|
};
|
|
|
|
#ifdef CONFIG_SERIAL_ARC_CONSOLE
|
|
|
|
static struct platform_driver early_arc_platform_driver __initdata = {
|
|
.probe = arc_serial_probe_earlyprintk,
|
|
.remove = arc_serial_remove,
|
|
.driver = {
|
|
.name = DRIVER_NAME,
|
|
.owner = THIS_MODULE,
|
|
},
|
|
};
|
|
/*
|
|
* Register an early platform driver of "earlyprintk" class.
|
|
* ARCH platform code installs the driver and probes the early devices
|
|
* The installation could rely on user specifying earlyprintk=xyx in cmd line
|
|
* or it could be done independently, for all "earlyprintk" class drivers.
|
|
* [see arch/arc/plat-arcfpga/platform.c]
|
|
*/
|
|
early_platform_init("earlyprintk", &early_arc_platform_driver);
|
|
|
|
#endif /* CONFIG_SERIAL_ARC_CONSOLE */
|
|
|
|
static int __init arc_serial_init(void)
|
|
{
|
|
int ret;
|
|
|
|
ret = uart_register_driver(&arc_uart_driver);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = platform_driver_register(&arc_platform_driver);
|
|
if (ret)
|
|
uart_unregister_driver(&arc_uart_driver);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static void __exit arc_serial_exit(void)
|
|
{
|
|
platform_driver_unregister(&arc_platform_driver);
|
|
uart_unregister_driver(&arc_uart_driver);
|
|
}
|
|
|
|
module_init(arc_serial_init);
|
|
module_exit(arc_serial_exit);
|
|
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_ALIAS("platform:" DRIVER_NAME);
|
|
MODULE_AUTHOR("Vineet Gupta");
|
|
MODULE_DESCRIPTION("ARC(Synopsys) On-Chip(fpga) serial driver");
|