1048 строки
25 KiB
C
1048 строки
25 KiB
C
/*
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* MCP23S08 SPI/I2C GPIO gpio expander driver
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*
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* The inputs and outputs of the mcp23s08, mcp23s17, mcp23008 and mcp23017 are
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* supported.
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* For the I2C versions of the chips (mcp23008 and mcp23017) generation of
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* interrupts is also supported.
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* The hardware of the SPI versions of the chips (mcp23s08 and mcp23s17) is
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* also capable of generating interrupts, but the linux driver does not
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* support that yet.
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*/
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#include <linux/kernel.h>
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#include <linux/device.h>
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#include <linux/mutex.h>
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#include <linux/module.h>
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#include <linux/gpio.h>
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#include <linux/i2c.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/mcp23s08.h>
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#include <linux/slab.h>
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#include <asm/byteorder.h>
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#include <linux/interrupt.h>
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#include <linux/of_irq.h>
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#include <linux/of_device.h>
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#include <linux/regmap.h>
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/**
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* MCP types supported by driver
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*/
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#define MCP_TYPE_S08 0
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#define MCP_TYPE_S17 1
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#define MCP_TYPE_008 2
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#define MCP_TYPE_017 3
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#define MCP_TYPE_S18 4
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/* Registers are all 8 bits wide.
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*
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* The mcp23s17 has twice as many bits, and can be configured to work
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* with either 16 bit registers or with two adjacent 8 bit banks.
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*/
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#define MCP_IODIR 0x00 /* init/reset: all ones */
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#define MCP_IPOL 0x01
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#define MCP_GPINTEN 0x02
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#define MCP_DEFVAL 0x03
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#define MCP_INTCON 0x04
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#define MCP_IOCON 0x05
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# define IOCON_MIRROR (1 << 6)
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# define IOCON_SEQOP (1 << 5)
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# define IOCON_HAEN (1 << 3)
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# define IOCON_ODR (1 << 2)
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# define IOCON_INTPOL (1 << 1)
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# define IOCON_INTCC (1)
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#define MCP_GPPU 0x06
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#define MCP_INTF 0x07
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#define MCP_INTCAP 0x08
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#define MCP_GPIO 0x09
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#define MCP_OLAT 0x0a
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struct mcp23s08;
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struct mcp23s08 {
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u8 addr;
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bool irq_active_high;
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bool reg_shift;
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u16 cache[11];
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u16 irq_rise;
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u16 irq_fall;
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int irq;
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bool irq_controller;
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/* lock protects the cached values */
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struct mutex lock;
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struct mutex irq_lock;
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struct gpio_chip chip;
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struct regmap *regmap;
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struct device *dev;
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};
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static const struct regmap_config mcp23x08_regmap = {
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.reg_bits = 8,
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.val_bits = 8,
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.reg_stride = 1,
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.max_register = MCP_OLAT,
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};
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static const struct regmap_config mcp23x17_regmap = {
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.reg_bits = 8,
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.val_bits = 16,
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.reg_stride = 2,
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.max_register = MCP_OLAT << 1,
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.val_format_endian = REGMAP_ENDIAN_LITTLE,
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};
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/*----------------------------------------------------------------------*/
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#ifdef CONFIG_SPI_MASTER
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static int mcp23sxx_spi_write(void *context, const void *data, size_t count)
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{
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struct mcp23s08 *mcp = context;
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struct spi_device *spi = to_spi_device(mcp->dev);
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struct spi_message m;
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struct spi_transfer t[2] = { { .tx_buf = &mcp->addr, .len = 1, },
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{ .tx_buf = data, .len = count, }, };
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spi_message_init(&m);
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spi_message_add_tail(&t[0], &m);
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spi_message_add_tail(&t[1], &m);
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return spi_sync(spi, &m);
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}
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static int mcp23sxx_spi_gather_write(void *context,
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const void *reg, size_t reg_size,
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const void *val, size_t val_size)
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{
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struct mcp23s08 *mcp = context;
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struct spi_device *spi = to_spi_device(mcp->dev);
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struct spi_message m;
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struct spi_transfer t[3] = { { .tx_buf = &mcp->addr, .len = 1, },
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{ .tx_buf = reg, .len = reg_size, },
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{ .tx_buf = val, .len = val_size, }, };
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spi_message_init(&m);
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spi_message_add_tail(&t[0], &m);
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spi_message_add_tail(&t[1], &m);
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spi_message_add_tail(&t[2], &m);
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return spi_sync(spi, &m);
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}
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static int mcp23sxx_spi_read(void *context, const void *reg, size_t reg_size,
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void *val, size_t val_size)
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{
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struct mcp23s08 *mcp = context;
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struct spi_device *spi = to_spi_device(mcp->dev);
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u8 tx[2];
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if (reg_size != 1)
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return -EINVAL;
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tx[0] = mcp->addr | 0x01;
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tx[1] = *((u8 *) reg);
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return spi_write_then_read(spi, tx, sizeof(tx), val, val_size);
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}
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static const struct regmap_bus mcp23sxx_spi_regmap = {
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.write = mcp23sxx_spi_write,
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.gather_write = mcp23sxx_spi_gather_write,
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.read = mcp23sxx_spi_read,
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};
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#endif /* CONFIG_SPI_MASTER */
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static int mcp_read(struct mcp23s08 *mcp, unsigned int reg, unsigned int *val)
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{
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return regmap_read(mcp->regmap, reg << mcp->reg_shift, val);
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}
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static int mcp_write(struct mcp23s08 *mcp, unsigned int reg, unsigned int val)
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{
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return regmap_write(mcp->regmap, reg << mcp->reg_shift, val);
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}
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static int mcp_update_cache(struct mcp23s08 *mcp)
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{
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int ret, reg, i;
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for (i = 0; i < ARRAY_SIZE(mcp->cache); i++) {
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ret = mcp_read(mcp, i, ®);
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if (ret < 0)
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return ret;
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mcp->cache[i] = reg;
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}
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return 0;
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}
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/*----------------------------------------------------------------------*/
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/* A given spi_device can represent up to eight mcp23sxx chips
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* sharing the same chipselect but using different addresses
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* (e.g. chips #0 and #3 might be populated, but not #1 or $2).
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* Driver data holds all the per-chip data.
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*/
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struct mcp23s08_driver_data {
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unsigned ngpio;
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struct mcp23s08 *mcp[8];
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struct mcp23s08 chip[];
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};
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static int mcp23s08_direction_input(struct gpio_chip *chip, unsigned offset)
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{
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struct mcp23s08 *mcp = gpiochip_get_data(chip);
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int status;
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mutex_lock(&mcp->lock);
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mcp->cache[MCP_IODIR] |= (1 << offset);
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status = mcp_write(mcp, MCP_IODIR, mcp->cache[MCP_IODIR]);
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mutex_unlock(&mcp->lock);
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return status;
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}
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static int mcp23s08_get(struct gpio_chip *chip, unsigned offset)
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{
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struct mcp23s08 *mcp = gpiochip_get_data(chip);
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int status, ret;
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mutex_lock(&mcp->lock);
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/* REVISIT reading this clears any IRQ ... */
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ret = mcp_read(mcp, MCP_GPIO, &status);
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if (ret < 0)
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status = 0;
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else {
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mcp->cache[MCP_GPIO] = status;
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status = !!(status & (1 << offset));
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}
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mutex_unlock(&mcp->lock);
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return status;
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}
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static int __mcp23s08_set(struct mcp23s08 *mcp, unsigned mask, int value)
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{
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unsigned olat = mcp->cache[MCP_OLAT];
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if (value)
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olat |= mask;
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else
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olat &= ~mask;
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mcp->cache[MCP_OLAT] = olat;
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return mcp_write(mcp, MCP_OLAT, olat);
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}
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static void mcp23s08_set(struct gpio_chip *chip, unsigned offset, int value)
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{
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struct mcp23s08 *mcp = gpiochip_get_data(chip);
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unsigned mask = 1 << offset;
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mutex_lock(&mcp->lock);
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__mcp23s08_set(mcp, mask, value);
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mutex_unlock(&mcp->lock);
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}
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static int
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mcp23s08_direction_output(struct gpio_chip *chip, unsigned offset, int value)
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{
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struct mcp23s08 *mcp = gpiochip_get_data(chip);
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unsigned mask = 1 << offset;
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int status;
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mutex_lock(&mcp->lock);
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status = __mcp23s08_set(mcp, mask, value);
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if (status == 0) {
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mcp->cache[MCP_IODIR] &= ~mask;
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status = mcp_write(mcp, MCP_IODIR, mcp->cache[MCP_IODIR]);
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}
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mutex_unlock(&mcp->lock);
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return status;
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}
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/*----------------------------------------------------------------------*/
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static irqreturn_t mcp23s08_irq(int irq, void *data)
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{
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struct mcp23s08 *mcp = data;
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int intcap, intf, i, gpio, gpio_orig, intcap_mask;
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unsigned int child_irq;
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bool intf_set, intcap_changed, gpio_bit_changed,
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defval_changed, gpio_set;
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mutex_lock(&mcp->lock);
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if (mcp_read(mcp, MCP_INTF, &intf) < 0) {
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mutex_unlock(&mcp->lock);
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return IRQ_HANDLED;
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}
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mcp->cache[MCP_INTF] = intf;
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if (mcp_read(mcp, MCP_INTCAP, &intcap) < 0) {
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mutex_unlock(&mcp->lock);
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return IRQ_HANDLED;
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}
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mcp->cache[MCP_INTCAP] = intcap;
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/* This clears the interrupt(configurable on S18) */
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if (mcp_read(mcp, MCP_GPIO, &gpio) < 0) {
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mutex_unlock(&mcp->lock);
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return IRQ_HANDLED;
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}
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gpio_orig = mcp->cache[MCP_GPIO];
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mcp->cache[MCP_GPIO] = gpio;
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mutex_unlock(&mcp->lock);
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if (mcp->cache[MCP_INTF] == 0) {
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/* There is no interrupt pending */
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return IRQ_HANDLED;
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}
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dev_dbg(mcp->chip.parent,
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"intcap 0x%04X intf 0x%04X gpio_orig 0x%04X gpio 0x%04X\n",
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intcap, intf, gpio_orig, gpio);
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for (i = 0; i < mcp->chip.ngpio; i++) {
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/* We must check all of the inputs on the chip,
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* otherwise we may not notice a change on >=2 pins.
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*
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* On at least the mcp23s17, INTCAP is only updated
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* one byte at a time(INTCAPA and INTCAPB are
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* not written to at the same time - only on a per-bank
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* basis).
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*
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* INTF only contains the single bit that caused the
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* interrupt per-bank. On the mcp23s17, there is
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* INTFA and INTFB. If two pins are changed on the A
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* side at the same time, INTF will only have one bit
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* set. If one pin on the A side and one pin on the B
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* side are changed at the same time, INTF will have
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* two bits set. Thus, INTF can't be the only check
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* to see if the input has changed.
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*/
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intf_set = BIT(i) & mcp->cache[MCP_INTF];
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if (i < 8 && intf_set)
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intcap_mask = 0x00FF;
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else if (i >= 8 && intf_set)
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intcap_mask = 0xFF00;
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else
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intcap_mask = 0x00;
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intcap_changed = (intcap_mask &
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(BIT(i) & mcp->cache[MCP_INTCAP])) !=
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(intcap_mask & (BIT(i) & gpio_orig));
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gpio_set = BIT(i) & mcp->cache[MCP_GPIO];
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gpio_bit_changed = (BIT(i) & gpio_orig) !=
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(BIT(i) & mcp->cache[MCP_GPIO]);
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defval_changed = (BIT(i) & mcp->cache[MCP_INTCON]) &&
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((BIT(i) & mcp->cache[MCP_GPIO]) !=
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(BIT(i) & mcp->cache[MCP_DEFVAL]));
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if (((gpio_bit_changed || intcap_changed) &&
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(BIT(i) & mcp->irq_rise) && gpio_set) ||
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((gpio_bit_changed || intcap_changed) &&
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(BIT(i) & mcp->irq_fall) && !gpio_set) ||
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defval_changed) {
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child_irq = irq_find_mapping(mcp->chip.irqdomain, i);
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handle_nested_irq(child_irq);
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}
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}
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return IRQ_HANDLED;
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}
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static void mcp23s08_irq_mask(struct irq_data *data)
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{
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struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
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struct mcp23s08 *mcp = gpiochip_get_data(gc);
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unsigned int pos = data->hwirq;
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mcp->cache[MCP_GPINTEN] &= ~BIT(pos);
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}
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static void mcp23s08_irq_unmask(struct irq_data *data)
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{
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struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
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struct mcp23s08 *mcp = gpiochip_get_data(gc);
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unsigned int pos = data->hwirq;
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mcp->cache[MCP_GPINTEN] |= BIT(pos);
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}
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static int mcp23s08_irq_set_type(struct irq_data *data, unsigned int type)
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{
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struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
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struct mcp23s08 *mcp = gpiochip_get_data(gc);
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unsigned int pos = data->hwirq;
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int status = 0;
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if ((type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) {
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mcp->cache[MCP_INTCON] &= ~BIT(pos);
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mcp->irq_rise |= BIT(pos);
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mcp->irq_fall |= BIT(pos);
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} else if (type & IRQ_TYPE_EDGE_RISING) {
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mcp->cache[MCP_INTCON] &= ~BIT(pos);
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mcp->irq_rise |= BIT(pos);
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mcp->irq_fall &= ~BIT(pos);
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} else if (type & IRQ_TYPE_EDGE_FALLING) {
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mcp->cache[MCP_INTCON] &= ~BIT(pos);
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mcp->irq_rise &= ~BIT(pos);
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mcp->irq_fall |= BIT(pos);
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} else if (type & IRQ_TYPE_LEVEL_HIGH) {
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mcp->cache[MCP_INTCON] |= BIT(pos);
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mcp->cache[MCP_DEFVAL] &= ~BIT(pos);
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} else if (type & IRQ_TYPE_LEVEL_LOW) {
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mcp->cache[MCP_INTCON] |= BIT(pos);
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mcp->cache[MCP_DEFVAL] |= BIT(pos);
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} else
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return -EINVAL;
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return status;
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}
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static void mcp23s08_irq_bus_lock(struct irq_data *data)
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{
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struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
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struct mcp23s08 *mcp = gpiochip_get_data(gc);
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mutex_lock(&mcp->irq_lock);
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}
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static void mcp23s08_irq_bus_unlock(struct irq_data *data)
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{
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struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
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struct mcp23s08 *mcp = gpiochip_get_data(gc);
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mutex_lock(&mcp->lock);
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mcp_write(mcp, MCP_GPINTEN, mcp->cache[MCP_GPINTEN]);
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mcp_write(mcp, MCP_DEFVAL, mcp->cache[MCP_DEFVAL]);
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mcp_write(mcp, MCP_INTCON, mcp->cache[MCP_INTCON]);
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mutex_unlock(&mcp->lock);
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mutex_unlock(&mcp->irq_lock);
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}
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static struct irq_chip mcp23s08_irq_chip = {
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.name = "gpio-mcp23xxx",
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.irq_mask = mcp23s08_irq_mask,
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.irq_unmask = mcp23s08_irq_unmask,
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.irq_set_type = mcp23s08_irq_set_type,
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.irq_bus_lock = mcp23s08_irq_bus_lock,
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.irq_bus_sync_unlock = mcp23s08_irq_bus_unlock,
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};
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static int mcp23s08_irq_setup(struct mcp23s08 *mcp)
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{
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struct gpio_chip *chip = &mcp->chip;
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int err;
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unsigned long irqflags = IRQF_ONESHOT | IRQF_SHARED;
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mutex_init(&mcp->irq_lock);
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if (mcp->irq_active_high)
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irqflags |= IRQF_TRIGGER_HIGH;
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else
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irqflags |= IRQF_TRIGGER_LOW;
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err = devm_request_threaded_irq(chip->parent, mcp->irq, NULL,
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mcp23s08_irq,
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irqflags, dev_name(chip->parent), mcp);
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if (err != 0) {
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dev_err(chip->parent, "unable to request IRQ#%d: %d\n",
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mcp->irq, err);
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return err;
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}
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err = gpiochip_irqchip_add_nested(chip,
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&mcp23s08_irq_chip,
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0,
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handle_simple_irq,
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IRQ_TYPE_NONE);
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if (err) {
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dev_err(chip->parent,
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"could not connect irqchip to gpiochip: %d\n", err);
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return err;
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}
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gpiochip_set_nested_irqchip(chip,
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&mcp23s08_irq_chip,
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mcp->irq);
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return 0;
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}
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/*----------------------------------------------------------------------*/
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#ifdef CONFIG_DEBUG_FS
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#include <linux/seq_file.h>
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|
|
/*
|
|
* This shows more info than the generic gpio dump code:
|
|
* pullups, deglitching, open drain drive.
|
|
*/
|
|
static void mcp23s08_dbg_show(struct seq_file *s, struct gpio_chip *chip)
|
|
{
|
|
struct mcp23s08 *mcp;
|
|
char bank;
|
|
int t;
|
|
unsigned mask;
|
|
|
|
mcp = gpiochip_get_data(chip);
|
|
|
|
/* NOTE: we only handle one bank for now ... */
|
|
bank = '0' + ((mcp->addr >> 1) & 0x7);
|
|
|
|
mutex_lock(&mcp->lock);
|
|
t = mcp_update_cache(mcp);
|
|
if (t < 0) {
|
|
seq_printf(s, " I/O ERROR %d\n", t);
|
|
goto done;
|
|
}
|
|
|
|
for (t = 0, mask = 1; t < chip->ngpio; t++, mask <<= 1) {
|
|
const char *label;
|
|
|
|
label = gpiochip_is_requested(chip, t);
|
|
if (!label)
|
|
continue;
|
|
|
|
seq_printf(s, " gpio-%-3d P%c.%d (%-12s) %s %s %s",
|
|
chip->base + t, bank, t, label,
|
|
(mcp->cache[MCP_IODIR] & mask) ? "in " : "out",
|
|
(mcp->cache[MCP_GPIO] & mask) ? "hi" : "lo",
|
|
(mcp->cache[MCP_GPPU] & mask) ? "up" : " ");
|
|
/* NOTE: ignoring the irq-related registers */
|
|
seq_puts(s, "\n");
|
|
}
|
|
done:
|
|
mutex_unlock(&mcp->lock);
|
|
}
|
|
|
|
#else
|
|
#define mcp23s08_dbg_show NULL
|
|
#endif
|
|
|
|
/*----------------------------------------------------------------------*/
|
|
|
|
static int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev,
|
|
void *data, unsigned addr, unsigned type,
|
|
struct mcp23s08_platform_data *pdata, int cs)
|
|
{
|
|
int status, ret;
|
|
bool mirror = false;
|
|
|
|
mutex_init(&mcp->lock);
|
|
|
|
mcp->dev = dev;
|
|
mcp->addr = addr;
|
|
mcp->irq_active_high = false;
|
|
|
|
mcp->chip.direction_input = mcp23s08_direction_input;
|
|
mcp->chip.get = mcp23s08_get;
|
|
mcp->chip.direction_output = mcp23s08_direction_output;
|
|
mcp->chip.set = mcp23s08_set;
|
|
mcp->chip.dbg_show = mcp23s08_dbg_show;
|
|
#ifdef CONFIG_OF_GPIO
|
|
mcp->chip.of_gpio_n_cells = 2;
|
|
mcp->chip.of_node = dev->of_node;
|
|
#endif
|
|
|
|
switch (type) {
|
|
#ifdef CONFIG_SPI_MASTER
|
|
case MCP_TYPE_S08:
|
|
mcp->regmap = devm_regmap_init(dev, &mcp23sxx_spi_regmap, mcp,
|
|
&mcp23x08_regmap);
|
|
mcp->reg_shift = 0;
|
|
mcp->chip.ngpio = 8;
|
|
mcp->chip.label = "mcp23s08";
|
|
break;
|
|
|
|
case MCP_TYPE_S17:
|
|
mcp->regmap = devm_regmap_init(dev, &mcp23sxx_spi_regmap, mcp,
|
|
&mcp23x17_regmap);
|
|
mcp->reg_shift = 1;
|
|
mcp->chip.ngpio = 16;
|
|
mcp->chip.label = "mcp23s17";
|
|
break;
|
|
|
|
case MCP_TYPE_S18:
|
|
mcp->regmap = devm_regmap_init(dev, &mcp23sxx_spi_regmap, mcp,
|
|
&mcp23x17_regmap);
|
|
mcp->reg_shift = 1;
|
|
mcp->chip.ngpio = 16;
|
|
mcp->chip.label = "mcp23s18";
|
|
break;
|
|
#endif /* CONFIG_SPI_MASTER */
|
|
|
|
#if IS_ENABLED(CONFIG_I2C)
|
|
case MCP_TYPE_008:
|
|
mcp->regmap = devm_regmap_init_i2c(data, &mcp23x08_regmap);
|
|
mcp->reg_shift = 0;
|
|
mcp->chip.ngpio = 8;
|
|
mcp->chip.label = "mcp23008";
|
|
break;
|
|
|
|
case MCP_TYPE_017:
|
|
mcp->regmap = devm_regmap_init_i2c(data, &mcp23x17_regmap);
|
|
mcp->reg_shift = 1;
|
|
mcp->chip.ngpio = 16;
|
|
mcp->chip.label = "mcp23017";
|
|
break;
|
|
#endif /* CONFIG_I2C */
|
|
|
|
default:
|
|
dev_err(dev, "invalid device type (%d)\n", type);
|
|
return -EINVAL;
|
|
}
|
|
|
|
if (IS_ERR(mcp->regmap))
|
|
return PTR_ERR(mcp->regmap);
|
|
|
|
mcp->chip.base = pdata->base;
|
|
mcp->chip.can_sleep = true;
|
|
mcp->chip.parent = dev;
|
|
mcp->chip.owner = THIS_MODULE;
|
|
|
|
/* verify MCP_IOCON.SEQOP = 0, so sequential reads work,
|
|
* and MCP_IOCON.HAEN = 1, so we work with all chips.
|
|
*/
|
|
|
|
ret = mcp_read(mcp, MCP_IOCON, &status);
|
|
if (ret < 0)
|
|
goto fail;
|
|
|
|
mcp->irq_controller = pdata->irq_controller;
|
|
if (mcp->irq && mcp->irq_controller) {
|
|
mcp->irq_active_high =
|
|
of_property_read_bool(mcp->chip.parent->of_node,
|
|
"microchip,irq-active-high");
|
|
|
|
mirror = pdata->mirror;
|
|
}
|
|
|
|
if ((status & IOCON_SEQOP) || !(status & IOCON_HAEN) || mirror ||
|
|
mcp->irq_active_high) {
|
|
/* mcp23s17 has IOCON twice, make sure they are in sync */
|
|
status &= ~(IOCON_SEQOP | (IOCON_SEQOP << 8));
|
|
status |= IOCON_HAEN | (IOCON_HAEN << 8);
|
|
if (mcp->irq_active_high)
|
|
status |= IOCON_INTPOL | (IOCON_INTPOL << 8);
|
|
else
|
|
status &= ~(IOCON_INTPOL | (IOCON_INTPOL << 8));
|
|
|
|
if (mirror)
|
|
status |= IOCON_MIRROR | (IOCON_MIRROR << 8);
|
|
|
|
if (type == MCP_TYPE_S18)
|
|
status |= IOCON_INTCC | (IOCON_INTCC << 8);
|
|
|
|
ret = mcp_write(mcp, MCP_IOCON, status);
|
|
if (ret < 0)
|
|
goto fail;
|
|
}
|
|
|
|
/* configure ~100K pullups */
|
|
ret = mcp_write(mcp, MCP_GPPU, pdata->chip[cs].pullups);
|
|
if (ret < 0)
|
|
goto fail;
|
|
|
|
ret = mcp_update_cache(mcp);
|
|
if (ret < 0)
|
|
goto fail;
|
|
|
|
/* disable inverter on input */
|
|
if (mcp->cache[MCP_IPOL] != 0) {
|
|
mcp->cache[MCP_IPOL] = 0;
|
|
ret = mcp_write(mcp, MCP_IPOL, 0);
|
|
if (ret < 0)
|
|
goto fail;
|
|
}
|
|
|
|
/* disable irqs */
|
|
if (mcp->cache[MCP_GPINTEN] != 0) {
|
|
mcp->cache[MCP_GPINTEN] = 0;
|
|
ret = mcp_write(mcp, MCP_GPINTEN, 0);
|
|
if (ret < 0)
|
|
goto fail;
|
|
}
|
|
|
|
ret = gpiochip_add_data(&mcp->chip, mcp);
|
|
if (ret < 0)
|
|
goto fail;
|
|
|
|
if (mcp->irq && mcp->irq_controller) {
|
|
ret = mcp23s08_irq_setup(mcp);
|
|
if (ret)
|
|
goto fail;
|
|
}
|
|
fail:
|
|
if (ret < 0)
|
|
dev_dbg(dev, "can't setup chip %d, --> %d\n", addr, ret);
|
|
return ret;
|
|
}
|
|
|
|
/*----------------------------------------------------------------------*/
|
|
|
|
#ifdef CONFIG_OF
|
|
#ifdef CONFIG_SPI_MASTER
|
|
static const struct of_device_id mcp23s08_spi_of_match[] = {
|
|
{
|
|
.compatible = "microchip,mcp23s08",
|
|
.data = (void *) MCP_TYPE_S08,
|
|
},
|
|
{
|
|
.compatible = "microchip,mcp23s17",
|
|
.data = (void *) MCP_TYPE_S17,
|
|
},
|
|
{
|
|
.compatible = "microchip,mcp23s18",
|
|
.data = (void *) MCP_TYPE_S18,
|
|
},
|
|
/* NOTE: The use of the mcp prefix is deprecated and will be removed. */
|
|
{
|
|
.compatible = "mcp,mcp23s08",
|
|
.data = (void *) MCP_TYPE_S08,
|
|
},
|
|
{
|
|
.compatible = "mcp,mcp23s17",
|
|
.data = (void *) MCP_TYPE_S17,
|
|
},
|
|
{ },
|
|
};
|
|
MODULE_DEVICE_TABLE(of, mcp23s08_spi_of_match);
|
|
#endif
|
|
|
|
#if IS_ENABLED(CONFIG_I2C)
|
|
static const struct of_device_id mcp23s08_i2c_of_match[] = {
|
|
{
|
|
.compatible = "microchip,mcp23008",
|
|
.data = (void *) MCP_TYPE_008,
|
|
},
|
|
{
|
|
.compatible = "microchip,mcp23017",
|
|
.data = (void *) MCP_TYPE_017,
|
|
},
|
|
/* NOTE: The use of the mcp prefix is deprecated and will be removed. */
|
|
{
|
|
.compatible = "mcp,mcp23008",
|
|
.data = (void *) MCP_TYPE_008,
|
|
},
|
|
{
|
|
.compatible = "mcp,mcp23017",
|
|
.data = (void *) MCP_TYPE_017,
|
|
},
|
|
{ },
|
|
};
|
|
MODULE_DEVICE_TABLE(of, mcp23s08_i2c_of_match);
|
|
#endif
|
|
#endif /* CONFIG_OF */
|
|
|
|
|
|
#if IS_ENABLED(CONFIG_I2C)
|
|
|
|
static int mcp230xx_probe(struct i2c_client *client,
|
|
const struct i2c_device_id *id)
|
|
{
|
|
struct mcp23s08_platform_data *pdata, local_pdata;
|
|
struct mcp23s08 *mcp;
|
|
int status;
|
|
const struct of_device_id *match;
|
|
|
|
match = of_match_device(of_match_ptr(mcp23s08_i2c_of_match),
|
|
&client->dev);
|
|
if (match) {
|
|
pdata = &local_pdata;
|
|
pdata->base = -1;
|
|
pdata->chip[0].pullups = 0;
|
|
pdata->irq_controller = of_property_read_bool(
|
|
client->dev.of_node,
|
|
"interrupt-controller");
|
|
pdata->mirror = of_property_read_bool(client->dev.of_node,
|
|
"microchip,irq-mirror");
|
|
client->irq = irq_of_parse_and_map(client->dev.of_node, 0);
|
|
} else {
|
|
pdata = dev_get_platdata(&client->dev);
|
|
if (!pdata) {
|
|
pdata = devm_kzalloc(&client->dev,
|
|
sizeof(struct mcp23s08_platform_data),
|
|
GFP_KERNEL);
|
|
if (!pdata)
|
|
return -ENOMEM;
|
|
pdata->base = -1;
|
|
}
|
|
}
|
|
|
|
mcp = kzalloc(sizeof(*mcp), GFP_KERNEL);
|
|
if (!mcp)
|
|
return -ENOMEM;
|
|
|
|
mcp->irq = client->irq;
|
|
status = mcp23s08_probe_one(mcp, &client->dev, client, client->addr,
|
|
id->driver_data, pdata, 0);
|
|
if (status)
|
|
goto fail;
|
|
|
|
i2c_set_clientdata(client, mcp);
|
|
|
|
return 0;
|
|
|
|
fail:
|
|
kfree(mcp);
|
|
|
|
return status;
|
|
}
|
|
|
|
static int mcp230xx_remove(struct i2c_client *client)
|
|
{
|
|
struct mcp23s08 *mcp = i2c_get_clientdata(client);
|
|
|
|
gpiochip_remove(&mcp->chip);
|
|
kfree(mcp);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct i2c_device_id mcp230xx_id[] = {
|
|
{ "mcp23008", MCP_TYPE_008 },
|
|
{ "mcp23017", MCP_TYPE_017 },
|
|
{ },
|
|
};
|
|
MODULE_DEVICE_TABLE(i2c, mcp230xx_id);
|
|
|
|
static struct i2c_driver mcp230xx_driver = {
|
|
.driver = {
|
|
.name = "mcp230xx",
|
|
.of_match_table = of_match_ptr(mcp23s08_i2c_of_match),
|
|
},
|
|
.probe = mcp230xx_probe,
|
|
.remove = mcp230xx_remove,
|
|
.id_table = mcp230xx_id,
|
|
};
|
|
|
|
static int __init mcp23s08_i2c_init(void)
|
|
{
|
|
return i2c_add_driver(&mcp230xx_driver);
|
|
}
|
|
|
|
static void mcp23s08_i2c_exit(void)
|
|
{
|
|
i2c_del_driver(&mcp230xx_driver);
|
|
}
|
|
|
|
#else
|
|
|
|
static int __init mcp23s08_i2c_init(void) { return 0; }
|
|
static void mcp23s08_i2c_exit(void) { }
|
|
|
|
#endif /* CONFIG_I2C */
|
|
|
|
/*----------------------------------------------------------------------*/
|
|
|
|
#ifdef CONFIG_SPI_MASTER
|
|
|
|
static int mcp23s08_probe(struct spi_device *spi)
|
|
{
|
|
struct mcp23s08_platform_data *pdata, local_pdata;
|
|
unsigned addr;
|
|
int chips = 0;
|
|
struct mcp23s08_driver_data *data;
|
|
int status, type;
|
|
unsigned ngpio = 0;
|
|
const struct of_device_id *match;
|
|
u32 spi_present_mask = 0;
|
|
|
|
match = of_match_device(of_match_ptr(mcp23s08_spi_of_match), &spi->dev);
|
|
if (match) {
|
|
type = (int)(uintptr_t)match->data;
|
|
status = of_property_read_u32(spi->dev.of_node,
|
|
"microchip,spi-present-mask", &spi_present_mask);
|
|
if (status) {
|
|
status = of_property_read_u32(spi->dev.of_node,
|
|
"mcp,spi-present-mask", &spi_present_mask);
|
|
if (status) {
|
|
dev_err(&spi->dev,
|
|
"DT has no spi-present-mask\n");
|
|
return -ENODEV;
|
|
}
|
|
}
|
|
if ((spi_present_mask <= 0) || (spi_present_mask >= 256)) {
|
|
dev_err(&spi->dev, "invalid spi-present-mask\n");
|
|
return -ENODEV;
|
|
}
|
|
|
|
pdata = &local_pdata;
|
|
pdata->base = -1;
|
|
for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) {
|
|
pdata->chip[addr].pullups = 0;
|
|
if (spi_present_mask & (1 << addr))
|
|
chips++;
|
|
}
|
|
pdata->irq_controller = of_property_read_bool(
|
|
spi->dev.of_node,
|
|
"interrupt-controller");
|
|
pdata->mirror = of_property_read_bool(spi->dev.of_node,
|
|
"microchip,irq-mirror");
|
|
} else {
|
|
type = spi_get_device_id(spi)->driver_data;
|
|
pdata = dev_get_platdata(&spi->dev);
|
|
if (!pdata) {
|
|
pdata = devm_kzalloc(&spi->dev,
|
|
sizeof(struct mcp23s08_platform_data),
|
|
GFP_KERNEL);
|
|
pdata->base = -1;
|
|
}
|
|
|
|
for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) {
|
|
if (!pdata->chip[addr].is_present)
|
|
continue;
|
|
chips++;
|
|
if ((type == MCP_TYPE_S08) && (addr > 3)) {
|
|
dev_err(&spi->dev,
|
|
"mcp23s08 only supports address 0..3\n");
|
|
return -EINVAL;
|
|
}
|
|
spi_present_mask |= 1 << addr;
|
|
}
|
|
}
|
|
|
|
if (!chips)
|
|
return -ENODEV;
|
|
|
|
data = devm_kzalloc(&spi->dev,
|
|
sizeof(*data) + chips * sizeof(struct mcp23s08),
|
|
GFP_KERNEL);
|
|
if (!data)
|
|
return -ENOMEM;
|
|
|
|
spi_set_drvdata(spi, data);
|
|
|
|
spi->irq = irq_of_parse_and_map(spi->dev.of_node, 0);
|
|
|
|
for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) {
|
|
if (!(spi_present_mask & (1 << addr)))
|
|
continue;
|
|
chips--;
|
|
data->mcp[addr] = &data->chip[chips];
|
|
data->mcp[addr]->irq = spi->irq;
|
|
status = mcp23s08_probe_one(data->mcp[addr], &spi->dev, spi,
|
|
0x40 | (addr << 1), type, pdata,
|
|
addr);
|
|
if (status < 0)
|
|
goto fail;
|
|
|
|
if (pdata->base != -1)
|
|
pdata->base += data->mcp[addr]->chip.ngpio;
|
|
ngpio += data->mcp[addr]->chip.ngpio;
|
|
}
|
|
data->ngpio = ngpio;
|
|
|
|
/* NOTE: these chips have a relatively sane IRQ framework, with
|
|
* per-signal masking and level/edge triggering. It's not yet
|
|
* handled here...
|
|
*/
|
|
|
|
return 0;
|
|
|
|
fail:
|
|
for (addr = 0; addr < ARRAY_SIZE(data->mcp); addr++) {
|
|
|
|
if (!data->mcp[addr])
|
|
continue;
|
|
gpiochip_remove(&data->mcp[addr]->chip);
|
|
}
|
|
return status;
|
|
}
|
|
|
|
static int mcp23s08_remove(struct spi_device *spi)
|
|
{
|
|
struct mcp23s08_driver_data *data = spi_get_drvdata(spi);
|
|
unsigned addr;
|
|
|
|
for (addr = 0; addr < ARRAY_SIZE(data->mcp); addr++) {
|
|
|
|
if (!data->mcp[addr])
|
|
continue;
|
|
|
|
gpiochip_remove(&data->mcp[addr]->chip);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct spi_device_id mcp23s08_ids[] = {
|
|
{ "mcp23s08", MCP_TYPE_S08 },
|
|
{ "mcp23s17", MCP_TYPE_S17 },
|
|
{ "mcp23s18", MCP_TYPE_S18 },
|
|
{ },
|
|
};
|
|
MODULE_DEVICE_TABLE(spi, mcp23s08_ids);
|
|
|
|
static struct spi_driver mcp23s08_driver = {
|
|
.probe = mcp23s08_probe,
|
|
.remove = mcp23s08_remove,
|
|
.id_table = mcp23s08_ids,
|
|
.driver = {
|
|
.name = "mcp23s08",
|
|
.of_match_table = of_match_ptr(mcp23s08_spi_of_match),
|
|
},
|
|
};
|
|
|
|
static int __init mcp23s08_spi_init(void)
|
|
{
|
|
return spi_register_driver(&mcp23s08_driver);
|
|
}
|
|
|
|
static void mcp23s08_spi_exit(void)
|
|
{
|
|
spi_unregister_driver(&mcp23s08_driver);
|
|
}
|
|
|
|
#else
|
|
|
|
static int __init mcp23s08_spi_init(void) { return 0; }
|
|
static void mcp23s08_spi_exit(void) { }
|
|
|
|
#endif /* CONFIG_SPI_MASTER */
|
|
|
|
/*----------------------------------------------------------------------*/
|
|
|
|
static int __init mcp23s08_init(void)
|
|
{
|
|
int ret;
|
|
|
|
ret = mcp23s08_spi_init();
|
|
if (ret)
|
|
goto spi_fail;
|
|
|
|
ret = mcp23s08_i2c_init();
|
|
if (ret)
|
|
goto i2c_fail;
|
|
|
|
return 0;
|
|
|
|
i2c_fail:
|
|
mcp23s08_spi_exit();
|
|
spi_fail:
|
|
return ret;
|
|
}
|
|
/* register after spi/i2c postcore initcall and before
|
|
* subsys initcalls that may rely on these GPIOs
|
|
*/
|
|
subsys_initcall(mcp23s08_init);
|
|
|
|
static void __exit mcp23s08_exit(void)
|
|
{
|
|
mcp23s08_spi_exit();
|
|
mcp23s08_i2c_exit();
|
|
}
|
|
module_exit(mcp23s08_exit);
|
|
|
|
MODULE_LICENSE("GPL");
|