451 строка
12 KiB
C
451 строка
12 KiB
C
/*
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SMBus driver for nVidia nForce2 MCP
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Added nForce3 Pro 150 Thomas Leibold <thomas@plx.com>,
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Ported to 2.5 Patrick Dreker <patrick@dreker.de>,
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Copyright (c) 2003 Hans-Frieder Vogt <hfvogt@arcor.de>,
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Based on
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SMBus 2.0 driver for AMD-8111 IO-Hub
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Copyright (c) 2002 Vojtech Pavlik
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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*/
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/*
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SUPPORTED DEVICES PCI ID
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nForce2 MCP 0064
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nForce2 Ultra 400 MCP 0084
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nForce3 Pro150 MCP 00D4
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nForce3 250Gb MCP 00E4
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nForce4 MCP 0052
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nForce4 MCP-04 0034
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nForce MCP51 0264
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nForce MCP55 0368
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nForce MCP61 03EB
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nForce MCP65 0446
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nForce MCP67 0542
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nForce MCP73 07D8
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nForce MCP78S 0752
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nForce MCP79 0AA2
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This driver supports the 2 SMBuses that are included in the MCP of the
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nForce2/3/4/5xx chipsets.
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*/
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/* Note: we assume there can only be one nForce2, with two SMBus interfaces */
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/kernel.h>
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#include <linux/stddef.h>
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#include <linux/ioport.h>
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#include <linux/i2c.h>
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#include <linux/delay.h>
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#include <linux/dmi.h>
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#include <linux/acpi.h>
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#include <linux/slab.h>
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#include <linux/io.h>
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Hans-Frieder Vogt <hfvogt@gmx.net>");
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MODULE_DESCRIPTION("nForce2/3/4/5xx SMBus driver");
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struct nforce2_smbus {
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struct i2c_adapter adapter;
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int base;
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int size;
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int blockops;
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int can_abort;
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};
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/*
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* nVidia nForce2 SMBus control register definitions
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* (Newer incarnations use standard BARs 4 and 5 instead)
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*/
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#define NFORCE_PCI_SMB1 0x50
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#define NFORCE_PCI_SMB2 0x54
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/*
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* ACPI 2.0 chapter 13 SMBus 2.0 EC register model
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*/
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#define NVIDIA_SMB_PRTCL (smbus->base + 0x00) /* protocol, PEC */
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#define NVIDIA_SMB_STS (smbus->base + 0x01) /* status */
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#define NVIDIA_SMB_ADDR (smbus->base + 0x02) /* address */
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#define NVIDIA_SMB_CMD (smbus->base + 0x03) /* command */
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#define NVIDIA_SMB_DATA (smbus->base + 0x04) /* 32 data registers */
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#define NVIDIA_SMB_BCNT (smbus->base + 0x24) /* number of data
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bytes */
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#define NVIDIA_SMB_STATUS_ABRT (smbus->base + 0x3c) /* register used to
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check the status of
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the abort command */
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#define NVIDIA_SMB_CTRL (smbus->base + 0x3e) /* control register */
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#define NVIDIA_SMB_STATUS_ABRT_STS 0x01 /* Bit to notify that
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abort succeeded */
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#define NVIDIA_SMB_CTRL_ABORT 0x20
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#define NVIDIA_SMB_STS_DONE 0x80
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#define NVIDIA_SMB_STS_ALRM 0x40
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#define NVIDIA_SMB_STS_RES 0x20
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#define NVIDIA_SMB_STS_STATUS 0x1f
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#define NVIDIA_SMB_PRTCL_WRITE 0x00
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#define NVIDIA_SMB_PRTCL_READ 0x01
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#define NVIDIA_SMB_PRTCL_QUICK 0x02
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#define NVIDIA_SMB_PRTCL_BYTE 0x04
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#define NVIDIA_SMB_PRTCL_BYTE_DATA 0x06
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#define NVIDIA_SMB_PRTCL_WORD_DATA 0x08
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#define NVIDIA_SMB_PRTCL_BLOCK_DATA 0x0a
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#define NVIDIA_SMB_PRTCL_PEC 0x80
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/* Misc definitions */
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#define MAX_TIMEOUT 100
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/* We disable the second SMBus channel on these boards */
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static const struct dmi_system_id nforce2_dmi_blacklist2[] = {
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{
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.ident = "DFI Lanparty NF4 Expert",
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.matches = {
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DMI_MATCH(DMI_BOARD_VENDOR, "DFI Corp,LTD"),
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DMI_MATCH(DMI_BOARD_NAME, "LP UT NF4 Expert"),
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},
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},
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{ }
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};
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static struct pci_driver nforce2_driver;
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/* For multiplexing support, we need a global reference to the 1st
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SMBus channel */
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#if IS_ENABLED(CONFIG_I2C_NFORCE2_S4985)
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struct i2c_adapter *nforce2_smbus;
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EXPORT_SYMBOL_GPL(nforce2_smbus);
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static void nforce2_set_reference(struct i2c_adapter *adap)
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{
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nforce2_smbus = adap;
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}
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#else
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static inline void nforce2_set_reference(struct i2c_adapter *adap) { }
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#endif
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static void nforce2_abort(struct i2c_adapter *adap)
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{
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struct nforce2_smbus *smbus = adap->algo_data;
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int timeout = 0;
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unsigned char temp;
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dev_dbg(&adap->dev, "Aborting current transaction\n");
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outb_p(NVIDIA_SMB_CTRL_ABORT, NVIDIA_SMB_CTRL);
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do {
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msleep(1);
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temp = inb_p(NVIDIA_SMB_STATUS_ABRT);
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} while (!(temp & NVIDIA_SMB_STATUS_ABRT_STS) &&
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(timeout++ < MAX_TIMEOUT));
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if (!(temp & NVIDIA_SMB_STATUS_ABRT_STS))
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dev_err(&adap->dev, "Can't reset the smbus\n");
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outb_p(NVIDIA_SMB_STATUS_ABRT_STS, NVIDIA_SMB_STATUS_ABRT);
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}
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static int nforce2_check_status(struct i2c_adapter *adap)
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{
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struct nforce2_smbus *smbus = adap->algo_data;
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int timeout = 0;
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unsigned char temp;
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do {
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msleep(1);
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temp = inb_p(NVIDIA_SMB_STS);
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} while ((!temp) && (timeout++ < MAX_TIMEOUT));
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if (timeout > MAX_TIMEOUT) {
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dev_dbg(&adap->dev, "SMBus Timeout!\n");
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if (smbus->can_abort)
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nforce2_abort(adap);
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return -ETIMEDOUT;
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}
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if (!(temp & NVIDIA_SMB_STS_DONE) || (temp & NVIDIA_SMB_STS_STATUS)) {
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dev_dbg(&adap->dev, "Transaction failed (0x%02x)!\n", temp);
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return -EIO;
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}
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return 0;
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}
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/* Return negative errno on error */
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static s32 nforce2_access(struct i2c_adapter *adap, u16 addr,
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unsigned short flags, char read_write,
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u8 command, int size, union i2c_smbus_data *data)
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{
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struct nforce2_smbus *smbus = adap->algo_data;
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unsigned char protocol, pec;
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u8 len;
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int i, status;
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protocol = (read_write == I2C_SMBUS_READ) ? NVIDIA_SMB_PRTCL_READ :
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NVIDIA_SMB_PRTCL_WRITE;
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pec = (flags & I2C_CLIENT_PEC) ? NVIDIA_SMB_PRTCL_PEC : 0;
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switch (size) {
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case I2C_SMBUS_QUICK:
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protocol |= NVIDIA_SMB_PRTCL_QUICK;
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read_write = I2C_SMBUS_WRITE;
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break;
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case I2C_SMBUS_BYTE:
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if (read_write == I2C_SMBUS_WRITE)
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outb_p(command, NVIDIA_SMB_CMD);
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protocol |= NVIDIA_SMB_PRTCL_BYTE;
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break;
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case I2C_SMBUS_BYTE_DATA:
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outb_p(command, NVIDIA_SMB_CMD);
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if (read_write == I2C_SMBUS_WRITE)
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outb_p(data->byte, NVIDIA_SMB_DATA);
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protocol |= NVIDIA_SMB_PRTCL_BYTE_DATA;
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break;
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case I2C_SMBUS_WORD_DATA:
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outb_p(command, NVIDIA_SMB_CMD);
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if (read_write == I2C_SMBUS_WRITE) {
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outb_p(data->word, NVIDIA_SMB_DATA);
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outb_p(data->word >> 8, NVIDIA_SMB_DATA + 1);
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}
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protocol |= NVIDIA_SMB_PRTCL_WORD_DATA | pec;
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break;
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case I2C_SMBUS_BLOCK_DATA:
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outb_p(command, NVIDIA_SMB_CMD);
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if (read_write == I2C_SMBUS_WRITE) {
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len = data->block[0];
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if ((len == 0) || (len > I2C_SMBUS_BLOCK_MAX)) {
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dev_err(&adap->dev,
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"Transaction failed (requested block size: %d)\n",
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len);
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return -EINVAL;
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}
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outb_p(len, NVIDIA_SMB_BCNT);
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for (i = 0; i < I2C_SMBUS_BLOCK_MAX; i++)
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outb_p(data->block[i + 1],
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NVIDIA_SMB_DATA + i);
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}
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protocol |= NVIDIA_SMB_PRTCL_BLOCK_DATA | pec;
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break;
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default:
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dev_err(&adap->dev, "Unsupported transaction %d\n", size);
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return -EOPNOTSUPP;
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}
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outb_p((addr & 0x7f) << 1, NVIDIA_SMB_ADDR);
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outb_p(protocol, NVIDIA_SMB_PRTCL);
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status = nforce2_check_status(adap);
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if (status)
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return status;
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if (read_write == I2C_SMBUS_WRITE)
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return 0;
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switch (size) {
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case I2C_SMBUS_BYTE:
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case I2C_SMBUS_BYTE_DATA:
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data->byte = inb_p(NVIDIA_SMB_DATA);
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break;
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case I2C_SMBUS_WORD_DATA:
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data->word = inb_p(NVIDIA_SMB_DATA) |
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(inb_p(NVIDIA_SMB_DATA + 1) << 8);
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break;
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case I2C_SMBUS_BLOCK_DATA:
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len = inb_p(NVIDIA_SMB_BCNT);
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if ((len <= 0) || (len > I2C_SMBUS_BLOCK_MAX)) {
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dev_err(&adap->dev,
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"Transaction failed (received block size: 0x%02x)\n",
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len);
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return -EPROTO;
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}
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for (i = 0; i < len; i++)
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data->block[i + 1] = inb_p(NVIDIA_SMB_DATA + i);
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data->block[0] = len;
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break;
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}
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return 0;
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}
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static u32 nforce2_func(struct i2c_adapter *adapter)
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{
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/* other functionality might be possible, but is not tested */
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return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
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I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
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I2C_FUNC_SMBUS_PEC |
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(((struct nforce2_smbus *)adapter->algo_data)->blockops ?
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I2C_FUNC_SMBUS_BLOCK_DATA : 0);
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}
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static const struct i2c_algorithm smbus_algorithm = {
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.smbus_xfer = nforce2_access,
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.functionality = nforce2_func,
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};
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static const struct pci_device_id nforce2_ids[] = {
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{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS) },
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{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_SMBUS) },
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{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3_SMBUS) },
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{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SMBUS) },
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{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE4_SMBUS) },
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{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SMBUS) },
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{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS) },
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{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS) },
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{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SMBUS) },
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{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP65_SMBUS) },
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{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP67_SMBUS) },
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{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP73_SMBUS) },
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{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP78S_SMBUS) },
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{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP79_SMBUS) },
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{ 0 }
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};
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MODULE_DEVICE_TABLE(pci, nforce2_ids);
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static int nforce2_probe_smb(struct pci_dev *dev, int bar, int alt_reg,
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struct nforce2_smbus *smbus, const char *name)
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{
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int error;
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smbus->base = pci_resource_start(dev, bar);
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if (smbus->base) {
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smbus->size = pci_resource_len(dev, bar);
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} else {
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/* Older incarnations of the device used non-standard BARs */
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u16 iobase;
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if (pci_read_config_word(dev, alt_reg, &iobase)
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!= PCIBIOS_SUCCESSFUL) {
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dev_err(&dev->dev, "Error reading PCI config for %s\n",
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name);
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return -EIO;
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}
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smbus->base = iobase & PCI_BASE_ADDRESS_IO_MASK;
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smbus->size = 64;
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}
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error = acpi_check_region(smbus->base, smbus->size,
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nforce2_driver.name);
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if (error)
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return error;
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if (!request_region(smbus->base, smbus->size, nforce2_driver.name)) {
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dev_err(&smbus->adapter.dev, "Error requesting region %02x .. %02X for %s\n",
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smbus->base, smbus->base+smbus->size-1, name);
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return -EBUSY;
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}
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smbus->adapter.owner = THIS_MODULE;
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smbus->adapter.class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
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smbus->adapter.algo = &smbus_algorithm;
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smbus->adapter.algo_data = smbus;
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smbus->adapter.dev.parent = &dev->dev;
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snprintf(smbus->adapter.name, sizeof(smbus->adapter.name),
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"SMBus nForce2 adapter at %04x", smbus->base);
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error = i2c_add_adapter(&smbus->adapter);
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if (error) {
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release_region(smbus->base, smbus->size);
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return error;
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}
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dev_info(&smbus->adapter.dev, "nForce2 SMBus adapter at %#x\n",
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smbus->base);
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return 0;
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}
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static int nforce2_probe(struct pci_dev *dev, const struct pci_device_id *id)
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{
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struct nforce2_smbus *smbuses;
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int res1, res2;
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/* we support 2 SMBus adapters */
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smbuses = kcalloc(2, sizeof(struct nforce2_smbus), GFP_KERNEL);
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if (!smbuses)
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return -ENOMEM;
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pci_set_drvdata(dev, smbuses);
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switch (dev->device) {
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case PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS:
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case PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS:
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case PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS:
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smbuses[0].blockops = 1;
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smbuses[1].blockops = 1;
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smbuses[0].can_abort = 1;
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smbuses[1].can_abort = 1;
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}
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/* SMBus adapter 1 */
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res1 = nforce2_probe_smb(dev, 4, NFORCE_PCI_SMB1, &smbuses[0], "SMB1");
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if (res1 < 0)
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smbuses[0].base = 0; /* to have a check value */
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/* SMBus adapter 2 */
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if (dmi_check_system(nforce2_dmi_blacklist2)) {
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dev_err(&dev->dev, "Disabling SMB2 for safety reasons.\n");
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res2 = -EPERM;
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smbuses[1].base = 0;
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} else {
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res2 = nforce2_probe_smb(dev, 5, NFORCE_PCI_SMB2, &smbuses[1],
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"SMB2");
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if (res2 < 0)
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smbuses[1].base = 0; /* to have a check value */
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}
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if ((res1 < 0) && (res2 < 0)) {
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/* we did not find even one of the SMBuses, so we give up */
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kfree(smbuses);
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return -ENODEV;
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}
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nforce2_set_reference(&smbuses[0].adapter);
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return 0;
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}
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static void nforce2_remove(struct pci_dev *dev)
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{
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struct nforce2_smbus *smbuses = pci_get_drvdata(dev);
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nforce2_set_reference(NULL);
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if (smbuses[0].base) {
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i2c_del_adapter(&smbuses[0].adapter);
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release_region(smbuses[0].base, smbuses[0].size);
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}
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if (smbuses[1].base) {
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i2c_del_adapter(&smbuses[1].adapter);
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release_region(smbuses[1].base, smbuses[1].size);
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}
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kfree(smbuses);
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}
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static struct pci_driver nforce2_driver = {
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.name = "nForce2_smbus",
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.id_table = nforce2_ids,
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.probe = nforce2_probe,
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.remove = nforce2_remove,
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};
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module_pci_driver(nforce2_driver);
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