236 строки
6.1 KiB
C
236 строки
6.1 KiB
C
/*
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* Fault injection for both 32 and 64bit guests.
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*
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* Copyright (C) 2012,2013 - ARM Ltd
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* Author: Marc Zyngier <marc.zyngier@arm.com>
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*
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* Based on arch/arm/kvm/emulate.c
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* Copyright (C) 2012 - Virtual Open Systems and Columbia University
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* Author: Christoffer Dall <c.dall@virtualopensystems.com>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/kvm_host.h>
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#include <asm/kvm_emulate.h>
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#include <asm/esr.h>
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#define PSTATE_FAULT_BITS_64 (PSR_MODE_EL1h | PSR_A_BIT | PSR_F_BIT | \
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PSR_I_BIT | PSR_D_BIT)
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#define CURRENT_EL_SP_EL0_VECTOR 0x0
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#define CURRENT_EL_SP_ELx_VECTOR 0x200
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#define LOWER_EL_AArch64_VECTOR 0x400
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#define LOWER_EL_AArch32_VECTOR 0x600
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static void prepare_fault32(struct kvm_vcpu *vcpu, u32 mode, u32 vect_offset)
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{
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unsigned long cpsr;
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unsigned long new_spsr_value = *vcpu_cpsr(vcpu);
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bool is_thumb = (new_spsr_value & COMPAT_PSR_T_BIT);
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u32 return_offset = (is_thumb) ? 4 : 0;
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u32 sctlr = vcpu_cp15(vcpu, c1_SCTLR);
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cpsr = mode | COMPAT_PSR_I_BIT;
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if (sctlr & (1 << 30))
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cpsr |= COMPAT_PSR_T_BIT;
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if (sctlr & (1 << 25))
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cpsr |= COMPAT_PSR_E_BIT;
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*vcpu_cpsr(vcpu) = cpsr;
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/* Note: These now point to the banked copies */
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*vcpu_spsr(vcpu) = new_spsr_value;
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*vcpu_reg32(vcpu, 14) = *vcpu_pc(vcpu) + return_offset;
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/* Branch to exception vector */
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if (sctlr & (1 << 13))
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vect_offset += 0xffff0000;
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else /* always have security exceptions */
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vect_offset += vcpu_cp15(vcpu, c12_VBAR);
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*vcpu_pc(vcpu) = vect_offset;
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}
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static void inject_undef32(struct kvm_vcpu *vcpu)
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{
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prepare_fault32(vcpu, COMPAT_PSR_MODE_UND, 4);
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}
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/*
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* Modelled after TakeDataAbortException() and TakePrefetchAbortException
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* pseudocode.
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*/
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static void inject_abt32(struct kvm_vcpu *vcpu, bool is_pabt,
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unsigned long addr)
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{
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u32 vect_offset;
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u32 *far, *fsr;
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bool is_lpae;
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if (is_pabt) {
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vect_offset = 12;
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far = &vcpu_cp15(vcpu, c6_IFAR);
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fsr = &vcpu_cp15(vcpu, c5_IFSR);
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} else { /* !iabt */
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vect_offset = 16;
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far = &vcpu_cp15(vcpu, c6_DFAR);
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fsr = &vcpu_cp15(vcpu, c5_DFSR);
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}
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prepare_fault32(vcpu, COMPAT_PSR_MODE_ABT | COMPAT_PSR_A_BIT, vect_offset);
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*far = addr;
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/* Give the guest an IMPLEMENTATION DEFINED exception */
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is_lpae = (vcpu_cp15(vcpu, c2_TTBCR) >> 31);
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if (is_lpae)
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*fsr = 1 << 9 | 0x34;
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else
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*fsr = 0x14;
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}
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enum exception_type {
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except_type_sync = 0,
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except_type_irq = 0x80,
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except_type_fiq = 0x100,
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except_type_serror = 0x180,
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};
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static u64 get_except_vector(struct kvm_vcpu *vcpu, enum exception_type type)
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{
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u64 exc_offset;
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switch (*vcpu_cpsr(vcpu) & (PSR_MODE_MASK | PSR_MODE32_BIT)) {
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case PSR_MODE_EL1t:
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exc_offset = CURRENT_EL_SP_EL0_VECTOR;
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break;
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case PSR_MODE_EL1h:
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exc_offset = CURRENT_EL_SP_ELx_VECTOR;
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break;
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case PSR_MODE_EL0t:
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exc_offset = LOWER_EL_AArch64_VECTOR;
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break;
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default:
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exc_offset = LOWER_EL_AArch32_VECTOR;
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}
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return vcpu_sys_reg(vcpu, VBAR_EL1) + exc_offset + type;
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}
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static void inject_abt64(struct kvm_vcpu *vcpu, bool is_iabt, unsigned long addr)
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{
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unsigned long cpsr = *vcpu_cpsr(vcpu);
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bool is_aarch32;
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u32 esr = 0;
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is_aarch32 = vcpu_mode_is_32bit(vcpu);
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*vcpu_spsr(vcpu) = cpsr;
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*vcpu_elr_el1(vcpu) = *vcpu_pc(vcpu);
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*vcpu_pc(vcpu) = get_except_vector(vcpu, except_type_sync);
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*vcpu_cpsr(vcpu) = PSTATE_FAULT_BITS_64;
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vcpu_sys_reg(vcpu, FAR_EL1) = addr;
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/*
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* Build an {i,d}abort, depending on the level and the
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* instruction set. Report an external synchronous abort.
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*/
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if (kvm_vcpu_trap_il_is32bit(vcpu))
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esr |= ESR_ELx_IL;
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/*
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* Here, the guest runs in AArch64 mode when in EL1. If we get
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* an AArch32 fault, it means we managed to trap an EL0 fault.
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*/
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if (is_aarch32 || (cpsr & PSR_MODE_MASK) == PSR_MODE_EL0t)
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esr |= (ESR_ELx_EC_IABT_LOW << ESR_ELx_EC_SHIFT);
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else
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esr |= (ESR_ELx_EC_IABT_CUR << ESR_ELx_EC_SHIFT);
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if (!is_iabt)
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esr |= ESR_ELx_EC_DABT_LOW;
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vcpu_sys_reg(vcpu, ESR_EL1) = esr | ESR_ELx_FSC_EXTABT;
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}
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static void inject_undef64(struct kvm_vcpu *vcpu)
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{
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unsigned long cpsr = *vcpu_cpsr(vcpu);
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u32 esr = (ESR_ELx_EC_UNKNOWN << ESR_ELx_EC_SHIFT);
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*vcpu_spsr(vcpu) = cpsr;
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*vcpu_elr_el1(vcpu) = *vcpu_pc(vcpu);
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*vcpu_pc(vcpu) = get_except_vector(vcpu, except_type_sync);
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*vcpu_cpsr(vcpu) = PSTATE_FAULT_BITS_64;
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/*
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* Build an unknown exception, depending on the instruction
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* set.
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*/
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if (kvm_vcpu_trap_il_is32bit(vcpu))
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esr |= ESR_ELx_IL;
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vcpu_sys_reg(vcpu, ESR_EL1) = esr;
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}
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/**
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* kvm_inject_dabt - inject a data abort into the guest
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* @vcpu: The VCPU to receive the undefined exception
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* @addr: The address to report in the DFAR
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*
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* It is assumed that this code is called from the VCPU thread and that the
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* VCPU therefore is not currently executing guest code.
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*/
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void kvm_inject_dabt(struct kvm_vcpu *vcpu, unsigned long addr)
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{
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if (!(vcpu->arch.hcr_el2 & HCR_RW))
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inject_abt32(vcpu, false, addr);
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else
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inject_abt64(vcpu, false, addr);
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}
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/**
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* kvm_inject_pabt - inject a prefetch abort into the guest
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* @vcpu: The VCPU to receive the undefined exception
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* @addr: The address to report in the DFAR
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*
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* It is assumed that this code is called from the VCPU thread and that the
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* VCPU therefore is not currently executing guest code.
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*/
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void kvm_inject_pabt(struct kvm_vcpu *vcpu, unsigned long addr)
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{
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if (!(vcpu->arch.hcr_el2 & HCR_RW))
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inject_abt32(vcpu, true, addr);
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else
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inject_abt64(vcpu, true, addr);
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}
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/**
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* kvm_inject_undefined - inject an undefined instruction into the guest
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*
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* It is assumed that this code is called from the VCPU thread and that the
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* VCPU therefore is not currently executing guest code.
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*/
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void kvm_inject_undefined(struct kvm_vcpu *vcpu)
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{
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if (!(vcpu->arch.hcr_el2 & HCR_RW))
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inject_undef32(vcpu);
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else
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inject_undef64(vcpu);
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}
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