252 строки
6.5 KiB
C
252 строки
6.5 KiB
C
/*
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* Copyright (C) 2012 Freescale Semiconductor, Inc.
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*
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* The OPP code in function cpu0_set_target() is reused from
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* drivers/cpufreq/omap-cpufreq.c
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/clk.h>
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#include <linux/cpu.h>
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#include <linux/cpu_cooling.h>
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#include <linux/cpufreq.h>
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#include <linux/cpumask.h>
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#include <linux/err.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/pm_opp.h>
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#include <linux/platform_device.h>
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#include <linux/regulator/consumer.h>
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#include <linux/slab.h>
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#include <linux/thermal.h>
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static unsigned int transition_latency;
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static unsigned int voltage_tolerance; /* in percentage */
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static struct device *cpu_dev;
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static struct clk *cpu_clk;
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static struct regulator *cpu_reg;
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static struct cpufreq_frequency_table *freq_table;
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static struct thermal_cooling_device *cdev;
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static int cpu0_set_target(struct cpufreq_policy *policy, unsigned int index)
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{
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struct dev_pm_opp *opp;
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unsigned long volt = 0, volt_old = 0, tol = 0;
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unsigned int old_freq, new_freq;
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long freq_Hz, freq_exact;
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int ret;
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freq_Hz = clk_round_rate(cpu_clk, freq_table[index].frequency * 1000);
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if (freq_Hz <= 0)
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freq_Hz = freq_table[index].frequency * 1000;
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freq_exact = freq_Hz;
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new_freq = freq_Hz / 1000;
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old_freq = clk_get_rate(cpu_clk) / 1000;
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if (!IS_ERR(cpu_reg)) {
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rcu_read_lock();
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opp = dev_pm_opp_find_freq_ceil(cpu_dev, &freq_Hz);
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if (IS_ERR(opp)) {
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rcu_read_unlock();
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pr_err("failed to find OPP for %ld\n", freq_Hz);
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return PTR_ERR(opp);
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}
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volt = dev_pm_opp_get_voltage(opp);
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rcu_read_unlock();
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tol = volt * voltage_tolerance / 100;
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volt_old = regulator_get_voltage(cpu_reg);
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}
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pr_debug("%u MHz, %ld mV --> %u MHz, %ld mV\n",
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old_freq / 1000, volt_old ? volt_old / 1000 : -1,
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new_freq / 1000, volt ? volt / 1000 : -1);
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/* scaling up? scale voltage before frequency */
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if (!IS_ERR(cpu_reg) && new_freq > old_freq) {
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ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
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if (ret) {
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pr_err("failed to scale voltage up: %d\n", ret);
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return ret;
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}
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}
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ret = clk_set_rate(cpu_clk, freq_exact);
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if (ret) {
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pr_err("failed to set clock rate: %d\n", ret);
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if (!IS_ERR(cpu_reg))
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regulator_set_voltage_tol(cpu_reg, volt_old, tol);
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return ret;
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}
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/* scaling down? scale voltage after frequency */
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if (!IS_ERR(cpu_reg) && new_freq < old_freq) {
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ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
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if (ret) {
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pr_err("failed to scale voltage down: %d\n", ret);
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clk_set_rate(cpu_clk, old_freq * 1000);
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}
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}
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return ret;
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}
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static int cpu0_cpufreq_init(struct cpufreq_policy *policy)
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{
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policy->clk = cpu_clk;
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return cpufreq_generic_init(policy, freq_table, transition_latency);
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}
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static struct cpufreq_driver cpu0_cpufreq_driver = {
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.flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK,
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.verify = cpufreq_generic_frequency_table_verify,
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.target_index = cpu0_set_target,
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.get = cpufreq_generic_get,
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.init = cpu0_cpufreq_init,
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.name = "generic_cpu0",
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.attr = cpufreq_generic_attr,
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};
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static int cpu0_cpufreq_probe(struct platform_device *pdev)
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{
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struct device_node *np;
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int ret;
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cpu_dev = get_cpu_device(0);
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if (!cpu_dev) {
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pr_err("failed to get cpu0 device\n");
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return -ENODEV;
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}
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np = of_node_get(cpu_dev->of_node);
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if (!np) {
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pr_err("failed to find cpu0 node\n");
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return -ENOENT;
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}
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cpu_reg = regulator_get_optional(cpu_dev, "cpu0");
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if (IS_ERR(cpu_reg)) {
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/*
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* If cpu0 regulator supply node is present, but regulator is
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* not yet registered, we should try defering probe.
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*/
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if (PTR_ERR(cpu_reg) == -EPROBE_DEFER) {
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dev_err(cpu_dev, "cpu0 regulator not ready, retry\n");
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ret = -EPROBE_DEFER;
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goto out_put_node;
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}
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pr_warn("failed to get cpu0 regulator: %ld\n",
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PTR_ERR(cpu_reg));
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}
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cpu_clk = clk_get(cpu_dev, NULL);
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if (IS_ERR(cpu_clk)) {
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ret = PTR_ERR(cpu_clk);
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pr_err("failed to get cpu0 clock: %d\n", ret);
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goto out_put_reg;
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}
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ret = of_init_opp_table(cpu_dev);
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if (ret) {
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pr_err("failed to init OPP table: %d\n", ret);
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goto out_put_clk;
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}
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ret = dev_pm_opp_init_cpufreq_table(cpu_dev, &freq_table);
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if (ret) {
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pr_err("failed to init cpufreq table: %d\n", ret);
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goto out_put_clk;
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}
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of_property_read_u32(np, "voltage-tolerance", &voltage_tolerance);
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if (of_property_read_u32(np, "clock-latency", &transition_latency))
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transition_latency = CPUFREQ_ETERNAL;
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if (!IS_ERR(cpu_reg)) {
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struct dev_pm_opp *opp;
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unsigned long min_uV, max_uV;
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int i;
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/*
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* OPP is maintained in order of increasing frequency, and
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* freq_table initialised from OPP is therefore sorted in the
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* same order.
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*/
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for (i = 0; freq_table[i].frequency != CPUFREQ_TABLE_END; i++)
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;
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rcu_read_lock();
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opp = dev_pm_opp_find_freq_exact(cpu_dev,
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freq_table[0].frequency * 1000, true);
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min_uV = dev_pm_opp_get_voltage(opp);
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opp = dev_pm_opp_find_freq_exact(cpu_dev,
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freq_table[i-1].frequency * 1000, true);
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max_uV = dev_pm_opp_get_voltage(opp);
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rcu_read_unlock();
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ret = regulator_set_voltage_time(cpu_reg, min_uV, max_uV);
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if (ret > 0)
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transition_latency += ret * 1000;
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}
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ret = cpufreq_register_driver(&cpu0_cpufreq_driver);
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if (ret) {
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pr_err("failed register driver: %d\n", ret);
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goto out_free_table;
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}
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/*
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* For now, just loading the cooling device;
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* thermal DT code takes care of matching them.
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*/
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if (of_find_property(np, "#cooling-cells", NULL)) {
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cdev = of_cpufreq_cooling_register(np, cpu_present_mask);
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if (IS_ERR(cdev))
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pr_err("running cpufreq without cooling device: %ld\n",
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PTR_ERR(cdev));
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}
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of_node_put(np);
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return 0;
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out_free_table:
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dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table);
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out_put_clk:
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if (!IS_ERR(cpu_clk))
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clk_put(cpu_clk);
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out_put_reg:
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if (!IS_ERR(cpu_reg))
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regulator_put(cpu_reg);
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out_put_node:
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of_node_put(np);
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return ret;
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}
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static int cpu0_cpufreq_remove(struct platform_device *pdev)
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{
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cpufreq_cooling_unregister(cdev);
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cpufreq_unregister_driver(&cpu0_cpufreq_driver);
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dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table);
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return 0;
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}
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static struct platform_driver cpu0_cpufreq_platdrv = {
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.driver = {
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.name = "cpufreq-cpu0",
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.owner = THIS_MODULE,
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},
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.probe = cpu0_cpufreq_probe,
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.remove = cpu0_cpufreq_remove,
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};
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module_platform_driver(cpu0_cpufreq_platdrv);
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MODULE_AUTHOR("Shawn Guo <shawn.guo@linaro.org>");
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MODULE_DESCRIPTION("Generic CPU0 cpufreq driver");
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MODULE_LICENSE("GPL");
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