a56cde4134
SPI EEPROMs typically support both SPI Mode 0 (CPOL=CPHA=0) and Mode 3
(CPOL=CPHA=1). However, using the latter is currently flagged as an
error by "make dtbs_check", e.g.:
arch/arm/boot/dts/r8a7791-koelsch.dtb: flash@0: Unevaluated properties are not allowed ('spi-cpha', 'spi-cpol' were unexpected)
From schema: Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml
Fix this by documenting support for CPOL=CPHA=1.
Fixes:
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.. | ||
bindings | ||
changesets.rst | ||
dynamic-resolution-notes.rst | ||
index.rst | ||
kernel-api.rst | ||
of_unittest.rst | ||
overlay-notes.rst | ||
usage-model.rst |