761 строка
18 KiB
C
761 строка
18 KiB
C
/*
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* Macintosh interrupts
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*
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* General design:
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* In contrary to the Amiga and Atari platforms, the Mac hardware seems to
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* exclusively use the autovector interrupts (the 'generic level0-level7'
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* interrupts with exception vectors 0x19-0x1f). The following interrupt levels
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* are used:
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* 1 - VIA1
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* - slot 0: one second interrupt (CA2)
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* - slot 1: VBlank (CA1)
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* - slot 2: ADB data ready (SR full)
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* - slot 3: ADB data (CB2)
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* - slot 4: ADB clock (CB1)
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* - slot 5: timer 2
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* - slot 6: timer 1
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* - slot 7: status of IRQ; signals 'any enabled int.'
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*
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* 2 - VIA2 or RBV
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* - slot 0: SCSI DRQ (CA2)
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* - slot 1: NUBUS IRQ (CA1) need to read port A to find which
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* - slot 2: /EXP IRQ (only on IIci)
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* - slot 3: SCSI IRQ (CB2)
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* - slot 4: ASC IRQ (CB1)
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* - slot 5: timer 2 (not on IIci)
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* - slot 6: timer 1 (not on IIci)
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* - slot 7: status of IRQ; signals 'any enabled int.'
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*
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* 2 - OSS (IIfx only?)
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* - slot 0: SCSI interrupt
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* - slot 1: Sound interrupt
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*
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* Levels 3-6 vary by machine type. For VIA or RBV Macintoshes:
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*
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* 3 - unused (?)
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*
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* 4 - SCC (slot number determined by reading RR3 on the SSC itself)
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* - slot 1: SCC channel A
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* - slot 2: SCC channel B
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*
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* 5 - unused (?)
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* [serial errors or special conditions seem to raise level 6
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* interrupts on some models (LC4xx?)]
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*
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* 6 - off switch (?)
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*
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* For OSS Macintoshes (IIfx only at this point):
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*
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* 3 - Nubus interrupt
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* - slot 0: Slot $9
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* - slot 1: Slot $A
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* - slot 2: Slot $B
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* - slot 3: Slot $C
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* - slot 4: Slot $D
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* - slot 5: Slot $E
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*
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* 4 - SCC IOP
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* - slot 1: SCC channel A
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* - slot 2: SCC channel B
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*
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* 5 - ISM IOP (ADB?)
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*
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* 6 - unused
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*
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* For PSC Macintoshes (660AV, 840AV):
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*
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* 3 - PSC level 3
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* - slot 0: MACE
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*
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* 4 - PSC level 4
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* - slot 1: SCC channel A interrupt
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* - slot 2: SCC channel B interrupt
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* - slot 3: MACE DMA
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*
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* 5 - PSC level 5
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*
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* 6 - PSC level 6
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*
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* Finally we have good 'ole level 7, the non-maskable interrupt:
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*
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* 7 - NMI (programmer's switch on the back of some Macs)
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* Also RAM parity error on models which support it (IIc, IIfx?)
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*
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* The current interrupt logic looks something like this:
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*
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* - We install dispatchers for the autovector interrupts (1-7). These
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* dispatchers are responsible for querying the hardware (the
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* VIA/RBV/OSS/PSC chips) to determine the actual interrupt source. Using
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* this information a machspec interrupt number is generated by placing the
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* index of the interrupt hardware into the low three bits and the original
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* autovector interrupt number in the upper 5 bits. The handlers for the
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* resulting machspec interrupt are then called.
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*
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* - Nubus is a special case because its interrupts are hidden behind two
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* layers of hardware. Nubus interrupts come in as index 1 on VIA #2,
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* which translates to IRQ number 17. In this spot we install _another_
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* dispatcher. This dispatcher finds the interrupting slot number (9-F) and
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* then forms a new machspec interrupt number as above with the slot number
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* minus 9 in the low three bits and the pseudo-level 7 in the upper five
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* bits. The handlers for this new machspec interrupt number are then
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* called. This puts Nubus interrupts into the range 56-62.
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*
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* - The Baboon interrupts (used on some PowerBooks) are an even more special
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* case. They're hidden behind the Nubus slot $C interrupt thus adding a
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* third layer of indirection. Why oh why did the Apple engineers do that?
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*
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* - We support "fast" and "slow" handlers, just like the Amiga port. The
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* fast handlers are called first and with all interrupts disabled. They
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* are expected to execute quickly (hence the name). The slow handlers are
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* called last with interrupts enabled and the interrupt level restored.
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* They must therefore be reentrant.
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*
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* TODO:
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*
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*/
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/kernel_stat.h>
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#include <linux/interrupt.h> /* for intr_count */
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#include <linux/delay.h>
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#include <linux/seq_file.h>
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#include <asm/system.h>
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#include <asm/irq.h>
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#include <asm/traps.h>
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#include <asm/bootinfo.h>
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#include <asm/machw.h>
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#include <asm/macintosh.h>
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#include <asm/mac_via.h>
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#include <asm/mac_psc.h>
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#include <asm/hwtest.h>
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#include <asm/errno.h>
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#include <asm/macints.h>
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#define DEBUG_SPURIOUS
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#define SHUTUP_SONIC
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/*
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* The mac_irq_list array is an array of linked lists of irq_node_t nodes.
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* Each node contains one handler to be called whenever the interrupt
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* occurs, with fast handlers listed before slow handlers.
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*/
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irq_node_t *mac_irq_list[NUM_MAC_SOURCES];
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/* SCC interrupt mask */
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static int scc_mask;
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/*
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* VIA/RBV hooks
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*/
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extern void via_init(void);
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extern void via_register_interrupts(void);
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extern void via_irq_enable(int);
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extern void via_irq_disable(int);
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extern void via_irq_clear(int);
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extern int via_irq_pending(int);
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/*
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* OSS hooks
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*/
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extern int oss_present;
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extern void oss_init(void);
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extern void oss_register_interrupts(void);
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extern void oss_irq_enable(int);
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extern void oss_irq_disable(int);
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extern void oss_irq_clear(int);
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extern int oss_irq_pending(int);
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/*
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* PSC hooks
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*/
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extern int psc_present;
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extern void psc_init(void);
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extern void psc_register_interrupts(void);
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extern void psc_irq_enable(int);
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extern void psc_irq_disable(int);
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extern void psc_irq_clear(int);
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extern int psc_irq_pending(int);
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/*
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* IOP hooks
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*/
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extern void iop_register_interrupts(void);
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/*
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* Baboon hooks
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*/
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extern int baboon_present;
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extern void baboon_init(void);
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extern void baboon_register_interrupts(void);
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extern void baboon_irq_enable(int);
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extern void baboon_irq_disable(int);
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extern void baboon_irq_clear(int);
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extern int baboon_irq_pending(int);
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/*
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* SCC interrupt routines
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*/
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static void scc_irq_enable(int);
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static void scc_irq_disable(int);
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/*
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* console_loglevel determines NMI handler function
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*/
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extern irqreturn_t mac_bang(int, void *, struct pt_regs *);
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irqreturn_t mac_nmi_handler(int, void *, struct pt_regs *);
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irqreturn_t mac_debug_handler(int, void *, struct pt_regs *);
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/* #define DEBUG_MACINTS */
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void mac_init_IRQ(void)
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{
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int i;
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#ifdef DEBUG_MACINTS
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printk("mac_init_IRQ(): Setting things up...\n");
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#endif
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/* Initialize the IRQ handler lists. Initially each list is empty, */
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for (i = 0; i < NUM_MAC_SOURCES; i++) {
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mac_irq_list[i] = NULL;
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}
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scc_mask = 0;
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/* Make sure the SONIC interrupt is cleared or things get ugly */
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#ifdef SHUTUP_SONIC
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printk("Killing onboard sonic... ");
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/* This address should hopefully be mapped already */
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if (hwreg_present((void*)(0x50f0a000))) {
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*(long *)(0x50f0a014) = 0x7fffL;
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*(long *)(0x50f0a010) = 0L;
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}
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printk("Done.\n");
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#endif /* SHUTUP_SONIC */
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/*
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* Now register the handlers for the master IRQ handlers
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* at levels 1-7. Most of the work is done elsewhere.
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*/
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if (oss_present) {
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oss_register_interrupts();
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} else {
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via_register_interrupts();
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}
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if (psc_present) psc_register_interrupts();
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if (baboon_present) baboon_register_interrupts();
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iop_register_interrupts();
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cpu_request_irq(7, mac_nmi_handler, IRQ_FLG_LOCK, "NMI",
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mac_nmi_handler);
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#ifdef DEBUG_MACINTS
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printk("mac_init_IRQ(): Done!\n");
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#endif
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}
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/*
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* Routines to work with irq_node_t's on linked lists lifted from
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* the Amiga code written by Roman Zippel.
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*/
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static inline void mac_insert_irq(irq_node_t **list, irq_node_t *node)
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{
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unsigned long flags;
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irq_node_t *cur;
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if (!node->dev_id)
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printk("%s: Warning: dev_id of %s is zero\n",
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__FUNCTION__, node->devname);
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local_irq_save(flags);
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cur = *list;
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if (node->flags & IRQ_FLG_FAST) {
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node->flags &= ~IRQ_FLG_SLOW;
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while (cur && cur->flags & IRQ_FLG_FAST) {
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list = &cur->next;
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cur = cur->next;
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}
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} else if (node->flags & IRQ_FLG_SLOW) {
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while (cur) {
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list = &cur->next;
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cur = cur->next;
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}
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} else {
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while (cur && !(cur->flags & IRQ_FLG_SLOW)) {
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list = &cur->next;
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cur = cur->next;
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}
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}
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node->next = cur;
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*list = node;
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local_irq_restore(flags);
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}
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static inline void mac_delete_irq(irq_node_t **list, void *dev_id)
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{
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unsigned long flags;
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irq_node_t *node;
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local_irq_save(flags);
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for (node = *list; node; list = &node->next, node = *list) {
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if (node->dev_id == dev_id) {
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*list = node->next;
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/* Mark it as free. */
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node->handler = NULL;
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local_irq_restore(flags);
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return;
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}
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}
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local_irq_restore(flags);
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printk ("%s: tried to remove invalid irq\n", __FUNCTION__);
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}
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/*
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* Call all the handlers for a given interrupt. Fast handlers are called
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* first followed by slow handlers.
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*
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* This code taken from the original Amiga code written by Roman Zippel.
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*/
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void mac_do_irq_list(int irq, struct pt_regs *fp)
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{
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irq_node_t *node, *slow_nodes;
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unsigned long flags;
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kstat_cpu(0).irqs[irq]++;
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#ifdef DEBUG_SPURIOUS
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if (!mac_irq_list[irq] && (console_loglevel > 7)) {
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printk("mac_do_irq_list: spurious interrupt %d!\n", irq);
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return;
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}
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#endif
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/* serve first fast and normal handlers */
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for (node = mac_irq_list[irq];
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node && (!(node->flags & IRQ_FLG_SLOW));
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node = node->next)
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node->handler(irq, node->dev_id, fp);
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if (!node) return;
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local_save_flags(flags);
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local_irq_restore((flags & ~0x0700) | (fp->sr & 0x0700));
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/* if slow handlers exists, serve them now */
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slow_nodes = node;
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for (; node; node = node->next) {
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node->handler(irq, node->dev_id, fp);
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}
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}
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/*
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* mac_enable_irq - enable an interrupt source
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* mac_disable_irq - disable an interrupt source
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* mac_clear_irq - clears a pending interrupt
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* mac_pending_irq - Returns the pending status of an IRQ (nonzero = pending)
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*
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* These routines are just dispatchers to the VIA/OSS/PSC routines.
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*/
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void mac_enable_irq (unsigned int irq)
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{
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int irq_src = IRQ_SRC(irq);
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switch(irq_src) {
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case 1: via_irq_enable(irq);
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break;
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case 2:
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case 7: if (oss_present) {
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oss_irq_enable(irq);
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} else {
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via_irq_enable(irq);
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}
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break;
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case 3:
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case 4:
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case 5:
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case 6: if (psc_present) {
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psc_irq_enable(irq);
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} else if (oss_present) {
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oss_irq_enable(irq);
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} else if (irq_src == 4) {
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scc_irq_enable(irq);
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}
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break;
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case 8: if (baboon_present) {
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baboon_irq_enable(irq);
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}
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break;
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}
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}
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void mac_disable_irq (unsigned int irq)
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{
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int irq_src = IRQ_SRC(irq);
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switch(irq_src) {
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case 1: via_irq_disable(irq);
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break;
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case 2:
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case 7: if (oss_present) {
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oss_irq_disable(irq);
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} else {
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via_irq_disable(irq);
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}
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break;
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case 3:
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case 4:
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case 5:
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case 6: if (psc_present) {
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psc_irq_disable(irq);
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} else if (oss_present) {
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oss_irq_disable(irq);
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} else if (irq_src == 4) {
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scc_irq_disable(irq);
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}
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break;
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case 8: if (baboon_present) {
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baboon_irq_disable(irq);
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}
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break;
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}
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}
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void mac_clear_irq( unsigned int irq )
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{
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switch(IRQ_SRC(irq)) {
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case 1: via_irq_clear(irq);
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break;
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case 2:
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case 7: if (oss_present) {
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oss_irq_clear(irq);
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} else {
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via_irq_clear(irq);
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}
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break;
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case 3:
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case 4:
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case 5:
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case 6: if (psc_present) {
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psc_irq_clear(irq);
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} else if (oss_present) {
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oss_irq_clear(irq);
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}
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break;
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case 8: if (baboon_present) {
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baboon_irq_clear(irq);
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}
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break;
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}
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}
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int mac_irq_pending( unsigned int irq )
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{
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switch(IRQ_SRC(irq)) {
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case 1: return via_irq_pending(irq);
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case 2:
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case 7: if (oss_present) {
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return oss_irq_pending(irq);
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} else {
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return via_irq_pending(irq);
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}
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case 3:
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case 4:
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case 5:
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case 6: if (psc_present) {
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return psc_irq_pending(irq);
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} else if (oss_present) {
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return oss_irq_pending(irq);
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}
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}
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return 0;
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}
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/*
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* Add an interrupt service routine to an interrupt source.
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* Returns 0 on success.
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*
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* FIXME: You can register interrupts on nonexistent source (ie PSC4 on a
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* non-PSC machine). We should return -EINVAL in those cases.
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*/
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int mac_request_irq(unsigned int irq,
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irqreturn_t (*handler)(int, void *, struct pt_regs *),
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unsigned long flags, const char *devname, void *dev_id)
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{
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irq_node_t *node;
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#ifdef DEBUG_MACINTS
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printk ("%s: irq %d requested for %s\n", __FUNCTION__, irq, devname);
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#endif
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if (irq < VIA1_SOURCE_BASE) {
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return cpu_request_irq(irq, handler, flags, devname, dev_id);
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}
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if (irq >= NUM_MAC_SOURCES) {
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printk ("%s: unknown irq %d requested by %s\n",
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__FUNCTION__, irq, devname);
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}
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/* Get a node and stick it onto the right list */
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if (!(node = new_irq_node())) return -ENOMEM;
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node->handler = handler;
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node->flags = flags;
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node->dev_id = dev_id;
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node->devname = devname;
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node->next = NULL;
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mac_insert_irq(&mac_irq_list[irq], node);
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/* Now enable the IRQ source */
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mac_enable_irq(irq);
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return 0;
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}
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/*
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* Removes an interrupt service routine from an interrupt source.
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*/
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void mac_free_irq(unsigned int irq, void *dev_id)
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{
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#ifdef DEBUG_MACINTS
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printk ("%s: irq %d freed by %p\n", __FUNCTION__, irq, dev_id);
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#endif
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if (irq < VIA1_SOURCE_BASE) {
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cpu_free_irq(irq, dev_id);
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return;
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|
}
|
|
|
|
if (irq >= NUM_MAC_SOURCES) {
|
|
printk ("%s: unknown irq %d freed\n",
|
|
__FUNCTION__, irq);
|
|
return;
|
|
}
|
|
|
|
mac_delete_irq(&mac_irq_list[irq], dev_id);
|
|
|
|
/* If the list for this interrupt is */
|
|
/* empty then disable the source. */
|
|
|
|
if (!mac_irq_list[irq]) {
|
|
mac_disable_irq(irq);
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Generate a pretty listing for /proc/interrupts
|
|
*
|
|
* By the time we're called the autovector interrupt list has already been
|
|
* generated, so we just need to do the machspec interrupts.
|
|
*
|
|
* 990506 (jmt) - rewritten to handle chained machspec interrupt handlers.
|
|
* Also removed display of num_spurious it is already
|
|
* displayed for us as autovector irq 0.
|
|
*/
|
|
|
|
int show_mac_interrupts(struct seq_file *p, void *v)
|
|
{
|
|
int i;
|
|
irq_node_t *node;
|
|
char *base;
|
|
|
|
/* Don't do Nubus interrupts in this loop; we do them separately */
|
|
/* below so that we can print slot numbers instead of IRQ numbers */
|
|
|
|
for (i = VIA1_SOURCE_BASE ; i < NUM_MAC_SOURCES ; ++i) {
|
|
|
|
/* Nonexistant interrupt or nothing registered; skip it. */
|
|
|
|
if ((node = mac_irq_list[i]) == NULL) continue;
|
|
if (node->flags & IRQ_FLG_STD) continue;
|
|
|
|
base = "";
|
|
switch(IRQ_SRC(i)) {
|
|
case 1: base = "via1";
|
|
break;
|
|
case 2: if (oss_present) {
|
|
base = "oss";
|
|
} else {
|
|
base = "via2";
|
|
}
|
|
break;
|
|
case 3:
|
|
case 4:
|
|
case 5:
|
|
case 6: if (psc_present) {
|
|
base = "psc";
|
|
} else if (oss_present) {
|
|
base = "oss";
|
|
} else {
|
|
if (IRQ_SRC(i) == 4) base = "scc";
|
|
}
|
|
break;
|
|
case 7: base = "nbus";
|
|
break;
|
|
case 8: base = "bbn";
|
|
break;
|
|
}
|
|
seq_printf(p, "%4s %2d: %10u ", base, i, kstat_cpu(0).irqs[i]);
|
|
|
|
do {
|
|
if (node->flags & IRQ_FLG_FAST) {
|
|
seq_puts(p, "F ");
|
|
} else if (node->flags & IRQ_FLG_SLOW) {
|
|
seq_puts(p, "S ");
|
|
} else {
|
|
seq_puts(p, " ");
|
|
}
|
|
seq_printf(p, "%s\n", node->devname);
|
|
if ((node = node->next)) {
|
|
seq_puts(p, " ");
|
|
}
|
|
} while(node);
|
|
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
void mac_default_handler(int irq, void *dev_id, struct pt_regs *regs)
|
|
{
|
|
#ifdef DEBUG_SPURIOUS
|
|
printk("Unexpected IRQ %d on device %p\n", irq, dev_id);
|
|
#endif
|
|
}
|
|
|
|
static int num_debug[8];
|
|
|
|
irqreturn_t mac_debug_handler(int irq, void *dev_id, struct pt_regs *regs)
|
|
{
|
|
if (num_debug[irq] < 10) {
|
|
printk("DEBUG: Unexpected IRQ %d\n", irq);
|
|
num_debug[irq]++;
|
|
}
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
static int in_nmi;
|
|
static volatile int nmi_hold;
|
|
|
|
irqreturn_t mac_nmi_handler(int irq, void *dev_id, struct pt_regs *fp)
|
|
{
|
|
int i;
|
|
/*
|
|
* generate debug output on NMI switch if 'debug' kernel option given
|
|
* (only works with Penguin!)
|
|
*/
|
|
|
|
in_nmi++;
|
|
for (i=0; i<100; i++)
|
|
udelay(1000);
|
|
|
|
if (in_nmi == 1) {
|
|
nmi_hold = 1;
|
|
printk("... pausing, press NMI to resume ...");
|
|
} else {
|
|
printk(" ok!\n");
|
|
nmi_hold = 0;
|
|
}
|
|
|
|
barrier();
|
|
|
|
while (nmi_hold == 1)
|
|
udelay(1000);
|
|
|
|
if ( console_loglevel >= 8 ) {
|
|
#if 0
|
|
show_state();
|
|
printk("PC: %08lx\nSR: %04x SP: %p\n", fp->pc, fp->sr, fp);
|
|
printk("d0: %08lx d1: %08lx d2: %08lx d3: %08lx\n",
|
|
fp->d0, fp->d1, fp->d2, fp->d3);
|
|
printk("d4: %08lx d5: %08lx a0: %08lx a1: %08lx\n",
|
|
fp->d4, fp->d5, fp->a0, fp->a1);
|
|
|
|
if (STACK_MAGIC != *(unsigned long *)current->kernel_stack_page)
|
|
printk("Corrupted stack page\n");
|
|
printk("Process %s (pid: %d, stackpage=%08lx)\n",
|
|
current->comm, current->pid, current->kernel_stack_page);
|
|
if (intr_count == 1)
|
|
dump_stack((struct frame *)fp);
|
|
#else
|
|
/* printk("NMI "); */
|
|
#endif
|
|
}
|
|
in_nmi--;
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
/*
|
|
* Simple routines for masking and unmasking
|
|
* SCC interrupts in cases where this can't be
|
|
* done in hardware (only the PSC can do that.)
|
|
*/
|
|
|
|
static void scc_irq_enable(int irq) {
|
|
int irq_idx = IRQ_IDX(irq);
|
|
|
|
scc_mask |= (1 << irq_idx);
|
|
}
|
|
|
|
static void scc_irq_disable(int irq) {
|
|
int irq_idx = IRQ_IDX(irq);
|
|
|
|
scc_mask &= ~(1 << irq_idx);
|
|
}
|
|
|
|
/*
|
|
* SCC master interrupt handler. We have to do a bit of magic here
|
|
* to figure out what channel gave us the interrupt; putting this
|
|
* here is cleaner than hacking it into drivers/char/macserial.c.
|
|
*/
|
|
|
|
void mac_scc_dispatch(int irq, void *dev_id, struct pt_regs *regs)
|
|
{
|
|
volatile unsigned char *scc = (unsigned char *) mac_bi_data.sccbase + 2;
|
|
unsigned char reg;
|
|
unsigned long flags;
|
|
|
|
/* Read RR3 from the chip. Always do this on channel A */
|
|
/* This must be an atomic operation so disable irqs. */
|
|
|
|
local_irq_save(flags);
|
|
*scc = 3;
|
|
reg = *scc;
|
|
local_irq_restore(flags);
|
|
|
|
/* Now dispatch. Bits 0-2 are for channel B and */
|
|
/* bits 3-5 are for channel A. We can safely */
|
|
/* ignore the remaining bits here. */
|
|
/* */
|
|
/* Note that we're ignoring scc_mask for now. */
|
|
/* If we actually mask the ints then we tend to */
|
|
/* get hammered by very persistent SCC irqs, */
|
|
/* and since they're autovector interrupts they */
|
|
/* pretty much kill the system. */
|
|
|
|
if (reg & 0x38) mac_do_irq_list(IRQ_SCCA, regs);
|
|
if (reg & 0x07) mac_do_irq_list(IRQ_SCCB, regs);
|
|
}
|