microsoft
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WSL2-Linux-Kernel
зеркало из https://github.com/microsoft/WSL2-Linux-Kernel.git
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WSL2-Linux-Kernel/drivers/clk/tegra
История
Dmitry Osipenko fa64023763 clk: tegra: pll: Improve PLLM enable-state detection 
Power Management Controller (PMC) can override the PLLM clock settings,
including the enable-state. Although PMC could only act as a second level
gate, meaning that PLLM needs to be enabled by the Clock and Reset
Controller (CaR) anyways if we want it to be enabled. Hence, when PLLM is
overridden by PMC, it needs to be enabled by CaR and ungated by PMC in
order to be functional. Please note that this patch doesn't fix any known
problem, and thus, it's merely a minor improvement.

Link: https://lore.kernel.org/linux-arm-kernel/20191210120909.GA2703785@ulmo/T/
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Link: https://lore.kernel.org/r/20200709172057.13951-1-digetx@gmail.com
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
 		2020-07-27 18:21:17 -07:00
..
Kconfig clk: tegra: Rename Tegra124 EMC clock source file 2020-05-12 22:48:41 +02:00
Makefile clk: tegra: Add custom CCLK implementation 2020-05-12 22:48:42 +02:00
clk-audio-sync.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201 2019-05-30 11:29:52 -07:00
clk-bpmp.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
clk-dfll.c clk: tegra: clk-dfll: Remove call to pm_runtime_irq_safe() 2020-01-10 15:39:03 +01:00
clk-dfll.h clk: tegra: clk-dfll: Add suspend and resume support 2019-11-11 14:53:03 +01:00
clk-divider.c clk: tegra: divider: Check UART's divider enable-bit state on rate's recalculation 2020-01-10 15:50:05 +01:00
clk-id.h clk: tegra: Remove tegra_pmc_clk_init along with clk ids 2020-03-12 11:34:04 +01:00
clk-periph-fixed.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201 2019-05-30 11:29:52 -07:00
clk-periph-gate.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201 2019-05-30 11:29:52 -07:00
clk-periph.c clk: tegra: periph: Add restore_context support 2019-11-11 14:53:02 +01:00
clk-pll-out.c clk: tegra: pllout: Save and restore pllout context 2019-11-11 14:53:02 +01:00
clk-pll.c clk: tegra: pll: Improve PLLM enable-state detection 2020-07-27 18:21:17 -07:00
clk-sdmmc-mux.c clk: tegra: periph: Add restore_context support 2019-11-11 14:53:02 +01:00
clk-super.c clk: tegra: clk-super: Add restore-context support 2019-11-11 14:53:03 +01:00
clk-tegra-audio.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201 2019-05-30 11:29:52 -07:00
clk-tegra-fixed.c clk: tegra: Remove CLK_M_DIV fixed clocks 2020-03-12 11:33:32 +01:00
clk-tegra-periph.c clk: tegra: Mark fuse clock as critical 2020-01-08 12:55:19 +01:00
clk-tegra-super-cclk.c clk: tegra: cclk: Add helpers for handling PLLX rate changes 2020-05-12 22:48:43 +02:00
clk-tegra-super-gen4.c clk: tegra: clk-super: Fix to enable PLLP branches to CPU 2019-11-11 14:53:03 +01:00
clk-tegra20-emc.c clk: tegra: Add Tegra20/30 EMC clock implementation 2019-11-11 14:01:22 +01:00
clk-tegra20.c clk: tegra20: Use custom CCLK implementation 2020-05-12 22:48:43 +02:00
clk-tegra30.c clk: tegra30: Use custom CCLK implementation 2020-05-12 22:48:43 +02:00
clk-tegra114.c clk: tegra: Remove audio clocks configuration from clock driver 2020-03-12 12:10:49 +01:00
clk-tegra124-dfll-fcpu.c clk: tegra: clk-dfll: Add suspend and resume support 2019-11-11 14:53:03 +01:00
clk-tegra124-emc.c clk: tegra: Rename Tegra124 EMC clock source file 2020-05-12 22:48:41 +02:00
clk-tegra124.c clk: tegra: Fix initial rate for pll_a on Tegra124 2020-05-12 16:26:18 -07:00
clk-tegra210-emc.c clk: tegra: Implement Tegra210 EMC clock 2020-05-12 22:48:42 +02:00
clk-tegra210.c clk: tegra: Add Tegra210 CSI TPG clock gate 2020-05-12 22:48:43 +02:00
clk-utils.c clk: tegra: Refactor fractional divider calculation 2018-07-25 13:43:34 -07:00
clk.c clk: tegra: Fix double-free in tegra_clk_init() 2019-12-24 00:01:06 -08:00
clk.h clk: tegra: cclk: Add helpers for handling PLLX rate changes 2020-05-12 22:48:43 +02:00
cvb.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174 2019-05-30 11:26:41 -07:00
cvb.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174 2019-05-30 11:26:41 -07:00