Srinivas Pandruvada 92e0e87d0b platform/x86: ISST: Allow additional TRL MSRs ... Additional Turbo Ratio Limit (TRL) MSRs are required to get bucket vs core count relationship. So add them to the list of allowed MSRs. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>		2019-09-09 13:19:35 +03:00
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Kconfig	platform/x86: ISST: Add common API to register and handle ioctls	2019-07-02 18:41:16 +03:00
Makefile	platform/x86: ISST: Add Intel Speed Select mailbox interface via MSRs	2019-07-02 18:41:16 +03:00
isst_if_common.c	platform/x86: ISST: Allow additional TRL MSRs	2019-09-09 13:19:35 +03:00
isst_if_common.h	platform/x86: ISST: Restore state on resume	2019-07-02 18:41:16 +03:00
isst_if_mbox_msr.c	platform/x86: ISST: Restore state on resume	2019-07-02 18:41:16 +03:00
isst_if_mbox_pci.c	platform/x86: ISST: Restore state on resume	2019-07-02 18:41:16 +03:00
isst_if_mmio.c	platform/x86: ISST: Use dev_get_drvdata	2019-07-30 14:12:51 +03:00