b170143ae1
The NVMe co-processor on the Apple M1 uses a DMA address filter called SART for some DMA transactions. This adds a simple driver used to configure the memory regions from which DMA transactions are allowed. Unlike a real IOMMU, SART does not support any pagetables and can't be implemented inside the IOMMU subsystem using iommu_ops. It also can't be implemented using dma_map_ops since not all DMA transactions of the NVMe controller are filtered by SART. Instead, most buffers have to be registered using the integrated NVMe IOMMU and we can't have two separate dma_map_ops implementations for a single device. Co-developed-by: Hector Martin <marcan@marcan.st> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Hector Martin <marcan@marcan.st> Signed-off-by: Sven Peter <sven@svenpeter.dev> |
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| actions | ||
| amlogic | ||
| apple | ||
| brcmstb | ||
| cirrus | ||
| dove | ||
| ixp4xx | ||
| marvell/octeontx2 | ||
| mediatek | ||
| mmp | ||
| nxp | ||
| qcom | ||
| renesas | ||
| samsung | ||
| sunxi | ||
| ti | ||