200 строки
4.0 KiB
C
200 строки
4.0 KiB
C
#ifndef __ASM_X86_PROCESSOR_H
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#define __ASM_X86_PROCESSOR_H
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#include <asm/processor-flags.h>
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#include <asm/page.h>
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#include <asm/system.h>
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static inline void native_cpuid(unsigned int *eax, unsigned int *ebx,
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unsigned int *ecx, unsigned int *edx)
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{
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/* ecx is often an input as well as an output. */
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__asm__("cpuid"
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: "=a" (*eax),
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"=b" (*ebx),
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"=c" (*ecx),
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"=d" (*edx)
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: "0" (*eax), "2" (*ecx));
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}
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static inline void load_cr3(pgd_t *pgdir)
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{
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write_cr3(__pa(pgdir));
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}
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#ifdef CONFIG_X86_32
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# include "processor_32.h"
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#else
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# include "processor_64.h"
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#endif
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static inline unsigned long native_get_debugreg(int regno)
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{
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unsigned long val = 0; /* Damn you, gcc! */
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switch (regno) {
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case 0:
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asm("mov %%db0, %0" :"=r" (val)); break;
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case 1:
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asm("mov %%db1, %0" :"=r" (val)); break;
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case 2:
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asm("mov %%db2, %0" :"=r" (val)); break;
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case 3:
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asm("mov %%db3, %0" :"=r" (val)); break;
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case 6:
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asm("mov %%db6, %0" :"=r" (val)); break;
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case 7:
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asm("mov %%db7, %0" :"=r" (val)); break;
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default:
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BUG();
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}
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return val;
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}
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static inline void native_set_debugreg(int regno, unsigned long value)
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{
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switch (regno) {
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case 0:
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asm("mov %0,%%db0" : /* no output */ :"r" (value));
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break;
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case 1:
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asm("mov %0,%%db1" : /* no output */ :"r" (value));
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break;
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case 2:
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asm("mov %0,%%db2" : /* no output */ :"r" (value));
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break;
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case 3:
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asm("mov %0,%%db3" : /* no output */ :"r" (value));
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break;
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case 6:
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asm("mov %0,%%db6" : /* no output */ :"r" (value));
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break;
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case 7:
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asm("mov %0,%%db7" : /* no output */ :"r" (value));
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break;
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default:
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BUG();
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}
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}
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/*
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* Set IOPL bits in EFLAGS from given mask
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*/
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static inline void native_set_iopl_mask(unsigned mask)
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{
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#ifdef CONFIG_X86_32
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unsigned int reg;
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__asm__ __volatile__ ("pushfl;"
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"popl %0;"
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"andl %1, %0;"
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"orl %2, %0;"
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"pushl %0;"
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"popfl"
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: "=&r" (reg)
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: "i" (~X86_EFLAGS_IOPL), "r" (mask));
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#endif
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}
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#ifndef CONFIG_PARAVIRT
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#define __cpuid native_cpuid
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#define paravirt_enabled() 0
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/*
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* These special macros can be used to get or set a debugging register
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*/
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#define get_debugreg(var, register) \
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(var) = native_get_debugreg(register)
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#define set_debugreg(value, register) \
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native_set_debugreg(register, value)
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#define set_iopl_mask native_set_iopl_mask
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#endif /* CONFIG_PARAVIRT */
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/*
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* Save the cr4 feature set we're using (ie
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* Pentium 4MB enable and PPro Global page
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* enable), so that any CPU's that boot up
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* after us can get the correct flags.
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*/
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extern unsigned long mmu_cr4_features;
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static inline void set_in_cr4(unsigned long mask)
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{
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unsigned cr4;
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mmu_cr4_features |= mask;
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cr4 = read_cr4();
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cr4 |= mask;
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write_cr4(cr4);
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}
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static inline void clear_in_cr4(unsigned long mask)
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{
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unsigned cr4;
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mmu_cr4_features &= ~mask;
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cr4 = read_cr4();
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cr4 &= ~mask;
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write_cr4(cr4);
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}
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/*
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* Generic CPUID function
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* clear %ecx since some cpus (Cyrix MII) do not set or clear %ecx
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* resulting in stale register contents being returned.
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*/
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static inline void cpuid(unsigned int op,
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unsigned int *eax, unsigned int *ebx,
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unsigned int *ecx, unsigned int *edx)
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{
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*eax = op;
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*ecx = 0;
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__cpuid(eax, ebx, ecx, edx);
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}
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/* Some CPUID calls want 'count' to be placed in ecx */
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static inline void cpuid_count(unsigned int op, int count,
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unsigned int *eax, unsigned int *ebx,
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unsigned int *ecx, unsigned int *edx)
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{
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*eax = op;
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*ecx = count;
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__cpuid(eax, ebx, ecx, edx);
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}
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/*
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* CPUID functions returning a single datum
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*/
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static inline unsigned int cpuid_eax(unsigned int op)
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{
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unsigned int eax, ebx, ecx, edx;
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cpuid(op, &eax, &ebx, &ecx, &edx);
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return eax;
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}
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static inline unsigned int cpuid_ebx(unsigned int op)
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{
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unsigned int eax, ebx, ecx, edx;
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cpuid(op, &eax, &ebx, &ecx, &edx);
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return ebx;
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}
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static inline unsigned int cpuid_ecx(unsigned int op)
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{
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unsigned int eax, ebx, ecx, edx;
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cpuid(op, &eax, &ebx, &ecx, &edx);
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return ecx;
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}
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static inline unsigned int cpuid_edx(unsigned int op)
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{
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unsigned int eax, ebx, ecx, edx;
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cpuid(op, &eax, &ebx, &ecx, &edx);
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return edx;
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}
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#endif
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