514 строки
14 KiB
C
514 строки
14 KiB
C
/*
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* PCIe Native PME support
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*
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* Copyright (C) 2007 - 2009 Intel Corp
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* Copyright (C) 2007 - 2009 Shaohua Li <shaohua.li@intel.com>
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* Copyright (C) 2009 Rafael J. Wysocki <rjw@sisk.pl>, Novell Inc.
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License V2. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/slab.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/device.h>
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#include <linux/pcieport_if.h>
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#include <linux/acpi.h>
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#include <linux/pci-acpi.h>
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#include <linux/pm_runtime.h>
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#include "../../pci.h"
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#include "pcie_pme.h"
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#define PCI_EXP_RTSTA_PME 0x10000 /* PME status */
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#define PCI_EXP_RTSTA_PENDING 0x20000 /* PME pending */
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/*
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* If set, this switch will prevent the PCIe root port PME service driver from
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* being registered. Consequently, the interrupt-based PCIe PME signaling will
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* not be used by any PCIe root ports in that case.
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*/
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static bool pcie_pme_disabled = true;
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/*
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* The PCI Express Base Specification 2.0, Section 6.1.8, states the following:
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* "In order to maintain compatibility with non-PCI Express-aware system
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* software, system power management logic must be configured by firmware to use
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* the legacy mechanism of signaling PME by default. PCI Express-aware system
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* software must notify the firmware prior to enabling native, interrupt-based
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* PME signaling." However, if the platform doesn't provide us with a suitable
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* notification mechanism or the notification fails, it is not clear whether or
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* not we are supposed to use the interrupt-based PCIe PME signaling. The
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* switch below can be used to indicate the desired behaviour. When set, it
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* will make the kernel use the interrupt-based PCIe PME signaling regardless of
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* the platform notification status, although the kernel will attempt to notify
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* the platform anyway. When unset, it will prevent the kernel from using the
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* the interrupt-based PCIe PME signaling if the platform notification fails,
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* which is the default.
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*/
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static bool pcie_pme_force_enable;
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/*
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* If this switch is set, MSI will not be used for PCIe PME signaling. This
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* causes the PCIe port driver to use INTx interrupts only, but it turns out
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* that using MSI for PCIe PME signaling doesn't play well with PCIe PME-based
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* wake-up from system sleep states.
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*/
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bool pcie_pme_msi_disabled;
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static int __init pcie_pme_setup(char *str)
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{
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if (!strncmp(str, "auto", 4))
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pcie_pme_disabled = false;
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else if (!strncmp(str, "force", 5))
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pcie_pme_force_enable = true;
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str = strchr(str, ',');
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if (str) {
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str++;
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str += strspn(str, " \t");
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if (*str && !strcmp(str, "nomsi"))
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pcie_pme_msi_disabled = true;
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}
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return 1;
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}
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__setup("pcie_pme=", pcie_pme_setup);
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/**
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* pcie_pme_platform_setup - Ensure that the kernel controls the PCIe PME.
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* @srv: PCIe PME root port service to use for carrying out the check.
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*
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* Notify the platform that the native PCIe PME is going to be used and return
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* 'true' if the control of the PCIe PME registers has been acquired from the
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* platform.
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*/
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static bool pcie_pme_platform_setup(struct pcie_device *srv)
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{
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if (!pcie_pme_platform_notify(srv))
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return true;
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return pcie_pme_force_enable;
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}
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struct pcie_pme_service_data {
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spinlock_t lock;
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struct pcie_device *srv;
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struct work_struct work;
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bool noirq; /* Don't enable the PME interrupt used by this service. */
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};
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/**
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* pcie_pme_interrupt_enable - Enable/disable PCIe PME interrupt generation.
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* @dev: PCIe root port or event collector.
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* @enable: Enable or disable the interrupt.
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*/
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static void pcie_pme_interrupt_enable(struct pci_dev *dev, bool enable)
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{
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int rtctl_pos;
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u16 rtctl;
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rtctl_pos = pci_pcie_cap(dev) + PCI_EXP_RTCTL;
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pci_read_config_word(dev, rtctl_pos, &rtctl);
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if (enable)
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rtctl |= PCI_EXP_RTCTL_PMEIE;
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else
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rtctl &= ~PCI_EXP_RTCTL_PMEIE;
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pci_write_config_word(dev, rtctl_pos, rtctl);
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}
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/**
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* pcie_pme_clear_status - Clear root port PME interrupt status.
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* @dev: PCIe root port or event collector.
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*/
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static void pcie_pme_clear_status(struct pci_dev *dev)
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{
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int rtsta_pos;
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u32 rtsta;
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rtsta_pos = pci_pcie_cap(dev) + PCI_EXP_RTSTA;
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pci_read_config_dword(dev, rtsta_pos, &rtsta);
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rtsta |= PCI_EXP_RTSTA_PME;
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pci_write_config_dword(dev, rtsta_pos, rtsta);
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}
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/**
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* pcie_pme_walk_bus - Scan a PCI bus for devices asserting PME#.
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* @bus: PCI bus to scan.
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*
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* Scan given PCI bus and all buses under it for devices asserting PME#.
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*/
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static bool pcie_pme_walk_bus(struct pci_bus *bus)
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{
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struct pci_dev *dev;
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bool ret = false;
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list_for_each_entry(dev, &bus->devices, bus_list) {
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/* Skip PCIe devices in case we started from a root port. */
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if (!pci_is_pcie(dev) && pci_check_pme_status(dev)) {
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pm_request_resume(&dev->dev);
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ret = true;
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}
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if (dev->subordinate && pcie_pme_walk_bus(dev->subordinate))
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ret = true;
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}
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return ret;
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}
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/**
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* pcie_pme_from_pci_bridge - Check if PCIe-PCI bridge generated a PME.
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* @bus: Secondary bus of the bridge.
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* @devfn: Device/function number to check.
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*
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* PME from PCI devices under a PCIe-PCI bridge may be converted to an in-band
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* PCIe PME message. In such that case the bridge should use the Requester ID
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* of device/function number 0 on its secondary bus.
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*/
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static bool pcie_pme_from_pci_bridge(struct pci_bus *bus, u8 devfn)
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{
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struct pci_dev *dev;
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bool found = false;
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if (devfn)
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return false;
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dev = pci_dev_get(bus->self);
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if (!dev)
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return false;
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if (pci_is_pcie(dev) && dev->pcie_type == PCI_EXP_TYPE_PCI_BRIDGE) {
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down_read(&pci_bus_sem);
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if (pcie_pme_walk_bus(bus))
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found = true;
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up_read(&pci_bus_sem);
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}
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pci_dev_put(dev);
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return found;
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}
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/**
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* pcie_pme_handle_request - Find device that generated PME and handle it.
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* @port: Root port or event collector that generated the PME interrupt.
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* @req_id: PCIe Requester ID of the device that generated the PME.
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*/
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static void pcie_pme_handle_request(struct pci_dev *port, u16 req_id)
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{
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u8 busnr = req_id >> 8, devfn = req_id & 0xff;
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struct pci_bus *bus;
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struct pci_dev *dev;
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bool found = false;
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/* First, check if the PME is from the root port itself. */
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if (port->devfn == devfn && port->bus->number == busnr) {
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if (pci_check_pme_status(port)) {
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pm_request_resume(&port->dev);
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found = true;
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} else {
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/*
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* Apparently, the root port generated the PME on behalf
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* of a non-PCIe device downstream. If this is done by
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* a root port, the Requester ID field in its status
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* register may contain either the root port's, or the
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* source device's information (PCI Express Base
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* Specification, Rev. 2.0, Section 6.1.9).
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*/
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down_read(&pci_bus_sem);
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found = pcie_pme_walk_bus(port->subordinate);
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up_read(&pci_bus_sem);
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}
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goto out;
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}
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/* Second, find the bus the source device is on. */
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bus = pci_find_bus(pci_domain_nr(port->bus), busnr);
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if (!bus)
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goto out;
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/* Next, check if the PME is from a PCIe-PCI bridge. */
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found = pcie_pme_from_pci_bridge(bus, devfn);
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if (found)
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goto out;
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/* Finally, try to find the PME source on the bus. */
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down_read(&pci_bus_sem);
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list_for_each_entry(dev, &bus->devices, bus_list) {
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pci_dev_get(dev);
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if (dev->devfn == devfn) {
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found = true;
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break;
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}
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pci_dev_put(dev);
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}
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up_read(&pci_bus_sem);
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if (found) {
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/* The device is there, but we have to check its PME status. */
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found = pci_check_pme_status(dev);
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if (found)
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pm_request_resume(&dev->dev);
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pci_dev_put(dev);
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} else if (devfn) {
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/*
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* The device is not there, but we can still try to recover by
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* assuming that the PME was reported by a PCIe-PCI bridge that
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* used devfn different from zero.
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*/
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dev_dbg(&port->dev, "PME interrupt generated for "
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"non-existent device %02x:%02x.%d\n",
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busnr, PCI_SLOT(devfn), PCI_FUNC(devfn));
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found = pcie_pme_from_pci_bridge(bus, 0);
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}
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out:
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if (!found)
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dev_dbg(&port->dev, "Spurious native PME interrupt!\n");
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}
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/**
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* pcie_pme_work_fn - Work handler for PCIe PME interrupt.
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* @work: Work structure giving access to service data.
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*/
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static void pcie_pme_work_fn(struct work_struct *work)
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{
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struct pcie_pme_service_data *data =
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container_of(work, struct pcie_pme_service_data, work);
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struct pci_dev *port = data->srv->port;
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int rtsta_pos;
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u32 rtsta;
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rtsta_pos = pci_pcie_cap(port) + PCI_EXP_RTSTA;
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spin_lock_irq(&data->lock);
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for (;;) {
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if (data->noirq)
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break;
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pci_read_config_dword(port, rtsta_pos, &rtsta);
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if (rtsta & PCI_EXP_RTSTA_PME) {
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/*
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* Clear PME status of the port. If there are other
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* pending PMEs, the status will be set again.
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*/
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pcie_pme_clear_status(port);
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spin_unlock_irq(&data->lock);
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pcie_pme_handle_request(port, rtsta & 0xffff);
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spin_lock_irq(&data->lock);
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continue;
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}
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/* No need to loop if there are no more PMEs pending. */
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if (!(rtsta & PCI_EXP_RTSTA_PENDING))
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break;
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spin_unlock_irq(&data->lock);
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cpu_relax();
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spin_lock_irq(&data->lock);
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}
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if (!data->noirq)
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pcie_pme_interrupt_enable(port, true);
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spin_unlock_irq(&data->lock);
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}
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/**
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* pcie_pme_irq - Interrupt handler for PCIe root port PME interrupt.
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* @irq: Interrupt vector.
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* @context: Interrupt context pointer.
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*/
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static irqreturn_t pcie_pme_irq(int irq, void *context)
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{
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struct pci_dev *port;
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struct pcie_pme_service_data *data;
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int rtsta_pos;
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u32 rtsta;
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unsigned long flags;
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port = ((struct pcie_device *)context)->port;
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data = get_service_data((struct pcie_device *)context);
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rtsta_pos = pci_pcie_cap(port) + PCI_EXP_RTSTA;
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spin_lock_irqsave(&data->lock, flags);
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pci_read_config_dword(port, rtsta_pos, &rtsta);
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if (!(rtsta & PCI_EXP_RTSTA_PME)) {
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spin_unlock_irqrestore(&data->lock, flags);
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return IRQ_NONE;
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}
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pcie_pme_interrupt_enable(port, false);
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spin_unlock_irqrestore(&data->lock, flags);
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/* We don't use pm_wq, because it's freezable. */
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schedule_work(&data->work);
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return IRQ_HANDLED;
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}
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/**
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* pcie_pme_set_native - Set the PME interrupt flag for given device.
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* @dev: PCI device to handle.
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* @ign: Ignored.
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*/
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static int pcie_pme_set_native(struct pci_dev *dev, void *ign)
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{
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dev_info(&dev->dev, "Signaling PME through PCIe PME interrupt\n");
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device_set_run_wake(&dev->dev, true);
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dev->pme_interrupt = true;
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return 0;
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}
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/**
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* pcie_pme_mark_devices - Set the PME interrupt flag for devices below a port.
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* @port: PCIe root port or event collector to handle.
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*
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* For each device below given root port, including the port itself (or for each
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* root complex integrated endpoint if @port is a root complex event collector)
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* set the flag indicating that it can signal run-time wake-up events via PCIe
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* PME interrupts.
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*/
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static void pcie_pme_mark_devices(struct pci_dev *port)
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{
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pcie_pme_set_native(port, NULL);
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if (port->subordinate) {
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pci_walk_bus(port->subordinate, pcie_pme_set_native, NULL);
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} else {
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struct pci_bus *bus = port->bus;
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struct pci_dev *dev;
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/* Check if this is a root port event collector. */
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if (port->pcie_type != PCI_EXP_TYPE_RC_EC || !bus)
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return;
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down_read(&pci_bus_sem);
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list_for_each_entry(dev, &bus->devices, bus_list)
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if (pci_is_pcie(dev)
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&& dev->pcie_type == PCI_EXP_TYPE_RC_END)
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pcie_pme_set_native(dev, NULL);
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up_read(&pci_bus_sem);
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}
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}
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/**
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* pcie_pme_probe - Initialize PCIe PME service for given root port.
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* @srv: PCIe service to initialize.
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*/
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static int pcie_pme_probe(struct pcie_device *srv)
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{
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struct pci_dev *port;
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struct pcie_pme_service_data *data;
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int ret;
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if (!pcie_pme_platform_setup(srv))
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return -EACCES;
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data = kzalloc(sizeof(*data), GFP_KERNEL);
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if (!data)
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return -ENOMEM;
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spin_lock_init(&data->lock);
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INIT_WORK(&data->work, pcie_pme_work_fn);
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data->srv = srv;
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set_service_data(srv, data);
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port = srv->port;
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pcie_pme_interrupt_enable(port, false);
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pcie_pme_clear_status(port);
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ret = request_irq(srv->irq, pcie_pme_irq, IRQF_SHARED, "PCIe PME", srv);
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if (ret) {
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kfree(data);
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} else {
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pcie_pme_mark_devices(port);
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pcie_pme_interrupt_enable(port, true);
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}
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return ret;
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}
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/**
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* pcie_pme_suspend - Suspend PCIe PME service device.
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* @srv: PCIe service device to suspend.
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*/
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static int pcie_pme_suspend(struct pcie_device *srv)
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{
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struct pcie_pme_service_data *data = get_service_data(srv);
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struct pci_dev *port = srv->port;
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spin_lock_irq(&data->lock);
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pcie_pme_interrupt_enable(port, false);
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pcie_pme_clear_status(port);
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data->noirq = true;
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spin_unlock_irq(&data->lock);
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synchronize_irq(srv->irq);
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return 0;
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}
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/**
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* pcie_pme_resume - Resume PCIe PME service device.
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* @srv - PCIe service device to resume.
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*/
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static int pcie_pme_resume(struct pcie_device *srv)
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{
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struct pcie_pme_service_data *data = get_service_data(srv);
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struct pci_dev *port = srv->port;
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spin_lock_irq(&data->lock);
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data->noirq = false;
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pcie_pme_clear_status(port);
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pcie_pme_interrupt_enable(port, true);
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spin_unlock_irq(&data->lock);
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return 0;
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}
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/**
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* pcie_pme_remove - Prepare PCIe PME service device for removal.
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* @srv - PCIe service device to resume.
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*/
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static void pcie_pme_remove(struct pcie_device *srv)
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{
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pcie_pme_suspend(srv);
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free_irq(srv->irq, srv);
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kfree(get_service_data(srv));
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}
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static struct pcie_port_service_driver pcie_pme_driver = {
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.name = "pcie_pme",
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.port_type = PCI_EXP_TYPE_ROOT_PORT,
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.service = PCIE_PORT_SERVICE_PME,
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.probe = pcie_pme_probe,
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.suspend = pcie_pme_suspend,
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.resume = pcie_pme_resume,
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.remove = pcie_pme_remove,
|
|
};
|
|
|
|
/**
|
|
* pcie_pme_service_init - Register the PCIe PME service driver.
|
|
*/
|
|
static int __init pcie_pme_service_init(void)
|
|
{
|
|
return pcie_pme_disabled ?
|
|
-ENODEV : pcie_port_service_register(&pcie_pme_driver);
|
|
}
|
|
|
|
module_init(pcie_pme_service_init);
|