f706abf188
data cache. This issue is found by Guo Ren. Based on the Documentation/core-api/cachetlb.rst and it says: "Any necessary cache flushing or other coherency operations that need to occur should happen here. If the processor's instruction cache does not snoop cpu stores, it is very likely that you will need to flush the instruction cache for copy_to_user_page()." "If the icache does not snoop stores then this routine(flush_icache_range) will need to flush it." Signed-off-by: Guo Ren <ren_guo@c-sky.com> Signed-off-by: Greentime Hu <greentime@andestech.com> |
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| .. | ||
| Makefile | ||
| alignment.c | ||
| cacheflush.c | ||
| extable.c | ||
| fault.c | ||
| highmem.c | ||
| init.c | ||
| ioremap.c | ||
| mm-nds32.c | ||
| mmap.c | ||
| proc.c | ||
| tlb.c | ||