Rabin Vincent f941461c92 ARM: net: bpf: fix zero right shift ... The LSR instruction cannot be used to perform a zero right shift since a 0 as the immediate value (imm5) in the LSR instruction encoding means that a shift of 32 is perfomed. See DecodeIMMShift() in the ARM ARM. Make the JIT skip generation of the LSR if a zero-shift is requested. This was found using american fuzzy lop. Signed-off-by: Rabin Vincent <rabin@rab.in> Acked-by: Alexei Starovoitov <ast@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>		2016-01-06 01:32:09 -05:00
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Makefile	…
bpf_jit_32.c	ARM: net: bpf: fix zero right shift	2016-01-06 01:32:09 -05:00
bpf_jit_32.h	ARM: net: support BPF_ALU | BPF_MOD instructions in the BPF JIT.	2015-10-05 07:02:42 -07:00