653 строки
18 KiB
C
653 строки
18 KiB
C
/*
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* pata_ali.c - ALI 15x3 PATA for new ATA layer
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* (C) 2005 Red Hat Inc
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*
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* based in part upon
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* linux/drivers/ide/pci/alim15x3.c Version 0.17 2003/01/02
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*
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* Copyright (C) 1998-2000 Michel Aubry, Maintainer
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* Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer
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* Copyright (C) 1999-2000 CJ, cjtsai@ali.com.tw, Maintainer
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*
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* Copyright (C) 1998-2000 Andre Hedrick (andre@linux-ide.org)
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* May be copied or modified under the terms of the GNU General Public License
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* Copyright (C) 2002 Alan Cox <alan@redhat.com>
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* ALi (now ULi M5228) support by Clear Zhang <Clear.Zhang@ali.com.tw>
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*
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* Documentation
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* Chipset documentation available under NDA only
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*
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* TODO/CHECK
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* Cannot have ATAPI on both master & slave for rev < c2 (???) but
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* otherwise should do atapi DMA (For now for old we do PIO only for
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* ATAPI)
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* Review Sunblade workaround.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/init.h>
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#include <linux/blkdev.h>
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#include <linux/delay.h>
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#include <scsi/scsi_host.h>
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#include <linux/libata.h>
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#include <linux/dmi.h>
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#define DRV_NAME "pata_ali"
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#define DRV_VERSION "0.7.8"
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static int ali_atapi_dma;
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module_param_named(atapi_dma, ali_atapi_dma, int, 0644);
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MODULE_PARM_DESC(atapi_dma, "Enable ATAPI DMA (0=disable, 1=enable)");
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static struct pci_dev *ali_isa_bridge;
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/*
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* Cable special cases
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*/
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static const struct dmi_system_id cable_dmi_table[] = {
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{
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.ident = "HP Pavilion N5430",
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.matches = {
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DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
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DMI_MATCH(DMI_BOARD_VERSION, "OmniBook N32N-736"),
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},
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},
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{
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.ident = "Toshiba Satellite S1800-814",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
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DMI_MATCH(DMI_PRODUCT_NAME, "S1800-814"),
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},
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},
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{ }
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};
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static int ali_cable_override(struct pci_dev *pdev)
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{
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/* Fujitsu P2000 */
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if (pdev->subsystem_vendor == 0x10CF && pdev->subsystem_device == 0x10AF)
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return 1;
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/* Mitac 8317 (Winbook-A) and relatives */
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if (pdev->subsystem_vendor == 0x1071 && pdev->subsystem_device == 0x8317)
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return 1;
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/* Systems by DMI */
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if (dmi_check_system(cable_dmi_table))
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return 1;
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return 0;
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}
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/**
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* ali_c2_cable_detect - cable detection
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* @ap: ATA port
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*
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* Perform cable detection for C2 and later revisions
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*/
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static int ali_c2_cable_detect(struct ata_port *ap)
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{
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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u8 ata66;
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/* Certain laptops use short but suitable cables and don't
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implement the detect logic */
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if (ali_cable_override(pdev))
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return ATA_CBL_PATA40_SHORT;
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/* Host view cable detect 0x4A bit 0 primary bit 1 secondary
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Bit set for 40 pin */
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pci_read_config_byte(pdev, 0x4A, &ata66);
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if (ata66 & (1 << ap->port_no))
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return ATA_CBL_PATA40;
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else
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return ATA_CBL_PATA80;
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}
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/**
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* ali_20_filter - filter for earlier ALI DMA
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* @adev: ATA device
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* @mask: received mask to manipulate and pass back
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*
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* Ensure that we do not do DMA on CD devices. We may be able to
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* fix that later on. Also ensure we do not do UDMA on WDC drives
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*/
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static unsigned int ali_20_filter(struct ata_device *adev, unsigned int mask)
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{
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char model_num[ATA_ID_PROD_LEN + 1];
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/* No DMA on anything but a disk for now */
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if (adev->class != ATA_DEV_ATA)
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mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
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ata_id_c_string(adev->id, model_num, ATA_ID_PROD, sizeof(model_num));
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if (strstr(model_num, "WDC"))
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mask &= ~ATA_MASK_UDMA;
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return mask;
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}
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/**
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* ali_fifo_control - FIFO manager
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* @ap: ALi channel to control
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* @adev: device for FIFO control
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* @on: 0 for off 1 for on
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*
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* Enable or disable the FIFO on a given device. Because of the way the
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* ALi FIFO works it provides a boost on ATA disk but can be confused by
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* ATAPI and we must therefore manage it.
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*/
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static void ali_fifo_control(struct ata_port *ap, struct ata_device *adev, int on)
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{
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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int pio_fifo = 0x54 + ap->port_no;
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u8 fifo;
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int shift = 4 * adev->devno;
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/* ATA - FIFO on set nibble to 0x05, ATAPI - FIFO off, set nibble to
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0x00. Not all the docs agree but the behaviour we now use is the
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one stated in the BIOS Programming Guide */
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pci_read_config_byte(pdev, pio_fifo, &fifo);
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fifo &= ~(0x0F << shift);
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fifo |= (on << shift);
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pci_write_config_byte(pdev, pio_fifo, fifo);
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}
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/**
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* ali_program_modes - load mode registers
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* @ap: ALi channel to load
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* @adev: Device the timing is for
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* @t: timing data
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* @ultra: UDMA timing or zero for off
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*
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* Loads the timing registers for cmd/data and disable UDMA if
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* ultra is zero. If ultra is set then load and enable the UDMA
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* timing but do not touch the command/data timing.
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*/
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static void ali_program_modes(struct ata_port *ap, struct ata_device *adev, struct ata_timing *t, u8 ultra)
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{
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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int cas = 0x58 + 4 * ap->port_no; /* Command timing */
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int cbt = 0x59 + 4 * ap->port_no; /* Command timing */
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int drwt = 0x5A + 4 * ap->port_no + adev->devno; /* R/W timing */
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int udmat = 0x56 + ap->port_no; /* UDMA timing */
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int shift = 4 * adev->devno;
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u8 udma;
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if (t != NULL) {
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t->setup = clamp_val(t->setup, 1, 8) & 7;
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t->act8b = clamp_val(t->act8b, 1, 8) & 7;
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t->rec8b = clamp_val(t->rec8b, 1, 16) & 15;
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t->active = clamp_val(t->active, 1, 8) & 7;
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t->recover = clamp_val(t->recover, 1, 16) & 15;
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pci_write_config_byte(pdev, cas, t->setup);
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pci_write_config_byte(pdev, cbt, (t->act8b << 4) | t->rec8b);
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pci_write_config_byte(pdev, drwt, (t->active << 4) | t->recover);
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}
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/* Set up the UDMA enable */
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pci_read_config_byte(pdev, udmat, &udma);
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udma &= ~(0x0F << shift);
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udma |= ultra << shift;
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pci_write_config_byte(pdev, udmat, udma);
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}
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/**
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* ali_set_piomode - set initial PIO mode data
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* @ap: ATA interface
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* @adev: ATA device
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*
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* Program the ALi registers for PIO mode.
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*/
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static void ali_set_piomode(struct ata_port *ap, struct ata_device *adev)
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{
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struct ata_device *pair = ata_dev_pair(adev);
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struct ata_timing t;
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unsigned long T = 1000000000 / 33333; /* PCI clock based */
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ata_timing_compute(adev, adev->pio_mode, &t, T, 1);
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if (pair) {
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struct ata_timing p;
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ata_timing_compute(pair, pair->pio_mode, &p, T, 1);
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ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
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if (ata_dma_enabled(pair)) {
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ata_timing_compute(pair, pair->dma_mode, &p, T, 1);
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ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
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}
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}
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/* PIO FIFO is only permitted on ATA disk */
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if (adev->class != ATA_DEV_ATA)
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ali_fifo_control(ap, adev, 0x00);
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ali_program_modes(ap, adev, &t, 0);
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if (adev->class == ATA_DEV_ATA)
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ali_fifo_control(ap, adev, 0x05);
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}
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/**
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* ali_set_dmamode - set initial DMA mode data
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* @ap: ATA interface
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* @adev: ATA device
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*
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* Program the ALi registers for DMA mode.
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*/
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static void ali_set_dmamode(struct ata_port *ap, struct ata_device *adev)
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{
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static u8 udma_timing[7] = { 0xC, 0xB, 0xA, 0x9, 0x8, 0xF, 0xD };
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struct ata_device *pair = ata_dev_pair(adev);
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struct ata_timing t;
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unsigned long T = 1000000000 / 33333; /* PCI clock based */
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struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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if (adev->class == ATA_DEV_ATA)
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ali_fifo_control(ap, adev, 0x08);
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if (adev->dma_mode >= XFER_UDMA_0) {
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ali_program_modes(ap, adev, NULL, udma_timing[adev->dma_mode - XFER_UDMA_0]);
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if (adev->dma_mode >= XFER_UDMA_3) {
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u8 reg4b;
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pci_read_config_byte(pdev, 0x4B, ®4b);
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reg4b |= 1;
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pci_write_config_byte(pdev, 0x4B, reg4b);
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}
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} else {
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ata_timing_compute(adev, adev->dma_mode, &t, T, 1);
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if (pair) {
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struct ata_timing p;
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ata_timing_compute(pair, pair->pio_mode, &p, T, 1);
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ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
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if (ata_dma_enabled(pair)) {
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ata_timing_compute(pair, pair->dma_mode, &p, T, 1);
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ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
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}
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}
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ali_program_modes(ap, adev, &t, 0);
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}
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}
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/**
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* ali_warn_atapi_dma - Warn about ATAPI DMA disablement
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* @adev: Device
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*
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* Whine about ATAPI DMA disablement if @adev is an ATAPI device.
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* Can be used as ->dev_config.
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*/
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static void ali_warn_atapi_dma(struct ata_device *adev)
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{
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struct ata_eh_context *ehc = &adev->link->eh_context;
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int print_info = ehc->i.flags & ATA_EHI_PRINTINFO;
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if (print_info && adev->class == ATA_DEV_ATAPI && !ali_atapi_dma) {
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ata_dev_warn(adev,
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"WARNING: ATAPI DMA disabled for reliability issues. It can be enabled\n");
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ata_dev_warn(adev,
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"WARNING: via pata_ali.atapi_dma modparam or corresponding sysfs node.\n");
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}
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}
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/**
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* ali_lock_sectors - Keep older devices to 255 sector mode
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* @adev: Device
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*
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* Called during the bus probe for each device that is found. We use
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* this call to lock the sector count of the device to 255 or less on
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* older ALi controllers. If we didn't do this then large I/O's would
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* require LBA48 commands which the older ALi requires are issued by
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* slower PIO methods
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*/
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static void ali_lock_sectors(struct ata_device *adev)
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{
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adev->max_sectors = 255;
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ali_warn_atapi_dma(adev);
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}
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/**
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* ali_check_atapi_dma - DMA check for most ALi controllers
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* @qc: Command to complete
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*
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* Called to decide whether commands should be sent by DMA or PIO
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*/
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static int ali_check_atapi_dma(struct ata_queued_cmd *qc)
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{
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if (!ali_atapi_dma) {
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/* FIXME: pata_ali can't do ATAPI DMA reliably but the
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* IDE alim15x3 driver can. I tried lots of things
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* but couldn't find what the actual difference was.
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* If you got an idea, please write it to
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* linux-ide@vger.kernel.org and cc htejun@gmail.com.
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*
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* Disable ATAPI DMA for now.
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*/
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return -EOPNOTSUPP;
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}
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/* If its not a media command, its not worth it */
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if (atapi_cmd_type(qc->cdb[0]) == ATAPI_MISC)
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return -EOPNOTSUPP;
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return 0;
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}
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static void ali_c2_c3_postreset(struct ata_link *link, unsigned int *classes)
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{
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u8 r;
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int port_bit = 4 << link->ap->port_no;
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/* If our bridge is an ALI 1533 then do the extra work */
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if (ali_isa_bridge) {
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/* Tristate and re-enable the bus signals */
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pci_read_config_byte(ali_isa_bridge, 0x58, &r);
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r &= ~port_bit;
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pci_write_config_byte(ali_isa_bridge, 0x58, r);
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r |= port_bit;
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pci_write_config_byte(ali_isa_bridge, 0x58, r);
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}
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ata_sff_postreset(link, classes);
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}
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static const struct scsi_host_template ali_sht = {
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ATA_BMDMA_SHT(DRV_NAME),
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};
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/*
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* Port operations for PIO only ALi
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*/
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static struct ata_port_operations ali_early_port_ops = {
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.inherits = &ata_sff_port_ops,
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.cable_detect = ata_cable_40wire,
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.set_piomode = ali_set_piomode,
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.sff_data_xfer = ata_sff_data_xfer32,
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};
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static const struct ata_port_operations ali_dma_base_ops = {
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.inherits = &ata_bmdma32_port_ops,
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.set_piomode = ali_set_piomode,
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.set_dmamode = ali_set_dmamode,
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};
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/*
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* Port operations for DMA capable ALi without cable
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* detect
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*/
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static struct ata_port_operations ali_20_port_ops = {
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.inherits = &ali_dma_base_ops,
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.cable_detect = ata_cable_40wire,
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.mode_filter = ali_20_filter,
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.check_atapi_dma = ali_check_atapi_dma,
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.dev_config = ali_lock_sectors,
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};
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/*
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* Port operations for DMA capable ALi with cable detect
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*/
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static struct ata_port_operations ali_c2_port_ops = {
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.inherits = &ali_dma_base_ops,
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.check_atapi_dma = ali_check_atapi_dma,
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.cable_detect = ali_c2_cable_detect,
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.dev_config = ali_lock_sectors,
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.postreset = ali_c2_c3_postreset,
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};
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/*
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* Port operations for DMA capable ALi with cable detect
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*/
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static struct ata_port_operations ali_c4_port_ops = {
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.inherits = &ali_dma_base_ops,
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.check_atapi_dma = ali_check_atapi_dma,
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.cable_detect = ali_c2_cable_detect,
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.dev_config = ali_lock_sectors,
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};
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/*
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* Port operations for DMA capable ALi with cable detect and LBA48
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*/
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static struct ata_port_operations ali_c5_port_ops = {
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.inherits = &ali_dma_base_ops,
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.check_atapi_dma = ali_check_atapi_dma,
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.dev_config = ali_warn_atapi_dma,
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.cable_detect = ali_c2_cable_detect,
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};
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/**
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* ali_init_chipset - chip setup function
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* @pdev: PCI device of ATA controller
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*
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* Perform the setup on the device that must be done both at boot
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* and at resume time.
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*/
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static void ali_init_chipset(struct pci_dev *pdev)
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{
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u8 tmp;
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struct pci_dev *north;
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/*
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* The chipset revision selects the driver operations and
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* mode data.
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*/
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if (pdev->revision <= 0x20) {
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pci_read_config_byte(pdev, 0x53, &tmp);
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tmp |= 0x03;
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pci_write_config_byte(pdev, 0x53, tmp);
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} else {
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pci_read_config_byte(pdev, 0x4a, &tmp);
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pci_write_config_byte(pdev, 0x4a, tmp | 0x20);
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pci_read_config_byte(pdev, 0x4B, &tmp);
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if (pdev->revision < 0xC2)
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/* 1543-E/F, 1543C-C, 1543C-D, 1543C-E */
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/* Clear CD-ROM DMA write bit */
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tmp &= 0x7F;
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/* Cable and UDMA */
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if (pdev->revision >= 0xc2)
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tmp |= 0x01;
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pci_write_config_byte(pdev, 0x4B, tmp | 0x08);
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/*
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* CD_ROM DMA on (0x53 bit 0). Enable this even if we want
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* to use PIO. 0x53 bit 1 (rev 20 only) - enable FIFO control
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* via 0x54/55.
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*/
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pci_read_config_byte(pdev, 0x53, &tmp);
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if (pdev->revision >= 0xc7)
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tmp |= 0x03;
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else
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tmp |= 0x01; /* CD_ROM enable for DMA */
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pci_write_config_byte(pdev, 0x53, tmp);
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}
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north = pci_get_domain_bus_and_slot(pci_domain_nr(pdev->bus), 0,
|
|
PCI_DEVFN(0, 0));
|
|
if (north && north->vendor == PCI_VENDOR_ID_AL && ali_isa_bridge) {
|
|
/* Configure the ALi bridge logic. For non ALi rely on BIOS.
|
|
Set the south bridge enable bit */
|
|
pci_read_config_byte(ali_isa_bridge, 0x79, &tmp);
|
|
if (pdev->revision == 0xC2)
|
|
pci_write_config_byte(ali_isa_bridge, 0x79, tmp | 0x04);
|
|
else if (pdev->revision > 0xC2 && pdev->revision < 0xC5)
|
|
pci_write_config_byte(ali_isa_bridge, 0x79, tmp | 0x02);
|
|
}
|
|
pci_dev_put(north);
|
|
ata_pci_bmdma_clear_simplex(pdev);
|
|
}
|
|
/**
|
|
* ali_init_one - discovery callback
|
|
* @pdev: PCI device ID
|
|
* @id: PCI table info
|
|
*
|
|
* An ALi IDE interface has been discovered. Figure out what revision
|
|
* and perform configuration work before handing it to the ATA layer
|
|
*/
|
|
|
|
static int ali_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
|
|
{
|
|
static const struct ata_port_info info_early = {
|
|
.flags = ATA_FLAG_SLAVE_POSS,
|
|
.pio_mask = ATA_PIO4,
|
|
.port_ops = &ali_early_port_ops
|
|
};
|
|
/* Revision 0x20 added DMA */
|
|
static const struct ata_port_info info_20 = {
|
|
.flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48 |
|
|
ATA_FLAG_IGN_SIMPLEX,
|
|
.pio_mask = ATA_PIO4,
|
|
.mwdma_mask = ATA_MWDMA2,
|
|
.port_ops = &ali_20_port_ops
|
|
};
|
|
/* Revision 0x20 with support logic added UDMA */
|
|
static const struct ata_port_info info_20_udma = {
|
|
.flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48 |
|
|
ATA_FLAG_IGN_SIMPLEX,
|
|
.pio_mask = ATA_PIO4,
|
|
.mwdma_mask = ATA_MWDMA2,
|
|
.udma_mask = ATA_UDMA2,
|
|
.port_ops = &ali_20_port_ops
|
|
};
|
|
/* Revision 0xC2 adds UDMA66 */
|
|
static const struct ata_port_info info_c2 = {
|
|
.flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48 |
|
|
ATA_FLAG_IGN_SIMPLEX,
|
|
.pio_mask = ATA_PIO4,
|
|
.mwdma_mask = ATA_MWDMA2,
|
|
.udma_mask = ATA_UDMA4,
|
|
.port_ops = &ali_c2_port_ops
|
|
};
|
|
/* Revision 0xC3 is UDMA66 for now */
|
|
static const struct ata_port_info info_c3 = {
|
|
.flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48 |
|
|
ATA_FLAG_IGN_SIMPLEX,
|
|
.pio_mask = ATA_PIO4,
|
|
.mwdma_mask = ATA_MWDMA2,
|
|
.udma_mask = ATA_UDMA4,
|
|
.port_ops = &ali_c2_port_ops
|
|
};
|
|
/* Revision 0xC4 is UDMA100 */
|
|
static const struct ata_port_info info_c4 = {
|
|
.flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_PIO_LBA48 |
|
|
ATA_FLAG_IGN_SIMPLEX,
|
|
.pio_mask = ATA_PIO4,
|
|
.mwdma_mask = ATA_MWDMA2,
|
|
.udma_mask = ATA_UDMA5,
|
|
.port_ops = &ali_c4_port_ops
|
|
};
|
|
/* Revision 0xC5 is UDMA133 with LBA48 DMA */
|
|
static const struct ata_port_info info_c5 = {
|
|
.flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_IGN_SIMPLEX,
|
|
.pio_mask = ATA_PIO4,
|
|
.mwdma_mask = ATA_MWDMA2,
|
|
.udma_mask = ATA_UDMA6,
|
|
.port_ops = &ali_c5_port_ops
|
|
};
|
|
|
|
const struct ata_port_info *ppi[] = { NULL, NULL };
|
|
u8 tmp;
|
|
int rc;
|
|
|
|
rc = pcim_enable_device(pdev);
|
|
if (rc)
|
|
return rc;
|
|
|
|
/*
|
|
* The chipset revision selects the driver operations and
|
|
* mode data.
|
|
*/
|
|
|
|
if (pdev->revision < 0x20) {
|
|
ppi[0] = &info_early;
|
|
} else if (pdev->revision < 0xC2) {
|
|
ppi[0] = &info_20;
|
|
} else if (pdev->revision == 0xC2) {
|
|
ppi[0] = &info_c2;
|
|
} else if (pdev->revision == 0xC3) {
|
|
ppi[0] = &info_c3;
|
|
} else if (pdev->revision == 0xC4) {
|
|
ppi[0] = &info_c4;
|
|
} else
|
|
ppi[0] = &info_c5;
|
|
|
|
ali_init_chipset(pdev);
|
|
|
|
if (ali_isa_bridge && pdev->revision >= 0x20 && pdev->revision < 0xC2) {
|
|
/* Are we paired with a UDMA capable chip */
|
|
pci_read_config_byte(ali_isa_bridge, 0x5E, &tmp);
|
|
if ((tmp & 0x1E) == 0x12)
|
|
ppi[0] = &info_20_udma;
|
|
}
|
|
|
|
if (!ppi[0]->mwdma_mask && !ppi[0]->udma_mask)
|
|
return ata_pci_sff_init_one(pdev, ppi, &ali_sht, NULL, 0);
|
|
else
|
|
return ata_pci_bmdma_init_one(pdev, ppi, &ali_sht, NULL, 0);
|
|
}
|
|
|
|
#ifdef CONFIG_PM_SLEEP
|
|
static int ali_reinit_one(struct pci_dev *pdev)
|
|
{
|
|
struct ata_host *host = pci_get_drvdata(pdev);
|
|
int rc;
|
|
|
|
rc = ata_pci_device_do_resume(pdev);
|
|
if (rc)
|
|
return rc;
|
|
ali_init_chipset(pdev);
|
|
ata_host_resume(host);
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
static const struct pci_device_id ali[] = {
|
|
{ PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5228), },
|
|
{ PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5229), },
|
|
|
|
{ },
|
|
};
|
|
|
|
static struct pci_driver ali_pci_driver = {
|
|
.name = DRV_NAME,
|
|
.id_table = ali,
|
|
.probe = ali_init_one,
|
|
.remove = ata_pci_remove_one,
|
|
#ifdef CONFIG_PM_SLEEP
|
|
.suspend = ata_pci_device_suspend,
|
|
.resume = ali_reinit_one,
|
|
#endif
|
|
};
|
|
|
|
static int __init ali_init(void)
|
|
{
|
|
int ret;
|
|
ali_isa_bridge = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL);
|
|
|
|
ret = pci_register_driver(&ali_pci_driver);
|
|
if (ret < 0)
|
|
pci_dev_put(ali_isa_bridge);
|
|
return ret;
|
|
}
|
|
|
|
|
|
static void __exit ali_exit(void)
|
|
{
|
|
pci_unregister_driver(&ali_pci_driver);
|
|
pci_dev_put(ali_isa_bridge);
|
|
}
|
|
|
|
|
|
MODULE_AUTHOR("Alan Cox");
|
|
MODULE_DESCRIPTION("low-level driver for ALi PATA");
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_DEVICE_TABLE(pci, ali);
|
|
MODULE_VERSION(DRV_VERSION);
|
|
|
|
module_init(ali_init);
|
|
module_exit(ali_exit);
|