280 строки
8.5 KiB
C
280 строки
8.5 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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// Loongson SPI Support
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// Copyright (C) 2023 Loongson Technology Corporation Limited
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/iopoll.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/spi/spi.h>
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#include "spi-loongson.h"
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static inline void loongson_spi_write_reg(struct loongson_spi *spi, unsigned char reg,
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unsigned char data)
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{
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writeb(data, spi->base + reg);
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}
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static inline char loongson_spi_read_reg(struct loongson_spi *spi, unsigned char reg)
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{
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return readb(spi->base + reg);
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}
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static void loongson_spi_set_cs(struct spi_device *spi, bool en)
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{
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int cs;
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unsigned char mask = (BIT(4) | BIT(0)) << spi_get_chipselect(spi, 0);
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unsigned char val = en ? mask : (BIT(0) << spi_get_chipselect(spi, 0));
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struct loongson_spi *loongson_spi = spi_controller_get_devdata(spi->controller);
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cs = loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_SFCS_REG) & ~mask;
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loongson_spi_write_reg(loongson_spi, LOONGSON_SPI_SFCS_REG, val | cs);
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}
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static void loongson_spi_set_clk(struct loongson_spi *loongson_spi, unsigned int hz)
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{
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unsigned char val;
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unsigned int div, div_tmp;
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static const char rdiv[12] = {0, 1, 4, 2, 3, 5, 6, 7, 8, 9, 10, 11};
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div = clamp_val(DIV_ROUND_UP_ULL(loongson_spi->clk_rate, hz), 2, 4096);
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div_tmp = rdiv[fls(div - 1)];
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loongson_spi->spcr = (div_tmp & GENMASK(1, 0)) >> 0;
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loongson_spi->sper = (div_tmp & GENMASK(3, 2)) >> 2;
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val = loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_SPCR_REG);
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val &= ~GENMASK(1, 0);
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loongson_spi_write_reg(loongson_spi, LOONGSON_SPI_SPCR_REG, val |
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loongson_spi->spcr);
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val = loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_SPER_REG);
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val &= ~GENMASK(1, 0);
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loongson_spi_write_reg(loongson_spi, LOONGSON_SPI_SPER_REG, val |
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loongson_spi->sper);
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loongson_spi->hz = hz;
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}
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static void loongson_spi_set_mode(struct loongson_spi *loongson_spi,
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struct spi_device *spi)
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{
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unsigned char val;
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val = loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_SPCR_REG);
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val &= ~(LOONGSON_SPI_SPCR_CPOL | LOONGSON_SPI_SPCR_CPHA);
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if (spi->mode & SPI_CPOL)
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val |= LOONGSON_SPI_SPCR_CPOL;
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if (spi->mode & SPI_CPHA)
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val |= LOONGSON_SPI_SPCR_CPHA;
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loongson_spi_write_reg(loongson_spi, LOONGSON_SPI_SPCR_REG, val);
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loongson_spi->mode |= spi->mode;
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}
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static int loongson_spi_update_state(struct loongson_spi *loongson_spi,
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struct spi_device *spi, struct spi_transfer *t)
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{
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if (t && loongson_spi->hz != t->speed_hz)
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loongson_spi_set_clk(loongson_spi, t->speed_hz);
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if ((spi->mode ^ loongson_spi->mode) & SPI_MODE_X_MASK)
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loongson_spi_set_mode(loongson_spi, spi);
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return 0;
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}
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static int loongson_spi_setup(struct spi_device *spi)
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{
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struct loongson_spi *loongson_spi;
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loongson_spi = spi_controller_get_devdata(spi->controller);
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if (spi->bits_per_word % 8)
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return -EINVAL;
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if (spi_get_chipselect(spi, 0) >= spi->controller->num_chipselect)
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return -EINVAL;
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loongson_spi->hz = 0;
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loongson_spi_set_cs(spi, true);
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return 0;
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}
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static int loongson_spi_write_read_8bit(struct spi_device *spi, const u8 **tx_buf,
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u8 **rx_buf, unsigned int num)
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{
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int ret;
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struct loongson_spi *loongson_spi = spi_controller_get_devdata(spi->controller);
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if (tx_buf && *tx_buf)
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loongson_spi_write_reg(loongson_spi, LOONGSON_SPI_FIFO_REG, *((*tx_buf)++));
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else
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loongson_spi_write_reg(loongson_spi, LOONGSON_SPI_FIFO_REG, 0);
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ret = readb_poll_timeout(loongson_spi->base + LOONGSON_SPI_SPSR_REG,
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loongson_spi->spsr, (loongson_spi->spsr &
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LOONGSON_SPI_SPSR_RFEMPTY) != LOONGSON_SPI_SPSR_RFEMPTY,
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1, USEC_PER_MSEC);
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if (rx_buf && *rx_buf)
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*(*rx_buf)++ = loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_FIFO_REG);
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else
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loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_FIFO_REG);
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return ret;
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}
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static int loongson_spi_write_read(struct spi_device *spi, struct spi_transfer *xfer)
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{
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int ret;
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unsigned int count;
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const u8 *tx = xfer->tx_buf;
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u8 *rx = xfer->rx_buf;
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count = xfer->len;
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do {
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ret = loongson_spi_write_read_8bit(spi, &tx, &rx, count);
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if (ret)
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break;
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} while (--count);
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return ret;
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}
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static int loongson_spi_prepare_message(struct spi_controller *ctlr, struct spi_message *m)
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{
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struct loongson_spi *loongson_spi = spi_controller_get_devdata(ctlr);
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loongson_spi->para = loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_PARA_REG);
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loongson_spi_write_reg(loongson_spi, LOONGSON_SPI_PARA_REG, loongson_spi->para &
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~LOONGSON_SPI_PARA_MEM_EN);
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return 0;
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}
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static int loongson_spi_transfer_one(struct spi_controller *ctrl, struct spi_device *spi,
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struct spi_transfer *xfer)
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{
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struct loongson_spi *loongson_spi = spi_controller_get_devdata(spi->controller);
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loongson_spi_update_state(loongson_spi, spi, xfer);
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if (xfer->len)
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return loongson_spi_write_read(spi, xfer);
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return 0;
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}
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static int loongson_spi_unprepare_message(struct spi_controller *ctrl, struct spi_message *m)
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{
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struct loongson_spi *loongson_spi = spi_controller_get_devdata(ctrl);
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loongson_spi_write_reg(loongson_spi, LOONGSON_SPI_PARA_REG, loongson_spi->para);
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return 0;
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}
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static void loongson_spi_reginit(struct loongson_spi *loongson_spi_dev)
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{
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unsigned char val;
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val = loongson_spi_read_reg(loongson_spi_dev, LOONGSON_SPI_SPCR_REG);
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val &= ~LOONGSON_SPI_SPCR_SPE;
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loongson_spi_write_reg(loongson_spi_dev, LOONGSON_SPI_SPCR_REG, val);
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loongson_spi_write_reg(loongson_spi_dev, LOONGSON_SPI_SPSR_REG,
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(LOONGSON_SPI_SPSR_SPIF | LOONGSON_SPI_SPSR_WCOL));
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val = loongson_spi_read_reg(loongson_spi_dev, LOONGSON_SPI_SPCR_REG);
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val |= LOONGSON_SPI_SPCR_SPE;
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loongson_spi_write_reg(loongson_spi_dev, LOONGSON_SPI_SPCR_REG, val);
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}
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int loongson_spi_init_controller(struct device *dev, void __iomem *regs)
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{
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struct spi_controller *controller;
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struct loongson_spi *spi;
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struct clk *clk;
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controller = devm_spi_alloc_host(dev, sizeof(struct loongson_spi));
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if (controller == NULL)
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return -ENOMEM;
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controller->mode_bits = SPI_MODE_X_MASK | SPI_CS_HIGH;
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controller->setup = loongson_spi_setup;
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controller->prepare_message = loongson_spi_prepare_message;
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controller->transfer_one = loongson_spi_transfer_one;
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controller->unprepare_message = loongson_spi_unprepare_message;
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controller->set_cs = loongson_spi_set_cs;
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controller->num_chipselect = 4;
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device_set_node(&controller->dev, dev_fwnode(dev));
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dev_set_drvdata(dev, controller);
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spi = spi_controller_get_devdata(controller);
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spi->base = regs;
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spi->controller = controller;
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clk = devm_clk_get_optional(dev, NULL);
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if (IS_ERR(clk))
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return dev_err_probe(dev, PTR_ERR(clk), "unable to get clock\n");
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spi->clk_rate = clk_get_rate(clk);
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loongson_spi_reginit(spi);
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spi->mode = 0;
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return devm_spi_register_controller(dev, controller);
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}
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EXPORT_SYMBOL_NS_GPL(loongson_spi_init_controller, SPI_LOONGSON_CORE);
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static int __maybe_unused loongson_spi_suspend(struct device *dev)
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{
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struct loongson_spi *loongson_spi;
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struct spi_controller *controller;
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controller = dev_get_drvdata(dev);
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spi_controller_suspend(controller);
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loongson_spi = spi_controller_get_devdata(controller);
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loongson_spi->spcr = loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_SPCR_REG);
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loongson_spi->sper = loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_SPER_REG);
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loongson_spi->spsr = loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_SPSR_REG);
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loongson_spi->para = loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_PARA_REG);
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loongson_spi->sfcs = loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_SFCS_REG);
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loongson_spi->timi = loongson_spi_read_reg(loongson_spi, LOONGSON_SPI_TIMI_REG);
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return 0;
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}
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static int __maybe_unused loongson_spi_resume(struct device *dev)
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{
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struct loongson_spi *loongson_spi;
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struct spi_controller *controller;
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controller = dev_get_drvdata(dev);
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loongson_spi = spi_controller_get_devdata(controller);
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loongson_spi_write_reg(loongson_spi, LOONGSON_SPI_SPCR_REG, loongson_spi->spcr);
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loongson_spi_write_reg(loongson_spi, LOONGSON_SPI_SPER_REG, loongson_spi->sper);
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loongson_spi_write_reg(loongson_spi, LOONGSON_SPI_SPSR_REG, loongson_spi->spsr);
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loongson_spi_write_reg(loongson_spi, LOONGSON_SPI_PARA_REG, loongson_spi->para);
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loongson_spi_write_reg(loongson_spi, LOONGSON_SPI_SFCS_REG, loongson_spi->sfcs);
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loongson_spi_write_reg(loongson_spi, LOONGSON_SPI_TIMI_REG, loongson_spi->timi);
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spi_controller_resume(controller);
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return 0;
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}
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const struct dev_pm_ops loongson_spi_dev_pm_ops = {
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.suspend = loongson_spi_suspend,
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.resume = loongson_spi_resume,
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};
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EXPORT_SYMBOL_NS_GPL(loongson_spi_dev_pm_ops, SPI_LOONGSON_CORE);
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MODULE_DESCRIPTION("Loongson SPI core driver");
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MODULE_LICENSE("GPL");
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