425 строки
9.7 KiB
C
425 строки
9.7 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
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*
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* RajeshwarR: Dec 11, 2007
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* -- Added support for Inter Processor Interrupts
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*
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* Vineetg: Nov 1st, 2007
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* -- Initial Write (Borrowed heavily from ARM)
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*/
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#include <linux/spinlock.h>
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#include <linux/sched/mm.h>
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#include <linux/interrupt.h>
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#include <linux/profile.h>
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#include <linux/mm.h>
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#include <linux/cpu.h>
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#include <linux/irq.h>
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#include <linux/atomic.h>
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#include <linux/cpumask.h>
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#include <linux/reboot.h>
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#include <linux/irqdomain.h>
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#include <linux/export.h>
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#include <linux/of_fdt.h>
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#include <asm/processor.h>
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#include <asm/setup.h>
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#include <asm/mach_desc.h>
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#ifndef CONFIG_ARC_HAS_LLSC
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arch_spinlock_t smp_atomic_ops_lock = __ARCH_SPIN_LOCK_UNLOCKED;
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arch_spinlock_t smp_bitops_lock = __ARCH_SPIN_LOCK_UNLOCKED;
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EXPORT_SYMBOL_GPL(smp_atomic_ops_lock);
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EXPORT_SYMBOL_GPL(smp_bitops_lock);
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#endif
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struct plat_smp_ops __weak plat_smp_ops;
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/* XXX: per cpu ? Only needed once in early seconday boot */
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struct task_struct *secondary_idle_tsk;
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/* Called from start_kernel */
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void __init smp_prepare_boot_cpu(void)
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{
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}
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static int __init arc_get_cpu_map(const char *name, struct cpumask *cpumask)
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{
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unsigned long dt_root = of_get_flat_dt_root();
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const char *buf;
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buf = of_get_flat_dt_prop(dt_root, name, NULL);
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if (!buf)
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return -EINVAL;
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if (cpulist_parse(buf, cpumask))
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return -EINVAL;
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return 0;
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}
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/*
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* Read from DeviceTree and setup cpu possible mask. If there is no
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* "possible-cpus" property in DeviceTree pretend all [0..NR_CPUS-1] exist.
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*/
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static void __init arc_init_cpu_possible(void)
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{
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struct cpumask cpumask;
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if (arc_get_cpu_map("possible-cpus", &cpumask)) {
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pr_warn("Failed to get possible-cpus from dtb, pretending all %u cpus exist\n",
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NR_CPUS);
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cpumask_setall(&cpumask);
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}
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if (!cpumask_test_cpu(0, &cpumask))
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panic("Master cpu (cpu[0]) is missed in cpu possible mask!");
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init_cpu_possible(&cpumask);
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}
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/*
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* Called from setup_arch() before calling setup_processor()
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*
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* - Initialise the CPU possible map early - this describes the CPUs
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* which may be present or become present in the system.
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* - Call early smp init hook. This can initialize a specific multi-core
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* IP which is say common to several platforms (hence not part of
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* platform specific int_early() hook)
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*/
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void __init smp_init_cpus(void)
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{
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arc_init_cpu_possible();
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if (plat_smp_ops.init_early_smp)
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plat_smp_ops.init_early_smp();
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}
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/* called from init ( ) => process 1 */
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void __init smp_prepare_cpus(unsigned int max_cpus)
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{
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/*
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* if platform didn't set the present map already, do it now
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* boot cpu is set to present already by init/main.c
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*/
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if (num_present_cpus() <= 1)
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init_cpu_present(cpu_possible_mask);
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}
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void __init smp_cpus_done(unsigned int max_cpus)
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{
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}
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/*
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* Default smp boot helper for Run-on-reset case where all cores start off
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* together. Non-masters need to wait for Master to start running.
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* This is implemented using a flag in memory, which Non-masters spin-wait on.
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* Master sets it to cpu-id of core to "ungate" it.
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*/
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static volatile int wake_flag;
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#ifdef CONFIG_ISA_ARCOMPACT
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#define __boot_read(f) f
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#define __boot_write(f, v) f = v
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#else
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#define __boot_read(f) arc_read_uncached_32(&f)
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#define __boot_write(f, v) arc_write_uncached_32(&f, v)
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#endif
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static void arc_default_smp_cpu_kick(int cpu, unsigned long pc)
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{
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BUG_ON(cpu == 0);
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__boot_write(wake_flag, cpu);
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}
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void arc_platform_smp_wait_to_boot(int cpu)
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{
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/* for halt-on-reset, we've waited already */
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if (IS_ENABLED(CONFIG_ARC_SMP_HALT_ON_RESET))
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return;
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while (__boot_read(wake_flag) != cpu)
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;
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__boot_write(wake_flag, 0);
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}
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const char *arc_platform_smp_cpuinfo(void)
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{
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return plat_smp_ops.info ? : "";
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}
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/*
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* The very first "C" code executed by secondary
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* Called from asm stub in head.S
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* "current"/R25 already setup by low level boot code
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*/
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void start_kernel_secondary(void)
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{
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struct mm_struct *mm = &init_mm;
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unsigned int cpu = smp_processor_id();
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/* MMU, Caches, Vector Table, Interrupts etc */
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setup_processor();
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mmget(mm);
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mmgrab(mm);
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current->active_mm = mm;
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cpumask_set_cpu(cpu, mm_cpumask(mm));
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/* Some SMP H/w setup - for each cpu */
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if (plat_smp_ops.init_per_cpu)
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plat_smp_ops.init_per_cpu(cpu);
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if (machine_desc->init_per_cpu)
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machine_desc->init_per_cpu(cpu);
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notify_cpu_starting(cpu);
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set_cpu_online(cpu, true);
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pr_info("## CPU%u LIVE ##: Executing Code...\n", cpu);
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local_irq_enable();
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preempt_disable();
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cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
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}
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/*
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* Called from kernel_init( ) -> smp_init( ) - for each CPU
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*
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* At this point, Secondary Processor is "HALT"ed:
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* -It booted, but was halted in head.S
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* -It was configured to halt-on-reset
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* So need to wake it up.
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*
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* Essential requirements being where to run from (PC) and stack (SP)
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*/
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int __cpu_up(unsigned int cpu, struct task_struct *idle)
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{
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unsigned long wait_till;
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secondary_idle_tsk = idle;
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pr_info("Idle Task [%d] %p", cpu, idle);
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pr_info("Trying to bring up CPU%u ...\n", cpu);
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if (plat_smp_ops.cpu_kick)
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plat_smp_ops.cpu_kick(cpu,
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(unsigned long)first_lines_of_secondary);
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else
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arc_default_smp_cpu_kick(cpu, (unsigned long)NULL);
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/* wait for 1 sec after kicking the secondary */
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wait_till = jiffies + HZ;
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while (time_before(jiffies, wait_till)) {
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if (cpu_online(cpu))
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break;
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}
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if (!cpu_online(cpu)) {
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pr_info("Timeout: CPU%u FAILED to come up !!!\n", cpu);
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return -1;
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}
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secondary_idle_tsk = NULL;
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return 0;
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}
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/*
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* not supported here
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*/
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int setup_profiling_timer(unsigned int multiplier)
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{
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return -EINVAL;
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}
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/*****************************************************************************/
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/* Inter Processor Interrupt Handling */
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/*****************************************************************************/
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enum ipi_msg_type {
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IPI_EMPTY = 0,
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IPI_RESCHEDULE = 1,
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IPI_CALL_FUNC,
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IPI_CPU_STOP,
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};
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/*
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* In arches with IRQ for each msg type (above), receiver can use IRQ-id to
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* figure out what msg was sent. For those which don't (ARC has dedicated IPI
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* IRQ), the msg-type needs to be conveyed via per-cpu data
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*/
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static DEFINE_PER_CPU(unsigned long, ipi_data);
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static void ipi_send_msg_one(int cpu, enum ipi_msg_type msg)
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{
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unsigned long __percpu *ipi_data_ptr = per_cpu_ptr(&ipi_data, cpu);
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unsigned long old, new;
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unsigned long flags;
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pr_debug("%d Sending msg [%d] to %d\n", smp_processor_id(), msg, cpu);
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local_irq_save(flags);
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/*
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* Atomically write new msg bit (in case others are writing too),
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* and read back old value
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*/
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do {
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new = old = READ_ONCE(*ipi_data_ptr);
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new |= 1U << msg;
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} while (cmpxchg(ipi_data_ptr, old, new) != old);
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/*
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* Call the platform specific IPI kick function, but avoid if possible:
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* Only do so if there's no pending msg from other concurrent sender(s).
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* Otherwise, recevier will see this msg as well when it takes the
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* IPI corresponding to that msg. This is true, even if it is already in
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* IPI handler, because !@old means it has not yet dequeued the msg(s)
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* so @new msg can be a free-loader
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*/
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if (plat_smp_ops.ipi_send && !old)
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plat_smp_ops.ipi_send(cpu);
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local_irq_restore(flags);
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}
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static void ipi_send_msg(const struct cpumask *callmap, enum ipi_msg_type msg)
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{
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unsigned int cpu;
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for_each_cpu(cpu, callmap)
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ipi_send_msg_one(cpu, msg);
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}
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void smp_send_reschedule(int cpu)
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{
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ipi_send_msg_one(cpu, IPI_RESCHEDULE);
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}
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void smp_send_stop(void)
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{
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struct cpumask targets;
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cpumask_copy(&targets, cpu_online_mask);
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cpumask_clear_cpu(smp_processor_id(), &targets);
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ipi_send_msg(&targets, IPI_CPU_STOP);
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}
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void arch_send_call_function_single_ipi(int cpu)
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{
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ipi_send_msg_one(cpu, IPI_CALL_FUNC);
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}
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void arch_send_call_function_ipi_mask(const struct cpumask *mask)
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{
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ipi_send_msg(mask, IPI_CALL_FUNC);
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}
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/*
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* ipi_cpu_stop - handle IPI from smp_send_stop()
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*/
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static void ipi_cpu_stop(void)
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{
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machine_halt();
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}
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static inline int __do_IPI(unsigned long msg)
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{
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int rc = 0;
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switch (msg) {
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case IPI_RESCHEDULE:
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scheduler_ipi();
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break;
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case IPI_CALL_FUNC:
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generic_smp_call_function_interrupt();
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break;
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case IPI_CPU_STOP:
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ipi_cpu_stop();
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break;
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default:
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rc = 1;
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}
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return rc;
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}
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/*
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* arch-common ISR to handle for inter-processor interrupts
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* Has hooks for platform specific IPI
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*/
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irqreturn_t do_IPI(int irq, void *dev_id)
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{
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unsigned long pending;
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unsigned long __maybe_unused copy;
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pr_debug("IPI [%ld] received on cpu %d\n",
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*this_cpu_ptr(&ipi_data), smp_processor_id());
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if (plat_smp_ops.ipi_clear)
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plat_smp_ops.ipi_clear(irq);
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/*
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* "dequeue" the msg corresponding to this IPI (and possibly other
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* piggybacked msg from elided IPIs: see ipi_send_msg_one() above)
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*/
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copy = pending = xchg(this_cpu_ptr(&ipi_data), 0);
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do {
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unsigned long msg = __ffs(pending);
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int rc;
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rc = __do_IPI(msg);
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if (rc)
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pr_info("IPI with bogus msg %ld in %ld\n", msg, copy);
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pending &= ~(1U << msg);
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} while (pending);
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return IRQ_HANDLED;
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}
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/*
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* API called by platform code to hookup arch-common ISR to their IPI IRQ
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*
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* Note: If IPI is provided by platform (vs. say ARC MCIP), their intc setup/map
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* function needs to call call irq_set_percpu_devid() for IPI IRQ, otherwise
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* request_percpu_irq() below will fail
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*/
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static DEFINE_PER_CPU(int, ipi_dev);
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int smp_ipi_irq_setup(int cpu, irq_hw_number_t hwirq)
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{
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int *dev = per_cpu_ptr(&ipi_dev, cpu);
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unsigned int virq = irq_find_mapping(NULL, hwirq);
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if (!virq)
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panic("Cannot find virq for root domain and hwirq=%lu", hwirq);
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/* Boot cpu calls request, all call enable */
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if (!cpu) {
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int rc;
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rc = request_percpu_irq(virq, do_IPI, "IPI Interrupt", dev);
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if (rc)
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panic("Percpu IRQ request failed for %u\n", virq);
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}
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enable_percpu_irq(virq, 0);
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return 0;
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}
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