783 строки
18 KiB
C
783 строки
18 KiB
C
/*
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* linux/drivers/serial/uart00.c
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*
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* Driver for UART00 serial ports
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*
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* Based on drivers/char/serial_amba.c, by ARM Limited &
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* Deep Blue Solutions Ltd.
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* Copyright 2001 Altera Corporation
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*
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* Update for 2.6.4 by Dirk Behme <dirk.behme@de.bosch.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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* $Id: uart00.c,v 1.35 2002/07/28 10:03:28 rmk Exp $
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*
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*/
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#include <linux/config.h>
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#if defined(CONFIG_SERIAL_UART00_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
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#define SUPPORT_SYSRQ
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#endif
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#include <linux/module.h>
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#include <linux/ioport.h>
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#include <linux/init.h>
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#include <linux/console.h>
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#include <linux/sysrq.h>
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#include <linux/tty.h>
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#include <linux/tty_flip.h>
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#include <linux/serial_core.h>
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#include <linux/serial.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/sizes.h>
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#include <asm/arch/excalibur.h>
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#define UART00_TYPE (volatile unsigned int*)
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#include <asm/arch/uart00.h>
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#include <asm/arch/int_ctrl00.h>
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#define UART_NR 2
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#define SERIAL_UART00_NAME "ttyUA"
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#define SERIAL_UART00_MAJOR 204
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#define SERIAL_UART00_MINOR 16 /* Temporary - will change in future */
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#define SERIAL_UART00_NR UART_NR
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#define UART_PORT_SIZE 0x50
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#define UART00_ISR_PASS_LIMIT 256
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/*
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* Access macros for the UART00 UARTs
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*/
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#define UART_GET_INT_STATUS(p) inl(UART_ISR((p)->membase))
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#define UART_PUT_IES(p, c) outl(c,UART_IES((p)->membase))
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#define UART_GET_IES(p) inl(UART_IES((p)->membase))
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#define UART_PUT_IEC(p, c) outl(c,UART_IEC((p)->membase))
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#define UART_GET_IEC(p) inl(UART_IEC((p)->membase))
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#define UART_PUT_CHAR(p, c) outl(c,UART_TD((p)->membase))
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#define UART_GET_CHAR(p) inl(UART_RD((p)->membase))
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#define UART_GET_RSR(p) inl(UART_RSR((p)->membase))
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#define UART_GET_RDS(p) inl(UART_RDS((p)->membase))
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#define UART_GET_MSR(p) inl(UART_MSR((p)->membase))
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#define UART_GET_MCR(p) inl(UART_MCR((p)->membase))
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#define UART_PUT_MCR(p, c) outl(c,UART_MCR((p)->membase))
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#define UART_GET_MC(p) inl(UART_MC((p)->membase))
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#define UART_PUT_MC(p, c) outl(c,UART_MC((p)->membase))
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#define UART_GET_TSR(p) inl(UART_TSR((p)->membase))
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#define UART_GET_DIV_HI(p) inl(UART_DIV_HI((p)->membase))
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#define UART_PUT_DIV_HI(p,c) outl(c,UART_DIV_HI((p)->membase))
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#define UART_GET_DIV_LO(p) inl(UART_DIV_LO((p)->membase))
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#define UART_PUT_DIV_LO(p,c) outl(c,UART_DIV_LO((p)->membase))
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#define UART_RX_DATA(s) ((s) & UART_RSR_RX_LEVEL_MSK)
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#define UART_TX_READY(s) (((s) & UART_TSR_TX_LEVEL_MSK) < 15)
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//#define UART_TX_EMPTY(p) ((UART_GET_FR(p) & UART00_UARTFR_TMSK) == 0)
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static void uart00_stop_tx(struct uart_port *port, unsigned int tty_stop)
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{
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UART_PUT_IEC(port, UART_IEC_TIE_MSK);
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}
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static void uart00_stop_rx(struct uart_port *port)
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{
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UART_PUT_IEC(port, UART_IEC_RE_MSK);
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}
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static void uart00_enable_ms(struct uart_port *port)
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{
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UART_PUT_IES(port, UART_IES_ME_MSK);
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}
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static void
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uart00_rx_chars(struct uart_port *port, struct pt_regs *regs)
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{
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struct tty_struct *tty = port->info->tty;
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unsigned int status, ch, rds, flg, ignored = 0;
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status = UART_GET_RSR(port);
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while (UART_RX_DATA(status)) {
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/*
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* We need to read rds before reading the
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* character from the fifo
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*/
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rds = UART_GET_RDS(port);
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ch = UART_GET_CHAR(port);
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port->icount.rx++;
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if (tty->flip.count >= TTY_FLIPBUF_SIZE)
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goto ignore_char;
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flg = TTY_NORMAL;
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/*
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* Note that the error handling code is
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* out of the main execution path
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*/
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if (rds & (UART_RDS_BI_MSK |UART_RDS_FE_MSK|
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UART_RDS_PE_MSK |UART_RDS_PE_MSK))
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goto handle_error;
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if (uart_handle_sysrq_char(port, ch, regs))
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goto ignore_char;
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error_return:
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tty_insert_flip_char(tty, ch, flg);
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ignore_char:
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status = UART_GET_RSR(port);
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}
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out:
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tty_flip_buffer_push(tty);
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return;
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handle_error:
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if (rds & UART_RDS_BI_MSK) {
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status &= ~(UART_RDS_FE_MSK | UART_RDS_PE_MSK);
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port->icount.brk++;
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if (uart_handle_break(port))
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goto ignore_char;
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} else if (rds & UART_RDS_PE_MSK)
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port->icount.parity++;
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else if (rds & UART_RDS_FE_MSK)
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port->icount.frame++;
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if (rds & UART_RDS_OE_MSK)
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port->icount.overrun++;
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if (rds & port->ignore_status_mask) {
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if (++ignored > 100)
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goto out;
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goto ignore_char;
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}
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rds &= port->read_status_mask;
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if (rds & UART_RDS_BI_MSK)
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flg = TTY_BREAK;
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else if (rds & UART_RDS_PE_MSK)
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flg = TTY_PARITY;
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else if (rds & UART_RDS_FE_MSK)
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flg = TTY_FRAME;
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if (rds & UART_RDS_OE_MSK) {
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/*
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* CHECK: does overrun affect the current character?
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* ASSUMPTION: it does not.
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*/
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tty_insert_flip_char(tty, ch, flg);
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ch = 0;
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flg = TTY_OVERRUN;
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}
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#ifdef SUPPORT_SYSRQ
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port->sysrq = 0;
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#endif
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goto error_return;
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}
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static void uart00_tx_chars(struct uart_port *port)
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{
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struct circ_buf *xmit = &port->info->xmit;
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int count;
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if (port->x_char) {
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while ((UART_GET_TSR(port) & UART_TSR_TX_LEVEL_MSK) == 15)
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barrier();
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UART_PUT_CHAR(port, port->x_char);
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port->icount.tx++;
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port->x_char = 0;
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return;
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}
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if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
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uart00_stop_tx(port, 0);
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return;
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}
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count = port->fifosize >> 1;
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do {
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while ((UART_GET_TSR(port) & UART_TSR_TX_LEVEL_MSK) == 15)
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barrier();
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UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
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xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
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port->icount.tx++;
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if (uart_circ_empty(xmit))
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break;
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} while (--count > 0);
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if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
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uart_write_wakeup(port);
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if (uart_circ_empty(xmit))
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uart00_stop_tx(port, 0);
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}
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static void uart00_start_tx(struct uart_port *port, unsigned int tty_start)
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{
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UART_PUT_IES(port, UART_IES_TIE_MSK);
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uart00_tx_chars(port);
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}
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static void uart00_modem_status(struct uart_port *port)
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{
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unsigned int status;
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status = UART_GET_MSR(port);
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if (!(status & (UART_MSR_DCTS_MSK | UART_MSR_DDSR_MSK |
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UART_MSR_TERI_MSK | UART_MSR_DDCD_MSK)))
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return;
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if (status & UART_MSR_DDCD_MSK)
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uart_handle_dcd_change(port, status & UART_MSR_DCD_MSK);
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if (status & UART_MSR_DDSR_MSK)
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port->icount.dsr++;
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if (status & UART_MSR_DCTS_MSK)
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uart_handle_cts_change(port, status & UART_MSR_CTS_MSK);
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wake_up_interruptible(&port->info->delta_msr_wait);
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}
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static irqreturn_t uart00_int(int irq, void *dev_id, struct pt_regs *regs)
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{
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struct uart_port *port = dev_id;
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unsigned int status, pass_counter = 0;
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status = UART_GET_INT_STATUS(port);
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do {
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if (status & UART_ISR_RI_MSK)
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uart00_rx_chars(port, regs);
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if (status & UART_ISR_MI_MSK)
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uart00_modem_status(port);
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if (status & (UART_ISR_TI_MSK | UART_ISR_TII_MSK))
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uart00_tx_chars(port);
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if (pass_counter++ > UART00_ISR_PASS_LIMIT)
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break;
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status = UART_GET_INT_STATUS(port);
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} while (status);
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return IRQ_HANDLED;
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}
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static unsigned int uart00_tx_empty(struct uart_port *port)
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{
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return UART_GET_TSR(port) & UART_TSR_TX_LEVEL_MSK? 0 : TIOCSER_TEMT;
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}
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static unsigned int uart00_get_mctrl(struct uart_port *port)
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{
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unsigned int result = 0;
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unsigned int status;
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status = UART_GET_MSR(port);
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if (status & UART_MSR_DCD_MSK)
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result |= TIOCM_CAR;
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if (status & UART_MSR_DSR_MSK)
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result |= TIOCM_DSR;
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if (status & UART_MSR_CTS_MSK)
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result |= TIOCM_CTS;
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if (status & UART_MSR_RI_MSK)
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result |= TIOCM_RI;
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return result;
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}
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static void uart00_set_mctrl_null(struct uart_port *port, unsigned int mctrl)
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{
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}
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static void uart00_break_ctl(struct uart_port *port, int break_state)
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{
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unsigned long flags;
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unsigned int mcr;
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spin_lock_irqsave(&port->lock, flags);
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mcr = UART_GET_MCR(port);
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if (break_state == -1)
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mcr |= UART_MCR_BR_MSK;
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else
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mcr &= ~UART_MCR_BR_MSK;
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UART_PUT_MCR(port, mcr);
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spin_unlock_irqrestore(&port->lock, flags);
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}
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static void
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uart00_set_termios(struct uart_port *port, struct termios *termios,
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struct termios *old)
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{
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unsigned int uart_mc, old_ies, baud, quot;
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unsigned long flags;
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/*
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* We don't support CREAD (yet)
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*/
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termios->c_cflag |= CREAD;
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/*
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* Ask the core to calculate the divisor for us.
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*/
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baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
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quot = uart_get_divisor(port, baud);
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/* byte size and parity */
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switch (termios->c_cflag & CSIZE) {
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case CS5:
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uart_mc = UART_MC_CLS_CHARLEN_5;
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break;
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case CS6:
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uart_mc = UART_MC_CLS_CHARLEN_6;
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break;
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case CS7:
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uart_mc = UART_MC_CLS_CHARLEN_7;
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break;
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default: // CS8
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uart_mc = UART_MC_CLS_CHARLEN_8;
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break;
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}
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if (termios->c_cflag & CSTOPB)
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uart_mc|= UART_MC_ST_TWO;
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if (termios->c_cflag & PARENB) {
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uart_mc |= UART_MC_PE_MSK;
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if (!(termios->c_cflag & PARODD))
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uart_mc |= UART_MC_EP_MSK;
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}
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spin_lock_irqsave(&port->lock, flags);
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/*
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* Update the per-port timeout.
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*/
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uart_update_timeout(port, termios->c_cflag, baud);
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port->read_status_mask = UART_RDS_OE_MSK;
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if (termios->c_iflag & INPCK)
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port->read_status_mask |= UART_RDS_FE_MSK | UART_RDS_PE_MSK;
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if (termios->c_iflag & (BRKINT | PARMRK))
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port->read_status_mask |= UART_RDS_BI_MSK;
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/*
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* Characters to ignore
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*/
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port->ignore_status_mask = 0;
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if (termios->c_iflag & IGNPAR)
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port->ignore_status_mask |= UART_RDS_FE_MSK | UART_RDS_PE_MSK;
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if (termios->c_iflag & IGNBRK) {
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port->ignore_status_mask |= UART_RDS_BI_MSK;
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/*
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* If we're ignoring parity and break indicators,
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* ignore overruns to (for real raw support).
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*/
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if (termios->c_iflag & IGNPAR)
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port->ignore_status_mask |= UART_RDS_OE_MSK;
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}
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/* first, disable everything */
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old_ies = UART_GET_IES(port);
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if (UART_ENABLE_MS(port, termios->c_cflag))
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old_ies |= UART_IES_ME_MSK;
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/* Set baud rate */
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UART_PUT_DIV_LO(port, (quot & 0xff));
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UART_PUT_DIV_HI(port, ((quot & 0xf00) >> 8));
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UART_PUT_MC(port, uart_mc);
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UART_PUT_IES(port, old_ies);
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spin_unlock_irqrestore(&port->lock, flags);
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}
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static int uart00_startup(struct uart_port *port)
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{
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int result;
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/*
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* Allocate the IRQ
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*/
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result = request_irq(port->irq, uart00_int, 0, "uart00", port);
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if (result) {
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printk(KERN_ERR "Request of irq %d failed\n", port->irq);
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return result;
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}
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/*
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* Finally, enable interrupts. Use the TII interrupt to minimise
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* the number of interrupts generated. If higher performance is
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* needed, consider using the TI interrupt with a suitable FIFO
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* threshold
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*/
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UART_PUT_IES(port, UART_IES_RE_MSK | UART_IES_TIE_MSK);
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return 0;
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}
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static void uart00_shutdown(struct uart_port *port)
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{
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/*
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* disable all interrupts, disable the port
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*/
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UART_PUT_IEC(port, 0xff);
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/* disable break condition and fifos */
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UART_PUT_MCR(port, UART_GET_MCR(port) &~UART_MCR_BR_MSK);
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/*
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* Free the interrupt
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*/
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free_irq(port->irq, port);
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}
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static const char *uart00_type(struct uart_port *port)
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{
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return port->type == PORT_UART00 ? "Altera UART00" : NULL;
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}
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/*
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* Release the memory region(s) being used by 'port'
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*/
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static void uart00_release_port(struct uart_port *port)
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{
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release_mem_region(port->mapbase, UART_PORT_SIZE);
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#ifdef CONFIG_ARCH_CAMELOT
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if (port->membase != (void*)IO_ADDRESS(EXC_UART00_BASE)) {
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iounmap(port->membase);
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}
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#endif
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}
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/*
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* Request the memory region(s) being used by 'port'
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*/
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static int uart00_request_port(struct uart_port *port)
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{
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return request_mem_region(port->mapbase, UART_PORT_SIZE, "serial_uart00")
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!= NULL ? 0 : -EBUSY;
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}
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/*
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* Configure/autoconfigure the port.
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*/
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static void uart00_config_port(struct uart_port *port, int flags)
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{
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/*
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* Map the io memory if this is a soft uart
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*/
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if (!port->membase)
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port->membase = ioremap_nocache(port->mapbase,SZ_4K);
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if (!port->membase)
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printk(KERN_ERR "serial00: cannot map io memory\n");
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else
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port->type = PORT_UART00;
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|
|
}
|
|
|
|
/*
|
|
* verify the new serial_struct (for TIOCSSERIAL).
|
|
*/
|
|
static int uart00_verify_port(struct uart_port *port, struct serial_struct *ser)
|
|
{
|
|
int ret = 0;
|
|
if (ser->type != PORT_UNKNOWN && ser->type != PORT_UART00)
|
|
ret = -EINVAL;
|
|
if (ser->irq < 0 || ser->irq >= NR_IRQS)
|
|
ret = -EINVAL;
|
|
if (ser->baud_base < 9600)
|
|
ret = -EINVAL;
|
|
return ret;
|
|
}
|
|
|
|
static struct uart_ops uart00_pops = {
|
|
.tx_empty = uart00_tx_empty,
|
|
.set_mctrl = uart00_set_mctrl_null,
|
|
.get_mctrl = uart00_get_mctrl,
|
|
.stop_tx = uart00_stop_tx,
|
|
.start_tx = uart00_start_tx,
|
|
.stop_rx = uart00_stop_rx,
|
|
.enable_ms = uart00_enable_ms,
|
|
.break_ctl = uart00_break_ctl,
|
|
.startup = uart00_startup,
|
|
.shutdown = uart00_shutdown,
|
|
.set_termios = uart00_set_termios,
|
|
.type = uart00_type,
|
|
.release_port = uart00_release_port,
|
|
.request_port = uart00_request_port,
|
|
.config_port = uart00_config_port,
|
|
.verify_port = uart00_verify_port,
|
|
};
|
|
|
|
|
|
#ifdef CONFIG_ARCH_CAMELOT
|
|
static struct uart_port epxa10db_port = {
|
|
.membase = (void*)IO_ADDRESS(EXC_UART00_BASE),
|
|
.mapbase = EXC_UART00_BASE,
|
|
.iotype = SERIAL_IO_MEM,
|
|
.irq = IRQ_UART,
|
|
.uartclk = EXC_AHB2_CLK_FREQUENCY,
|
|
.fifosize = 16,
|
|
.ops = &uart00_pops,
|
|
.flags = ASYNC_BOOT_AUTOCONF,
|
|
};
|
|
#endif
|
|
|
|
|
|
#ifdef CONFIG_SERIAL_UART00_CONSOLE
|
|
static void uart00_console_write(struct console *co, const char *s, unsigned count)
|
|
{
|
|
#ifdef CONFIG_ARCH_CAMELOT
|
|
struct uart_port *port = &epxa10db_port;
|
|
unsigned int status, old_ies;
|
|
int i;
|
|
|
|
/*
|
|
* First save the CR then disable the interrupts
|
|
*/
|
|
old_ies = UART_GET_IES(port);
|
|
UART_PUT_IEC(port,0xff);
|
|
|
|
/*
|
|
* Now, do each character
|
|
*/
|
|
for (i = 0; i < count; i++) {
|
|
do {
|
|
status = UART_GET_TSR(port);
|
|
} while (!UART_TX_READY(status));
|
|
UART_PUT_CHAR(port, s[i]);
|
|
if (s[i] == '\n') {
|
|
do {
|
|
status = UART_GET_TSR(port);
|
|
} while (!UART_TX_READY(status));
|
|
UART_PUT_CHAR(port, '\r');
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Finally, wait for transmitter to become empty
|
|
* and restore the IES
|
|
*/
|
|
do {
|
|
status = UART_GET_TSR(port);
|
|
} while (status & UART_TSR_TX_LEVEL_MSK);
|
|
UART_PUT_IES(port, old_ies);
|
|
#endif
|
|
}
|
|
|
|
static void __init
|
|
uart00_console_get_options(struct uart_port *port, int *baud,
|
|
int *parity, int *bits)
|
|
{
|
|
unsigned int uart_mc, quot;
|
|
|
|
uart_mc = UART_GET_MC(port);
|
|
|
|
*parity = 'n';
|
|
if (uart_mc & UART_MC_PE_MSK) {
|
|
if (uart_mc & UART_MC_EP_MSK)
|
|
*parity = 'e';
|
|
else
|
|
*parity = 'o';
|
|
}
|
|
|
|
switch (uart_mc & UART_MC_CLS_MSK) {
|
|
case UART_MC_CLS_CHARLEN_5:
|
|
*bits = 5;
|
|
break;
|
|
case UART_MC_CLS_CHARLEN_6:
|
|
*bits = 6;
|
|
break;
|
|
case UART_MC_CLS_CHARLEN_7:
|
|
*bits = 7;
|
|
break;
|
|
case UART_MC_CLS_CHARLEN_8:
|
|
*bits = 8;
|
|
break;
|
|
}
|
|
quot = UART_GET_DIV_LO(port) | (UART_GET_DIV_HI(port) << 8);
|
|
*baud = port->uartclk / (16 *quot );
|
|
}
|
|
|
|
static int __init uart00_console_setup(struct console *co, char *options)
|
|
{
|
|
struct uart_port *port;
|
|
int baud = 115200;
|
|
int bits = 8;
|
|
int parity = 'n';
|
|
int flow = 'n';
|
|
|
|
#ifdef CONFIG_ARCH_CAMELOT
|
|
port = &epxa10db_port; ;
|
|
#else
|
|
return -ENODEV;
|
|
#endif
|
|
if (options)
|
|
uart_parse_options(options, &baud, &parity, &bits, &flow);
|
|
else
|
|
uart00_console_get_options(port, &baud, &parity, &bits);
|
|
|
|
return uart_set_options(port, co, baud, parity, bits, flow);
|
|
}
|
|
|
|
extern struct uart_driver uart00_reg;
|
|
static struct console uart00_console = {
|
|
.name = SERIAL_UART00_NAME,
|
|
.write = uart00_console_write,
|
|
.device = uart_console_device,
|
|
.setup = uart00_console_setup,
|
|
.flags = CON_PRINTBUFFER,
|
|
.index = 0,
|
|
.data = &uart00_reg,
|
|
};
|
|
|
|
static int __init uart00_console_init(void)
|
|
{
|
|
register_console(&uart00_console);
|
|
return 0;
|
|
}
|
|
console_initcall(uart00_console_init);
|
|
|
|
#define UART00_CONSOLE &uart00_console
|
|
#else
|
|
#define UART00_CONSOLE NULL
|
|
#endif
|
|
|
|
static struct uart_driver uart00_reg = {
|
|
.owner = NULL,
|
|
.driver_name = SERIAL_UART00_NAME,
|
|
.dev_name = SERIAL_UART00_NAME,
|
|
.major = SERIAL_UART00_MAJOR,
|
|
.minor = SERIAL_UART00_MINOR,
|
|
.nr = UART_NR,
|
|
.cons = UART00_CONSOLE,
|
|
};
|
|
|
|
struct dev_port_entry{
|
|
unsigned int base_addr;
|
|
struct uart_port *port;
|
|
};
|
|
|
|
#ifdef CONFIG_PLD_HOTSWAP
|
|
|
|
static struct dev_port_entry dev_port_map[UART_NR];
|
|
|
|
/*
|
|
* Keep a mapping of dev_info addresses -> port lines to use when
|
|
* removing ports dev==NULL indicates unused entry
|
|
*/
|
|
|
|
struct uart00_ps_data{
|
|
unsigned int clk;
|
|
unsigned int fifosize;
|
|
};
|
|
|
|
int uart00_add_device(struct pldhs_dev_info* dev_info, void* dev_ps_data)
|
|
{
|
|
struct uart00_ps_data* dev_ps=dev_ps_data;
|
|
struct uart_port * port;
|
|
int i,result;
|
|
|
|
i=0;
|
|
while(dev_port_map[i].port)
|
|
i++;
|
|
|
|
if(i==UART_NR){
|
|
printk(KERN_WARNING "uart00: Maximum number of ports reached\n");
|
|
return 0;
|
|
}
|
|
|
|
port=kmalloc(sizeof(struct uart_port),GFP_KERNEL);
|
|
if(!port)
|
|
return -ENOMEM;
|
|
|
|
printk("clk=%d fifo=%d\n",dev_ps->clk,dev_ps->fifosize);
|
|
port->membase=0;
|
|
port->mapbase=dev_info->base_addr;
|
|
port->iotype=SERIAL_IO_MEM;
|
|
port->irq=dev_info->irq;
|
|
port->uartclk=dev_ps->clk;
|
|
port->fifosize=dev_ps->fifosize;
|
|
port->ops=&uart00_pops;
|
|
port->line=i;
|
|
port->flags=ASYNC_BOOT_AUTOCONF;
|
|
|
|
result=uart_add_one_port(&uart00_reg, port);
|
|
if(result){
|
|
printk("uart_add_one_port returned %d\n",result);
|
|
return result;
|
|
}
|
|
dev_port_map[i].base_addr=dev_info->base_addr;
|
|
dev_port_map[i].port=port;
|
|
printk("uart00: added device at %x as ttyUA%d\n",dev_port_map[i].base_addr,i);
|
|
return 0;
|
|
|
|
}
|
|
|
|
int uart00_remove_devices(void)
|
|
{
|
|
int i,result;
|
|
|
|
|
|
result=0;
|
|
for(i=1;i<UART_NR;i++){
|
|
if(dev_port_map[i].base_addr){
|
|
result=uart_remove_one_port(&uart00_reg, dev_port_map[i].port);
|
|
if(result)
|
|
return result;
|
|
|
|
/* port removed sucessfully, so now tidy up */
|
|
kfree(dev_port_map[i].port);
|
|
dev_port_map[i].base_addr=0;
|
|
dev_port_map[i].port=NULL;
|
|
}
|
|
}
|
|
return 0;
|
|
|
|
}
|
|
|
|
struct pld_hotswap_ops uart00_pldhs_ops={
|
|
.name = "uart00",
|
|
.add_device = uart00_add_device,
|
|
.remove_devices = uart00_remove_devices,
|
|
};
|
|
|
|
#endif
|
|
|
|
static int __init uart00_init(void)
|
|
{
|
|
int result;
|
|
|
|
printk(KERN_INFO "Serial: UART00 driver $Revision: 1.35 $\n");
|
|
|
|
printk(KERN_WARNING "serial_uart00:Using temporary major/minor pairs"
|
|
" - these WILL change in the future\n");
|
|
|
|
result = uart_register_driver(&uart00_reg);
|
|
if (result)
|
|
return result;
|
|
#ifdef CONFIG_ARCH_CAMELOT
|
|
result = uart_add_one_port(&uart00_reg,&epxa10db_port);
|
|
#endif
|
|
if (result)
|
|
uart_unregister_driver(&uart00_reg);
|
|
|
|
#ifdef CONFIG_PLD_HOTSWAP
|
|
pldhs_register_driver(&uart00_pldhs_ops);
|
|
#endif
|
|
return result;
|
|
}
|
|
|
|
__initcall(uart00_init);
|