99d173fbe8
The read and writes from the fifo are from a buffer, with various
fields and data at predefined offsets. So, they should not be done to
the same address(or port) in case of val_count greater than 1.
Therefore, fix this by using iowrite32()/ioread32() instead of
ioread32_rep()/iowrite32_rep().
Also, the write into FIFO must be performed with an offset from the
message ram base address. Therefore, fix the base address to
mram_base.
Fixes:
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.. | ||
Kconfig | ||
Makefile | ||
m_can.c | ||
m_can.h | ||
m_can_pci.c | ||
m_can_platform.c | ||
tcan4x5x-core.c | ||
tcan4x5x-regmap.c | ||
tcan4x5x.h |