257 строки
6.0 KiB
C
257 строки
6.0 KiB
C
/*
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* HighPoint RR3xxx controller driver for Linux
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* Copyright (C) 2006-2007 HighPoint Technologies, Inc. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Please report bugs/comments/suggestions to linux@highpoint-tech.com
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*
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* For more information, visit http://www.highpoint-tech.com
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*/
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#ifndef _HPTIOP_H_
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#define _HPTIOP_H_
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struct hpt_iopmu
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{
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__le32 resrved0[4];
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__le32 inbound_msgaddr0;
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__le32 inbound_msgaddr1;
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__le32 outbound_msgaddr0;
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__le32 outbound_msgaddr1;
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__le32 inbound_doorbell;
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__le32 inbound_intstatus;
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__le32 inbound_intmask;
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__le32 outbound_doorbell;
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__le32 outbound_intstatus;
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__le32 outbound_intmask;
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__le32 reserved1[2];
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__le32 inbound_queue;
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__le32 outbound_queue;
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};
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#define IOPMU_QUEUE_EMPTY 0xffffffff
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#define IOPMU_QUEUE_MASK_HOST_BITS 0xf0000000
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#define IOPMU_QUEUE_ADDR_HOST_BIT 0x80000000
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#define IOPMU_QUEUE_REQUEST_SIZE_BIT 0x40000000
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#define IOPMU_QUEUE_REQUEST_RESULT_BIT 0x40000000
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#define IOPMU_OUTBOUND_INT_MSG0 1
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#define IOPMU_OUTBOUND_INT_MSG1 2
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#define IOPMU_OUTBOUND_INT_DOORBELL 4
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#define IOPMU_OUTBOUND_INT_POSTQUEUE 8
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#define IOPMU_OUTBOUND_INT_PCI 0x10
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#define IOPMU_INBOUND_INT_MSG0 1
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#define IOPMU_INBOUND_INT_MSG1 2
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#define IOPMU_INBOUND_INT_DOORBELL 4
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#define IOPMU_INBOUND_INT_ERROR 8
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#define IOPMU_INBOUND_INT_POSTQUEUE 0x10
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enum hpt_iopmu_message {
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/* host-to-iop messages */
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IOPMU_INBOUND_MSG0_NOP = 0,
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IOPMU_INBOUND_MSG0_RESET,
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IOPMU_INBOUND_MSG0_FLUSH,
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IOPMU_INBOUND_MSG0_SHUTDOWN,
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IOPMU_INBOUND_MSG0_STOP_BACKGROUND_TASK,
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IOPMU_INBOUND_MSG0_START_BACKGROUND_TASK,
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IOPMU_INBOUND_MSG0_MAX = 0xff,
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/* iop-to-host messages */
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IOPMU_OUTBOUND_MSG0_REGISTER_DEVICE_0 = 0x100,
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IOPMU_OUTBOUND_MSG0_REGISTER_DEVICE_MAX = 0x1ff,
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IOPMU_OUTBOUND_MSG0_UNREGISTER_DEVICE_0 = 0x200,
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IOPMU_OUTBOUND_MSG0_UNREGISTER_DEVICE_MAX = 0x2ff,
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IOPMU_OUTBOUND_MSG0_REVALIDATE_DEVICE_0 = 0x300,
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IOPMU_OUTBOUND_MSG0_REVALIDATE_DEVICE_MAX = 0x3ff,
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};
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struct hpt_iop_request_header
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{
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__le32 size;
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__le32 type;
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__le32 flags;
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__le32 result;
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__le32 context; /* host context */
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__le32 context_hi32;
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};
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#define IOP_REQUEST_FLAG_SYNC_REQUEST 1
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#define IOP_REQUEST_FLAG_BIST_REQUEST 2
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#define IOP_REQUEST_FLAG_REMAPPED 4
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#define IOP_REQUEST_FLAG_OUTPUT_CONTEXT 8
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enum hpt_iop_request_type {
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IOP_REQUEST_TYPE_GET_CONFIG = 0,
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IOP_REQUEST_TYPE_SET_CONFIG,
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IOP_REQUEST_TYPE_BLOCK_COMMAND,
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IOP_REQUEST_TYPE_SCSI_COMMAND,
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IOP_REQUEST_TYPE_IOCTL_COMMAND,
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IOP_REQUEST_TYPE_MAX
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};
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enum hpt_iop_result_type {
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IOP_RESULT_PENDING = 0,
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IOP_RESULT_SUCCESS,
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IOP_RESULT_FAIL,
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IOP_RESULT_BUSY,
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IOP_RESULT_RESET,
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IOP_RESULT_INVALID_REQUEST,
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IOP_RESULT_BAD_TARGET,
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IOP_RESULT_MODE_SENSE_CHECK_CONDITION,
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};
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struct hpt_iop_request_get_config
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{
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struct hpt_iop_request_header header;
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__le32 interface_version;
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__le32 firmware_version;
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__le32 max_requests;
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__le32 request_size;
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__le32 max_sg_count;
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__le32 data_transfer_length;
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__le32 alignment_mask;
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__le32 max_devices;
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__le32 sdram_size;
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};
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struct hpt_iop_request_set_config
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{
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struct hpt_iop_request_header header;
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__le32 iop_id;
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__le16 vbus_id;
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__le16 max_host_request_size;
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__le32 reserve[6];
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};
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struct hpt_iopsg
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{
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__le32 size;
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__le32 eot; /* non-zero: end of table */
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__le64 pci_address;
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};
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struct hpt_iop_request_block_command
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{
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struct hpt_iop_request_header header;
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u8 channel;
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u8 target;
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u8 lun;
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u8 pad1;
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__le16 command; /* IOP_BLOCK_COMMAND_{READ,WRITE} */
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__le16 sectors;
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__le64 lba;
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struct hpt_iopsg sg_list[1];
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};
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#define IOP_BLOCK_COMMAND_READ 1
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#define IOP_BLOCK_COMMAND_WRITE 2
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#define IOP_BLOCK_COMMAND_VERIFY 3
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#define IOP_BLOCK_COMMAND_FLUSH 4
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#define IOP_BLOCK_COMMAND_SHUTDOWN 5
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struct hpt_iop_request_scsi_command
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{
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struct hpt_iop_request_header header;
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u8 channel;
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u8 target;
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u8 lun;
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u8 pad1;
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u8 cdb[16];
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__le32 dataxfer_length;
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struct hpt_iopsg sg_list[1];
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};
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struct hpt_iop_request_ioctl_command
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{
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struct hpt_iop_request_header header;
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__le32 ioctl_code;
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__le32 inbuf_size;
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__le32 outbuf_size;
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__le32 bytes_returned;
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u8 buf[1];
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/* out data should be put at buf[(inbuf_size+3)&~3] */
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};
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#define HPTIOP_MAX_REQUESTS 256u
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struct hptiop_request {
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struct hptiop_request * next;
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void * req_virt;
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u32 req_shifted_phy;
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struct scsi_cmnd * scp;
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int index;
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};
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struct hpt_scsi_pointer {
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int mapped;
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int sgcnt;
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dma_addr_t dma_handle;
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};
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#define HPT_SCP(scp) ((struct hpt_scsi_pointer *)&(scp)->SCp)
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struct hptiop_hba {
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struct hpt_iopmu __iomem * iop;
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struct Scsi_Host * host;
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struct pci_dev * pcidev;
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/* IOP config info */
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u32 interface_version;
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u32 firmware_version;
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u32 sdram_size;
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u32 max_devices;
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u32 max_requests;
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u32 max_request_size;
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u32 max_sg_descriptors;
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u32 req_size; /* host-allocated request buffer size */
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int iopintf_v2: 1;
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int initialized: 1;
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int msg_done: 1;
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struct hptiop_request * req_list;
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struct hptiop_request reqs[HPTIOP_MAX_REQUESTS];
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/* used to free allocated dma area */
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void * dma_coherent;
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dma_addr_t dma_coherent_handle;
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atomic_t reset_count;
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atomic_t resetting;
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wait_queue_head_t reset_wq;
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wait_queue_head_t ioctl_wq;
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};
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struct hpt_ioctl_k
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{
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struct hptiop_hba * hba;
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u32 ioctl_code;
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u32 inbuf_size;
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u32 outbuf_size;
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void * inbuf;
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void * outbuf;
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u32 * bytes_returned;
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void (*done)(struct hpt_ioctl_k *);
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int result; /* HPT_IOCTL_RESULT_ */
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};
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#define HPT_IOCTL_RESULT_OK 0
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#define HPT_IOCTL_RESULT_FAILED (-1)
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#if 0
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#define dprintk(fmt, args...) do { printk(fmt, ##args); } while(0)
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#else
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#define dprintk(fmt, args...)
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#endif
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#endif
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