Joe Perches da4ed37873 RISC-V: Use IS_ENABLED(CONFIG_CMODEL_MEDLOW) ... IS_ENABLED should generally use CONFIG_ prefaced symbols and it doesn't appear as if there is a CMODEL_MEDLOW define. Signed-off-by: Joe Perches <joe@perches.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>		2019-03-28 23:18:51 -07:00
..
vdso	riscv: Use latest system call ABI	2019-02-25 20:53:52 +01:00
.gitignore	RISC-V: Build Infrastructure	2017-09-26 15:26:49 -07:00
Makefile	RISC-V: Always compile mm/init.c with cmodel=medany and notrace	2019-03-26 18:25:06 -07:00
asm-offsets.c	RISC-V: Add _TIF_NEED_RESCHED check for kernel thread when CONFIG_PREEMPT=y	2019-01-23 12:56:19 -08:00
cacheinfo.c	RISC-V: Fix of_node_* refcount	2018-12-21 08:10:49 -08:00
cpu.c	RISC-V: Remove NR_CPUs check during hartid search from DT	2019-03-04 10:40:38 -08:00
cpufeature.c	RISC-V: Assign hwcap as per comman capabilities.	2019-03-04 10:40:39 -08:00
entry.S	RISC-V: Add _TIF_NEED_RESCHED check for kernel thread when CONFIG_PREEMPT=y	2019-01-23 12:56:19 -08:00
fpu.S	Extract FPU context operations from entry.S	2018-10-22 17:02:22 -07:00
ftrace.c	riscv: add missing newlines to printk messages	2019-02-11 15:34:56 -08:00
head.S	RISC-V: Build flat and compressed kernel images	2018-11-20 05:19:09 -08:00
irq.c	RISC-V: Show IPI stats	2018-10-22 17:03:37 -07:00
mcount-dyn.S	riscv/ftrace: Add DYNAMIC_FTRACE_WITH_REGS support	2018-04-02 19:59:13 -07:00
mcount.S	RISC-V: remove the unused return_to_handler export	2018-10-22 17:38:12 -07:00
module-sections.c	RISC-V: Support MODULE_SECTIONS mechanism on RV32	2019-01-07 08:19:20 -08:00
module.c	RISC-V: Use IS_ENABLED(CONFIG_CMODEL_MEDLOW)	2019-03-28 23:18:51 -07:00
module.lds	RISC-V: Add section of GOT.PLT for kernel module	2018-04-02 20:00:54 -07:00
perf_event.c	RISC-V: Fix of_node_* refcount	2018-12-21 08:10:49 -08:00
process.c	Auto-detect whether a FPU exists	2018-10-22 17:02:23 -07:00
ptrace.c	riscv: fix trace_sys_exit hook	2019-01-07 08:22:43 -08:00
reset.c	RISC-V: Init and Halt Code	2017-09-26 15:26:44 -07:00
riscv_ksyms.c	riscv: split the declaration of __copy_user	2018-06-09 12:34:31 -07:00
setup.c	RISC-V: Always compile mm/init.c with cmodel=medany and notrace	2019-03-26 18:25:06 -07:00
signal.c	Remove 'type' argument from access_ok() function	2019-01-03 18:57:57 -08:00
smp.c	RISC-V: Fixmap support and MM cleanups	2019-03-04 11:47:04 -08:00
smpboot.c	RISC-V: Compare cpuid with NR_CPUS before mapping.	2019-03-04 10:40:39 -08:00
stacktrace.c	riscv/ftrace: Add HAVE_FUNCTION_GRAPH_RET_ADDR_PTR support	2018-04-02 19:59:13 -07:00
sys_riscv.c	RISC-V: Use a less ugly workaround for unused variable warnings	2018-08-28 12:58:36 -07:00
syscall_table.c	RISC-V: Make __NR_riscv_flush_icache visible to userspace	2018-01-07 15:14:37 -08:00
time.c	RISC-V: add of_node_put()	2018-12-21 08:11:08 -08:00
traps.c	RISC-V: Don't increment sepc after breakpoint.	2018-08-13 08:31:30 -07:00
vdso.c	riscv/vdso: don't clear PG_reserved	2019-03-05 21:07:18 -08:00
vmlinux.lds.S	Revert "RISC-V: Make BSS section as the last section in vmlinux.lds.S"	2019-02-11 15:24:45 -08:00