232 строки
6.3 KiB
C
232 строки
6.3 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/
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* Author: Tomi Valkeinen <tomi.valkeinen@ti.com>
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*/
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#include <drm/drm_atomic.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_crtc.h>
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#include <drm/drm_crtc_helper.h>
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#include <drm/drm_fourcc.h>
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#include <drm/drm_fb_cma_helper.h>
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#include <drm/drm_gem_framebuffer_helper.h>
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#include "tidss_crtc.h"
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#include "tidss_dispc.h"
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#include "tidss_drv.h"
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#include "tidss_plane.h"
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/* drm_plane_helper_funcs */
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static int tidss_plane_atomic_check(struct drm_plane *plane,
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struct drm_plane_state *state)
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{
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struct drm_device *ddev = plane->dev;
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struct tidss_device *tidss = to_tidss(ddev);
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struct tidss_plane *tplane = to_tidss_plane(plane);
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const struct drm_format_info *finfo;
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struct drm_crtc_state *crtc_state;
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u32 hw_plane = tplane->hw_plane_id;
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u32 hw_videoport;
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int ret;
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dev_dbg(ddev->dev, "%s\n", __func__);
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if (!state->crtc) {
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/*
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* The visible field is not reset by the DRM core but only
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* updated by drm_plane_helper_check_state(), set it manually.
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*/
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state->visible = false;
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return 0;
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}
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crtc_state = drm_atomic_get_crtc_state(state->state, state->crtc);
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if (IS_ERR(crtc_state))
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return PTR_ERR(crtc_state);
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ret = drm_atomic_helper_check_plane_state(state, crtc_state, 0,
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INT_MAX, true, true);
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if (ret < 0)
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return ret;
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/*
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* The HW is only able to start drawing at subpixel boundary
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* (the two first checks bellow). At the end of a row the HW
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* can only jump integer number of subpixels forward to the
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* beginning of the next row. So we can only show picture with
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* integer subpixel width (the third check). However, after
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* reaching the end of the drawn picture the drawing starts
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* again at the absolute memory address where top left corner
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* position of the drawn picture is (so there is no need to
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* check for odd height).
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*/
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finfo = drm_format_info(state->fb->format->format);
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if ((state->src_x >> 16) % finfo->hsub != 0) {
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dev_dbg(ddev->dev,
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"%s: x-position %u not divisible subpixel size %u\n",
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__func__, (state->src_x >> 16), finfo->hsub);
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return -EINVAL;
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}
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if ((state->src_y >> 16) % finfo->vsub != 0) {
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dev_dbg(ddev->dev,
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"%s: y-position %u not divisible subpixel size %u\n",
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__func__, (state->src_y >> 16), finfo->vsub);
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return -EINVAL;
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}
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if ((state->src_w >> 16) % finfo->hsub != 0) {
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dev_dbg(ddev->dev,
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"%s: src width %u not divisible by subpixel size %u\n",
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__func__, (state->src_w >> 16), finfo->hsub);
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return -EINVAL;
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}
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if (!state->visible)
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return 0;
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hw_videoport = to_tidss_crtc(state->crtc)->hw_videoport;
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ret = dispc_plane_check(tidss->dispc, hw_plane, state, hw_videoport);
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if (ret)
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return ret;
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return 0;
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}
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static void tidss_plane_atomic_update(struct drm_plane *plane,
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struct drm_plane_state *old_state)
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{
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struct drm_device *ddev = plane->dev;
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struct tidss_device *tidss = to_tidss(ddev);
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struct tidss_plane *tplane = to_tidss_plane(plane);
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struct drm_plane_state *state = plane->state;
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u32 hw_videoport;
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int ret;
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dev_dbg(ddev->dev, "%s\n", __func__);
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if (!state->visible) {
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dispc_plane_enable(tidss->dispc, tplane->hw_plane_id, false);
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return;
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}
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hw_videoport = to_tidss_crtc(state->crtc)->hw_videoport;
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ret = dispc_plane_setup(tidss->dispc, tplane->hw_plane_id,
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state, hw_videoport);
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if (ret) {
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dev_err(plane->dev->dev, "%s: Failed to setup plane %d\n",
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__func__, tplane->hw_plane_id);
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dispc_plane_enable(tidss->dispc, tplane->hw_plane_id, false);
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return;
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}
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dispc_plane_enable(tidss->dispc, tplane->hw_plane_id, true);
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}
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static void tidss_plane_atomic_disable(struct drm_plane *plane,
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struct drm_plane_state *old_state)
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{
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struct drm_device *ddev = plane->dev;
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struct tidss_device *tidss = to_tidss(ddev);
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struct tidss_plane *tplane = to_tidss_plane(plane);
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dev_dbg(ddev->dev, "%s\n", __func__);
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dispc_plane_enable(tidss->dispc, tplane->hw_plane_id, false);
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}
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static void drm_plane_destroy(struct drm_plane *plane)
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{
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struct tidss_plane *tplane = to_tidss_plane(plane);
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drm_plane_cleanup(plane);
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kfree(tplane);
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}
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static const struct drm_plane_helper_funcs tidss_plane_helper_funcs = {
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.prepare_fb = drm_gem_fb_prepare_fb,
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.atomic_check = tidss_plane_atomic_check,
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.atomic_update = tidss_plane_atomic_update,
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.atomic_disable = tidss_plane_atomic_disable,
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};
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static const struct drm_plane_funcs tidss_plane_funcs = {
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.update_plane = drm_atomic_helper_update_plane,
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.disable_plane = drm_atomic_helper_disable_plane,
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.reset = drm_atomic_helper_plane_reset,
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.destroy = drm_plane_destroy,
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.atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
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.atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
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};
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struct tidss_plane *tidss_plane_create(struct tidss_device *tidss,
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u32 hw_plane_id, u32 plane_type,
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u32 crtc_mask, const u32 *formats,
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u32 num_formats)
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{
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struct tidss_plane *tplane;
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enum drm_plane_type type;
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u32 possible_crtcs;
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u32 num_planes = tidss->feat->num_planes;
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u32 color_encodings = (BIT(DRM_COLOR_YCBCR_BT601) |
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BIT(DRM_COLOR_YCBCR_BT709));
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u32 color_ranges = (BIT(DRM_COLOR_YCBCR_FULL_RANGE) |
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BIT(DRM_COLOR_YCBCR_LIMITED_RANGE));
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u32 default_encoding = DRM_COLOR_YCBCR_BT601;
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u32 default_range = DRM_COLOR_YCBCR_FULL_RANGE;
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u32 blend_modes = (BIT(DRM_MODE_BLEND_PREMULTI) |
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BIT(DRM_MODE_BLEND_COVERAGE));
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int ret;
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tplane = kzalloc(sizeof(*tplane), GFP_KERNEL);
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if (!tplane)
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return ERR_PTR(-ENOMEM);
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tplane->hw_plane_id = hw_plane_id;
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possible_crtcs = crtc_mask;
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type = plane_type;
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ret = drm_universal_plane_init(&tidss->ddev, &tplane->plane,
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possible_crtcs,
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&tidss_plane_funcs,
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formats, num_formats,
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NULL, type, NULL);
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if (ret < 0)
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goto err;
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drm_plane_helper_add(&tplane->plane, &tidss_plane_helper_funcs);
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drm_plane_create_zpos_property(&tplane->plane, hw_plane_id, 0,
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num_planes - 1);
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ret = drm_plane_create_color_properties(&tplane->plane,
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color_encodings,
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color_ranges,
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default_encoding,
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default_range);
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if (ret)
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goto err;
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ret = drm_plane_create_alpha_property(&tplane->plane);
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if (ret)
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goto err;
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ret = drm_plane_create_blend_mode_property(&tplane->plane, blend_modes);
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if (ret)
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goto err;
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return tplane;
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err:
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kfree(tplane);
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return ERR_PTR(ret);
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}
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